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December 2013
FDP5800
®
N-Channel Logic Level PowerTrench
MOSFET
60 V, 80 A, 6 m
Ω
Features
Description
•
R
DS(on)
= 4.6 m
Ω
(Typ.) @ V
GS
= 10
V
,
I
D
= 80 A
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s advanced PowerTrench
®
process that has
been tailored to minimize the on-state resistance while main-
taining superior switching performance.
•
High Performance Trench Technology for Extermly Low
R
DS(on)
•
•
•
Low Gate Charge
Applications
High Power and Current Handing Capability
RoHS Compliant
•
•
•
•
Power Tools
Motor Drives and Uninterruptible Power Supplies
Synchronous Rectification
Battery Protection Circuit
D
G
G
D
S
TO-220
S
MOSFET Maximum Ratings
T
C
= 25°C unless otherwise noted.
Symbol
V
DSS
V
GSS
Parameter
FDP5800
60
Unit
V
Drain-Source Voltage
Gate-Source Voltage
±20
80
V
– Continuous (T
C
= 25
o
C)
– Continuous (T
C
= 100
o
C)
– Continuous (T
A
= 25
o
C)
A
I
D
D r a in
C u r r e n t
Drain Current
80*
A
14
A
I
DM
– Pulsed
320
652
A
E
AS
Single Pulsed Avalanche Energy
Power Dissipation
(Note 1)
mJ
(T
C
= 25
o
C)
242
1.61
W
W/
°
C
P
D
– Derate Above 25
o
C
T
J
, T
STG
Operating and Storage
T
e
mperature Range
-55 to +175
°
C
*Drain current limited by package.
Thermal Characteristics
Symbol
Parameter
Unit
FDP5800
0.62
R
θ
JC
R
θ
JA
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Junction to Ambient, Max.
o
C/W
62.5
©2006 Fairchild Semiconductor Corporation
FDP5800 Rev. C2
1
Package Marking and Ordering Information
Part Number
Top Mark
Package
Packing Method
Reel Size
Tape Width
Quantity
FDP5800
FDP5800
TO-220
Tube
N/A
N/A
50 units
Electrical Characteristics
T
C
= 25°C unless otherwise noted.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
Off Characteristics
B
VDSS
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate-Body Leakage Current, Forward
I
D
= 250
μ
A, V
GS
= 0 V, T
J
=25
o
C
60
—
—
—
—
—
—
1
V
μ
A
μ
A
nA
V
V
DS
= 48 V
GS
= 0 V
I
DSS
T
J
= 150
°
C
—
—
500
±100
I
GSS
V
GS
= ±20 V, V
DS
= 0 V
On Characteristics
V
GS(th)
Gate Threshold Voltage
V
GS
= V
DS
, I
D
= 250
μ
A
1.0
—
—
2.5
6.0
7.2
7.0
V
V
GS
= 10 V , I
D
= 80 A
4.6
5.9
5.6
m
Ω
m
Ω
m
Ω
V
GS
=4.5 V , I
D
= 80 A
V
GS
= 5 V , I
D
= 80 A
—
R
DS(on)
Static Drain-Source On Resistance
—
V
GS
=10
V
,
I
D
= 80 A,
T
J
= 175
o
C
—
10.4
12.6
m
Ω
Dynamic Characteristics
C
iss
Input Capacitance
—
6890
750
295
1.2
112
58
9160
pF
pF
pF
Ω
nC
nC
nC
nC
nC
nC
V
DS
= 15 V,V
GS
= 0 V,
f = 1 MHz
C
oss
C
rss
Output Capacitance
—
—
—
—
—
—
—
—
—
1000
445
—
Reverse Transfer Capacitance
Gate Resistance
R
G
V
GS
= 0.5 V, f = 1 MHz
V
GS
= 0 V to 10 V
V
GS
= 0 V to 5 V
Q
g(TOT)
Q
g(TH)
Q
g(TH)
Q
gs
T
o
tal Gate Charge at 10V
T
o
tal Gate Charge at 5V
Threshold Gate Charge
Gate to Source Gate Charge
Gate Charge Threshold to Plateau
Gate to Drain “Miller”
Charge
145
—
V
DS
= 30 V,
D
= 80 A,
I
g
= 1 mA
V
GS
= 0 V to 1 V
7.0
23
—
I
—
Q
gs2
Q
gd
13
—
18
—
Switching Characteristics
(V
GS
= 10V)
t
ON
t
d(on)
t
r
Turn-On Time
—
—
—
—
—
—
37
18
19
55
9
85
46
ns
ns
ns
ns
ns
ns
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall
Time
Turn-Off Time
V
DD
= 30
V
,
I
D
= 80 A,
GS
= 10 V, R
G
= 1.5
Ω
47
V
t
d(off)
t
f
120
28
t
OFF
64
138
Drain-Source Diode Characteristics
V
GS
= 0 V, I
SD
= 80 A
—
—
—
—
—
—
1.25
1.0
—
V
V
V
SD
Drain-Source Diode
Forward Voltage
V
GS
= 0 V, I
SD
= 40 A
t
rr
Reverse Recovery Time
58
106
ns
nC
V
GS
= 0 V, I
SD
= 60 A,
dI
F
/dt = 100 A/
μ
s
Q
rr
Reverse Recovery Charge
—
Notes:
o
1: L
= 1 mH, I
= 36 A, V
= 54 V, V
= 10 V, R
= 25
Ω
, Starting T
= 25 C
AS
DD
GS
G
J
©2006 Fairchild Semiconductor Corporation
FDP5800 Rev. C2
2
Typical Performance Characteristics
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
1000
400
V
DS
= 6V
* Notes :
1. 250
μ
s Pulse Test
2. T
C
= 25
o
C
100
100
150
o
C
10
25
o
C
V
GS
Top :
10.0 V
5.0 V
4.5 V
4.0 V
3.5 V
1
-55
o
C
10
5
Bottom :
3.0 V
0.1
0.1
1
1
2
3
4
5
3
0.03
V
GS
,Gate-Source Voltage[V]
V
DS
,Drain-Source Voltage[V]
Figure 3. On-Resistance Variation vs.
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperatue
Drain Current and Gate Voltage
5.5
5.0
4.5
4.0
1000
V
GS
= 0V
V
GS
= 10V
150
o
C
100
25
o
C
10
V
GS
= 20V
* Note : T
J
= 25
o
C
1
0.2
0
40
80
120
160
200
0.4
0.6
0.8
1.0
1.2
1.4
I
D
, Drain Current [A]
V
SD
, Body Diode Forward Voltage [V]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
10000
10
C
C
C
= C
+ C
(
C =
shorted
)
gs gd
ds
iss
V
DS
= 25V
9000
7500
6000
4500
3000
= C
+ C
ds gd
= C
gd
oss
rss
C
iss
V
DS
= 35V
8
6
4
2
0
V
DS
= 50V
* Note:
1. V
GS
= 0V
2. f = 1MHz
C
oss
C
rss
1500
100
* Note : I
D
= 80A
80 100
120
10
-1
10
0
10
1
V
DS
, Drain-Source Voltage [V]
30
0
20
40
60
Q
g
, Total Gate Charge [nC]
©2006 Fairchild Semiconductor Corporation
FDP5800 Rev. C2
3
Typical Performance Characteristics
(Continued)
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
1.2
1.1
1.0
0.9
2.4
2.0
1.6
1.2
* Notes :
1. V
GS
= 0V
0.8
* Notes :
1. V
GS
= 10V
2. I
D
= 250
μ
A
2. I
D
= 80A
0.8
-100
0.4
-80
-50
0
50
100
150
200
-40
0
40
80
120 160 200
o
T
J
, Junction Temperature
[
C
]
o
T
J
, Junction Temperature
[
C
]
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs. Case Temperature
500
125
CURRENT LIMITED
BY PACKAGE
100
μ
s
100
10
100
1ms
75
50
25
0
10ms
100ms
DC
Operation in This Area
is Limited by R
DS(on)
1
SINGLE PULSE
T
C
= 25
o
C
T
J
= 175
o
C
R
θ
JC
= 0.62
o
C/W
0.1
0.01
0.1
1
10
100
25
50
75
100
125
150
175
o
V
DS
, Drain-Source Voltage [V]
T
C
, Case Temperature
[
C
]
Figure 11. Transient Thermal Response Curve
1
0.1
D = 0.5
0.2
0.1
0.05
P
DM
0.02
t
1
t
2
0.01
0.01
* Notes :
1. Z
θ
JC
(t) = 0.62
o
C/W Max.
Single pulse
2. Duty Factor, D=t
1
/t
2
3. T
JM
– T
C
= P
DM
* Z
θ
JC
(t)
1E-3
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
10
2
t
1
, Square Wave Pulse Duration [sec]
©2006 Fairchild Semiconductor Corporation
FDP5800 Rev. C2
4
I
= const.
G
Figure 12. Gate Charge Test Circuit & Waveform
R
L
V
DS
90%
V
DS
V
DD
V
GS
R
G
10%
V
GS
DUT
V
GS
t
d(on)
t
r
t
d(off)
t
f
t
on
t
off
Figure 13. Resistive Switching Test Circuit & Waveforms
V
GS
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
©2006 Fairchild Semiconductor Corporation
FDP5800 Rev. C2
5
+
DUT
V
DS
_
I
SD
L
Driver
R
G
Same Type
as DUT
V
DD
V
GS
• dv/dt controlled by
R
G
• I
SD
controlled by pulse period
Gate Pulse Width
————————–
V
GS
D =
Gate Pulse Period
10V
( Driver )
I
FM
, Body Diode Forward Current
I
SD
di/dt
( DUT )
I
RM
Body Diode Reverse Current
Body Diode Recovery dv/dt
V
SD
V
DS
( DUT )
V
DD
Body Diode
Forward Voltage Drop
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
©2006 Fairchild Semiconductor Corporation
FDP5800 Rev. C2
6
Mechanical Dimensions
Figure 16. TO-220, Molded, 3-Lead, Jedec Variation AB
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
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ically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
©2006 Fairchild Semiconductor Corporation
FDP5800 Rev. C2
7
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Advance Information
Formative / In Design
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
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Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
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Full Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Not In Production
Rev. I66
©2006 Fairchild Semiconductor Corporation
FDP5800 Rev. C2
8
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specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
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designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
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