tvs3301
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TVS3301 33V
双向平缓钳位浪涌保护器件
1
特性
3
说明
TVS3301
器件可将高达
27A
的
IEC 61000-4-5
故障电
流进行分流
，
以保护系统免受高功率瞬态冲击或雷击。
该器件可通过
42
Ω 阻抗进行耦合的方式承受
1kV
的
IEC 61000-4-5
开路电压
，
满足常见的工业信号线路
EMC
要求。
TVS3301
使用反馈机制确保在故障期间发
挥精确的平缓钳位能力
，
使系统接触电压始终低于传统
TVS
二极管。精确的电压调节允许设计人员放心地选
择具有较低电压容差的系统组件
，
从而能够在不影响可
靠性的情况下降低系统成本和复杂度。
TVS3301
具有
±33V
的工作范围
，
可在需要反向接线情形防护的系统
中运行。
• 保护特性符合针对工业信号线路
的
1kV
、
42
Ω
IEC
61000-4-5
浪涌测试要求
• 双向极性可针对双极信号传输或误接线情形提供保
护
•
27A 8/20µs
浪涌电流下的钳位电压
为
40V
• 关断电压
：
±33V
•
3mm × 3mm
小
型
SON
封装
• 可耐受超
过
5,000
次
的
25A
8/20µs
浪涌电流的重复冲击
• 强大的浪涌保护
此外
，
TVS3301
采用小型
SON
封装
，
专为空间受限
的应用而设计
，
与标准
SMA
和
SMB
封装相比
，
其尺
寸显著减小。低器件泄露电流和电容确保最大限度地降
低了对受保护线路的影响。为了确保在产品的整个寿命
期间提供可靠保护
，
TI
在
125°C
的环境下
对
TVS3301
进行了
5000
次重复浪涌冲击测试
，
但器件性能未发生
任何变化。
–
IEC61000-4-5 (8/20µs)
：
27A
–
IEC61643-321 (10/1000µs)
：
3A
• 低泄漏电流
–
27°C
时的典型值
为
2.5nA
–
85°C
时的最大值
为
450nA
• 低电容
：
54pF
封装尺寸
（
标称值
）
器件型号
TVS3301
封装
• 集
成
4
级
IEC 61000-4-2 ESD
保护
SON (DRB, 8)
3.00mm × 3.00mm
2
应用
(1)
如需了解所有可用封装
，
请参阅数据表末尾的可订购产品附
录。
10
20
30
Time (
ꢀ
s)
Traditional TVS
TI Flat-Clamp
功能方框图
对
8/20µs
浪涌事件的电压钳位响应
本文档旨在为方便起见
，
提供有
关
TI
产品中文版本的信息
，
以确认产品的概要。有关适用的官方英文版本的最新信息
，
请访问
Table of Contents
4 Revision History
注
：
以前版本的页码可能与当前版本的页码不同
Changes from Revision A (December 2018) to Revision B (September 2022)
Page
Changes from Revision * (September 2018) to Revision A (December 2018)
Page
Copyright © 2022
T
e
xas Instruments Incorporated
2
5
说明
（
续
）
的平缓钳位浪涌保护技术
白皮书。
6 Device Comparison Table
DEVICE
V
rwm
5
V
clamp
at I
pp
9.2 V
I
pp
(8/20 µs)
43 A
Leakage at V
rwm
0.07 nA
0.25 nA
2 nA
POLARITY
Unidirectional
Bidirectional
Unidirectional
Bidirectional
Unidirectional
Bidirectional
Unidirectional
Bidirectional
Unidirectional
Bidirectional
Package
DRV (SON-6)
DRB (SON-8)
DRV (SON-6)
DRB (SON-8)
DRV (SON-6)
DRB (SON-8)
DRV (SON-6)
DRB (SON-8)
DRV (SON-6)
DRB (SON-8)
7
11 V
30 A
14
14
18
18
22
22
27
27
18.6 V
20.5 V
22.8 V
27.4 V
27.7 V
29.6 V
32.5 V
34 V
43 A
30 A
1.1 nA
40 A
0.3 nA
30 A
0.4 nA
40 A
3.2 nA
30 A
2 nA
40 A
1.7 nA
27 A
0.8 nA
DRV (SON-6), YZF
(WCSP)
33
33
38 V
40 V
35 A
27 A
19 nA
Unidirectional
Bidirectional
2.5 nA
DRB (SON-8)
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3
7 Pin Configuration and Functions
图
7-1. DRB Package,
8-Pin SON
(Top View)
表
7-1. Pin Functions
PIN
DESCRIPTION
NAME
DRB
IN
1, 2, 3, 4
5, 6, 7, 8
IN
GND
NC
Surge protected channel
Ground
GND
FLOAT
Exposed Thermal Pad
Exposed thermal pad must be floating.
(1) IN
= input, GND = ground, NC = no connection.
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4
8 Specifications
8.1 Absolute Maximum Ratings
MIN
MAX
±27
1100
±3
UNIT
A
IEC 61000-4-5 Current (8/20 µs)
IEC 61000-4-5 Power (8/20 µs)
Maximum Surge
W
IEC 61643-321 Current (10/1000 µs)
A
IEC 61643-321 Power (10/1000 µs)
120
±80
20
W
EFT
I
BR
IEC 61000-4-4 EFT Protection
DC Current
A
mA
°C
°C
T
A
Ambient Operating
T
e
mperature
Storage
T
e
mperature
125
150
−
40
−
65
T
stg
(1) Stresses
beyond those listed under
Absolute Maximum Rating
may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Condition
. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
8.2 ESD Ratings – JEDEC
VALUE
UNIT
Human body model (HBM), per ANSI/ESDA/
±2000
V
(ESD)
Electrostatic discharge
V
Charged device model (CDM), per JEDEC
±500
(1) JEDEC
document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC
document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
8.3 ESD Ratings – IEC
VALUE
UNIT
IEC 61000-4-2 contact discharge
IEC 61000-4-2 air-gap discharge
±8
V
(ESD)
Electrostatic discharge
kV
±15
8.4 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
V
RWM
Reverse Stand-Off Voltage
±33
V
8.5 Thermal Information
TVS3301
DRB (SON)
8 PINS
52.0
UNIT
R
qJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
R
qJC(top)
R
qJB
56.1
24.9
Y
JT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
2.1
Y
JB
24.8
R
qJC(bot)
9.8
(1) For
more information about traditional and new thermal metrics, see the
Semiconductor and IC Package Thermal Metrics
application
report.
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5
8.6 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
nA
Measured at V
IN
= ±V
RWM
, T
A
= 27°C
Measured at V
IN
= ±V
RWM
, T
A
= 85°C
I
IN
= ±1 mA
2.5
110
450
I
LEAK
V
BR
Leakage Current
Break-down Voltage
Clamp Voltage
34.4
37.5
40
V
±I
pp
IEC 61000-4-5 Surge (8/20 µs), V
IN
0 V before surge, T
A
= 27°C
=
42.5
43.2
V
CLAMP
V
21 A IEC 61000-4-5 Surge (8/20 µs), V
IN
=±V
RWM
before surge, T
A
= 125°C
Calculated from V
CLAMP
at .5*I
PP
and I
PP
surge current, T
A
= 25°C
R
DYN
C
IN
8/20 µs surge dynamic resistance
Input pin capacitance
35
54
m
Ω
V
IN
= V
RWM
, f = 1 MHz, 30 mV
pp
, IO to
GND
pF
0-±V
RWM
rising edge, sweep rise time and
measure slew rate when I
PEAK
= 1 mA, T
A
= 27°C
2.5
1.0
SR
Maximum Slew Rate
V/µs
0-±V
RWM
rising edge, sweep rise time and
measure slew rate when I
PEAK
= 1 mA, T
A
= 85°C
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6
8.7 Typical Characteristics
50
45
40
35
30
25
20
15
10
5
42
41.5
41
Voltage
Current
40.5
40
39.5
39
38.5
38
0
-5
-40 -25 -10
5
20 35 50 65 80 95
110 125
Temperature (
è
C)
0
10
20
30
40
50
Time (
m
s)
60
70
80
90 100
VCLA
TVS3
.
.
图
8-2. 8/20-µs Surge Clamping Response at 21 A
图
8-1. 8/20-µs Surge Response at 27 A
120
160
115
110
105
100
95
140
120
100
80
90
85
60
80
75
40
70
20
65
60
0
55
50
-20
0
5
10
15
20
25
30
35
-40
-20
0
20
40
60
80
100 120 140
V
IN
(V)
Temperature (
è
C)
TVS3
TVS3
f = 1 MHz, 30 mVpp, IO to GND
图
8-3. Capacitance vs Voltage Bias
.
图
8-4. Leakage Current vs Temperature at 33 V
40
39.5
39
30
24
18
12
6
38.5
38
37.5
37
36.5
36
35.5
35
0
-40
-20
0
20
40
60
80
100 120 140
-40 -25 -10
5
20 35 50 65 80 95
110 125
Temperature (
è
C)
Temperature (
è
C)
TVS3
Dera
.
.
图
8-5. Breakdown Voltage (1 mA) vs Temperature
图
8-6. Maximum Surge Current (8/20 µs) vs Temperature
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7
8.7 Typical Characteristics (continued)
8
-40
è
C
25
è
C
7.5
7
6.5
6
5.5
5
85
è
C
105
è
C
125
è
C
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
0
0.5
1
1.5
Slew Rate (V/
m
s)
2
2.5
3
D009
.
图
8-7. Dynamic Leakage vs Signal Slew Rate Across Temperature
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8
9 Detailed Description
9.1 Overview
The TVS3301 is a bidirectional precision clamp with two integrated FE
T
s
d
riven by a feedback loop to tightly
regulate the input voltage during an overvoltage event. This feedback loop leads to a very low dynamic
resistance, giving a flat clamping voltage during transient overvoltage events like a surge.
9.2 Functional Block Diagram
9.3 Feature Description
The TVS3301 is a precision clamp that handles 27 A of IEC 61000-4-5 8/20-µs surge pulse. The flat clamping
feature helps keep the clamping voltage very low to keep the downstream circuits from being stressed. The flat
clamping feature can also help end-equipment designers save cost by opening up the possibility to use lower-
cost, lower voltage tolerant downstream ICs. This device provides a bidirectional operating range, with a
symmetrical V
RWM
of ±33 V designed for applications that have bipolar input signals or that must withstand
reverse wiring conditions. The TVS3301 has minimal leakage at V
RWM
, designed for applications where low
leakage and power dissipation is a necessity. Built-in IEC 61000-4-2 and IEC 61000-4-4 ratings make it a robust
protection solution for ESD and EFT events and the TVS3301 wide ambient temperature range of
–
40°C to
+125°C enables usage in harsh industrial environments.
9.4 Device Functional Modes
9.4.1 Protection Specifications
The TVS3301 is specified according to both the IEC 61000-4-5 and IEC 61643-321 standards. This enables
usage in systems regardless of which standard is required by relevant product standards or best matches
measured fault conditions. The IEC 61000-4-5 standard requires protection against a pulse with a rise time of 8
µs and a half-length of 20 µs, while the IEC 61643-321 standard requires protection against a much longer pulse
with a rise time of 10 µs and a half-length of 1000 µs.
The positive and negative surges are imposed to the TVS3301 by a combination wave generator (CWG) with a
2-
Ω
coupling resistor at different peak voltage levels. For powered-on transient tests that need power supply
bias, inductances are used to decouple the transient stress and protect the power supply. The TVS3301 is post-
tested by assuring that there is no shift in device breakdown or leakage at V
RWM
.
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9
In addition, the TVS3301 has been tested according to IEC 61000-4-5 to pass a ±1-kV surge test through a 42-
Ω
coupling resistor and a 0.5-µF capacitor. This test is a common test requirement for industrial signal I/O lines
and the TVS3301 precision clamp can be used in applications that have that requirement.
The TVS3301 integrates IEC 61000-4-2 level 4 ESD Protection and 80 A of IEC 61000-4-4 EFT Protection.
These combine to ensure that the device can protect against most common transient test requirements.
For more information on TI’s test methods for Surge, ESD, and EFT testing, refer to the
IEC 61000-4-x Tests for
TI’s Protection Devices
application report.
9.4.2 Reliability Testing
To
e
nsure device reliability, the TVS3301 is characterized against 5000 repetitive pulses of 25-A IEC 61000-4-5
8/20-µs surge pulses at 125°C. The test is performed with less than 10 seconds between each pulse at high
temperature to simulate worst-case scenarios for fault regulation. After each surge pulse, the TVS3301 clamping
voltage, breakdown voltage, and leakage are recorded to ensure that there is no variation or performance
degradation. By ensuring robust, reliable, high temperature protection, the TVS3301 enables fault protection in
applications that must withstand years of continuous operation with no performance change.
9.4.3 Minimal Derating
Unlike traditional diodes, the TVS3301 has very little derating of maximum power dissipation and ensures robust
performance up to 125°C, shown in
图
8-6
. Traditional TVS diodes lose up to 50% of their current carrying
capability when at high temperatures, so a surge pulse above 85°C ambient can cause failures that are not seen
at room temperature. The TVS3301 prevents this so the designer can see the surge protection regardless of
temperature. Because of this, Flat-Clamp devices can provide robust protection against surge pulses that occur
application report.
9.4.4 Bidirectional Operation
The TVS3301 is a bidirectional TVS with a symmetrical operating region. This allows for operation with positive
and negative voltages, rather than just positive voltages like the unidirectional TVS3300. This allows for single
chip protection for applications where the signal is expected to operate below 0 V or where there is a need to
withstand a large common-mode voltage. In addition, there is a system requirement to be able to withstand
reverse wiring conditions, in many cases where a high voltage signal is accidentally applied to the system
ground and a ground is accidentally applied to the input terminal. This causes a large reverse voltage on the
TVS diode that the device must be able to withstand. The TVS3301 is designed to not break down or see
failures under reverse wiring conditions for applications that must withstand these miswiring issues.
备注
If the applied signal is not expected to go below 0
V
, a
u
nidirectional device will clamp much lower in
the reverse direction and should be used. In this case, the recommended device would be the
TVS3300.
9.4.5 Transient Performance
During large transient swings, the TVS3301 will begin clamping the input signal to protect downstream
conditions. While this prevents damage during fault conditions, it can cause leakage when the intended input
signal has a fast slew rate.
T
o
k
eep power dissipation low and remove the chance of signal distortion, TI
recommendeds that the designer keep the slew rate of any input signal on the TVS3301 below 2.5 V/µs at room
temperature and below 1.0 V/µs at 85°C shown in
图
8-7
. Faster slew rates will cause the device to clamp the
input signal and draw current through the device for a few microseconds, increasing the rise time of the signal.
This will not cause any harm to the system or to the device, however, it can cause device overheating if the fast
input voltage swings occur regularly.
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10
10 Application and Implementation
备注
以下应用部分中的信息不属
于
TI
器件规格的范围
，
TI
不担保其准确性和完整性。
TI
的客 户应负责确定
器件是否适用于其应用。客户应验证并测试其设计
，
以确保系统功能。
10.1 Application Information
The TVS3301 can be used to protect any power, analog, or digital signal from transient fault conditions caused
by the environment or other electrical components. One common example is using the TVS3301 to protect both
sides of a PLC module and a sensor transmitter, as shown in the following figure. The transmitter side of this will
be examined in more detail in the following section.
图
10-1. TVS3301 Application Example
10.2 Typical Application
图
10-2. TVS3301 Application Schematic
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11
10.2.1 Design Requirements
A typical operation for the TVS3301 would be protecting an analog output module on a PLC similar to
图
10-2
. In
this example, the TVS3301 is protecting a 4-20 mA transmitter that uses the XTR115, a standard transmitter that
has a nominal voltage of 24 V and a maximum input voltage of 40
V
.
M
ost industrial interfaces such as this
require protection against ±1 kV surge test through a 42-
Ω
coupling resistor and a 0.5-µF capacitor, equaling
roughly 24 A of surge current. The system also requires protection from reverse wiring conditions. Without any
input protection, this input voltage will rise to hundreds of volts for multiple microseconds, and violate the
absolute maximum input voltage and harn the device if a surge event is caused by lightning, coupling, ringing, or
any other fault condition. TI’s Flat-Clamp technology provides surge protection diodes that can maximize the
useable voltage range and clamp at a safe level for the system.
10.2.2 Detailed Design Procedure
If the TVS3301 is in place to protect the device, the voltage will rise to the breakdown of the diode at 37.5
V
,
during a surge event. The TVS3301 will then turn on to shunt the surge current to ground. With the low dynamic
resistance of the TVS3301, large amounts of surge current will have minimal impact on the clamping voltage.
The dynamic resistance of the TVS3301 is around 35 m
Ω
, which means a 24-A surge current will cause a
voltage raise of 24 A × 35 m
Ω
= 0.84
V
.
B
ecause the device turns on at 37.5
V
,
t
his means the XTR115 input will
be exposed to a maximum of 37.5 V + 0.84 V = 38.34 V during surge pulses, well within the absolute maximum
input voltage to ensure robust protection of the circuit.
Because the TVS3301 is a bidirectional device, it also satisfies the condition for withstanding reverse wiring. In
this case, if V
LOOP
is wired in reverse, the input terminal of the TVS3301 will see
–
24
V
,
w
hich is below the
negative V
RWM
. The leakages will be the same as if the battery is wired properly.
The small size of the device also improves fault protection by lowering the effect of fault current coupling onto
neighboring traces. The small form factor of the TVS3301 allows the device to be placed extremely close to the
input connector, which lowers the length of the path fault current going through the system compared to larger
protection solutions. Finally, the low leakage of the TVS3301 will have low input power losses. At 33 V, the
device will see typical 2.5-nA leakage for a constant power dissipation of less than 100 µW, a small quantity that
will minimally effect overall efficiency metrics and heating concerns.
10.2.3 Application Curves
50
Voltage
Current
45
40
35
30
25
20
15
10
5
0
-5
0
10
20
30
40
50
Time (
m
s)
60
70
80
90 100
TVS3
图
10-3. TVS3301 Clamping Waveform (27-A, 8/20-µs Surge)
10.2.4 PLC Surge Protection Reference Design
For a detailed description of the Flat-Clamp devices advantages in a PLC Analog Input Module, reference TI’s
Surge Protection Reference Design for PLC Analog Input Module
. This document describes the considerations
and performance of the TVS3300 in a common industrial application. While the document does not reference the
TVS3301 specifically, performance between the devices should be similar.
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12
11 Power Supply Recommendations
The TVS3301 is a clamping device so there is no need to power it.
T
o
e
nsure the device functions properly do
not violate the recommended V
IN
voltage range (
–
33 V to 33 V).
12 Layout
12.1 Layout Guidelines
The optimum placement is close to the connector. EMI during an ESD event can couple from the tested trace to
other nearby unprotected traces, which could result in system failures. The PCB designer must minimize the
possibility of EMI coupling by keeping all unprotected traces away from protected traces between the TVS and
the connector. Route the protected traces straight. Use rounded corners with the largest radii possible to
eliminate any sharp corners on the protected traces between the TVS3301 and the connector. Electric fields
tend to build up on corners, which could increase EMI coupling.
Ensure that the thermal pad on the layout is floating rather than grounded. Grounding the thermal pad will
impede the operating range of the TVS3301, and can cause failures when the applied voltage is negative. A
floating thermal pad allows the maximum operating range without sacrificing any transient performance.
12.2 Layout Example
图
12-1. TVS3301 Layout
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13
13 Device and Documentation Support
13.1 Documentation Support
13.1.1 Related Documentation
For related documentation, see the following:
•
T
e
xas Instruments,
Flat-Clamp Surge Protection
T
e
chnology for Efficient System Protection
white papers
13.2
接收文档更新通知
改摘要。有关更改的详细信息
，
请查看任何已修订文档中包含的修订历史记录。
13.3
支持资源
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成
TI
技术规范
，
并且不一定反映
TI
的观点
；
请参阅
13.4 Trademarks
TI E2E
™
is a trademark of
T
e
xas Instruments.
所有商标均为其各自所有者的财产。
13.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD.
T
e
xas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
13.6
术语表
本术语表列出并解释了术语、首字母缩略词和定义。
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2022
T
e
xas Instruments Incorporated
14
PACKAGE OPTION ADDENDUM
8-Oct-2021
PACKAGING INFORMATION
Orderable Device
Status Package
Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TVS3301DRBR
ACTIVE
SON
DRB
8
3000 RoHS
& Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
1PQP
(1)
The marketing status values are defined as follows:
ACTIVE:
Product device recommended for new designs.
LIFEBUY:
TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND:
Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW:
Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE:
TI has discontinued the production of the device.
(2)
RoHS:
TI defines “RoHS” to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, “RoHS” products are suitable for use in specified lead-free processes. TI may
reference these types of products as “Pb-Free”.
RoHS Exempt:
TI defines “RoHS Exempt” to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green:
TI defines “Green” to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. – The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a “~” will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material – Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:
The information provided on this page represents TI’s knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI’s liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
17-Apr-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension
designed to accommodate the component width
B0 Dimension
designed to accommodate the component length
K0 Dimension
designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch
between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width
(mm) (mm) (mm) (mm) (mm)
Quadrant
(mm) W1
(mm)
TVS3301DRBR
SON
DRB
8
3000
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
17-Apr-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SON DRB
SPQ
Length (mm)
Width (mm)
Height (mm)
338.0 355.0
50.0
TVS3301DRBR
8
3000
Pack Materials-Page 2
PACKAGE OUTLINE
DRB0008A
VSON – 1 mm max height
SCALE 4.000
PLASTIC SMALL OUTLINE – NO LEAD
3.1
2.9
B
A
PIN 1 INDEX AREA
3.1
2.9
C
1 MAX
SEATING PLANE
0.08 C
0.05
0.00
DIM A
OPT 1
(0.1)
OPT 2
(0.2)
1.5 0.1
4X (0.23)
EXPOSED
THERMAL PAD
(DIM A) TYP
4
5
2X
1.95
1.75 0.1
8
1
6X 0.65
0.37
0.25
8X
PIN 1 ID
0.1
C A B
C
(OPTIONAL)
(0.65)
0.05
0.5
0.3
8X
4218875/A 01/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
EXAMPLE BOARD LAYOUT
DRB0008A
VSON – 1 mm max height
PLASTIC SMALL OUTLINE – NO LEAD
(1.5)
(0.65)
SYMM
8X (0.6)
(0.825)
8
8X (0.31)
1
SYMM
(1.75)
(0.625)
6X (0.65)
4
5
(R0.05) TYP
(
0.2) VIA
(0.23)
TYP
(0.5)
(2.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:20X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
EXPOSED
METAL
EXPOSED
METAL
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4218875/A 01/2018
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
EXAMPLE STENCIL DESIGN
DRB0008A
VSON – 1 mm max height
PLASTIC SMALL OUTLINE – NO LEAD
(0.65)
4X (0.23)
SYMM
METAL
TYP
8X (0.6)
4X
(0.725)
8
1
8X (0.31)
(2.674)
(1.55)
SYMM
6X (0.65)
4
5
(R0.05) TYP
(1.34)
(2.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD
84% PRINTED SOLDER COVERAGE BY AREA
SCALE:25X
4218875/A 01/2018
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
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