Vishay-Intertech-IRFBG20PBF
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IRFBG20
Vishay Siliconix
Power MOSFET
FEATURES
D
• Dynamic dV/dt rating
TO-220AB
• Repetitive avalanche rated
• Fast switching
Available
• Ease of paralleling
G
• Simple drive requirements
• Material
categorization: for definitions of compliance
S
D
S
G
Note
N-Channel MO
S
FET
*
This datasheet provides information about parts that are
RoHS-compliant and / or parts that are non RoHS-compliant.
For
example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details
PRODUCT SUMMARY
V
DS
(V)
1000
DESCRIPTION
R
DS(on)
(
Ω
)
V
GS
= 10 V
11
Third generation power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
Q
g
max. (nC)
38
4.9
Q
gs
(nC)
gd
(nC)
Q
22
The TO-220AB package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 W. The low thermal resistance
and low package cost of the TO-220AB contribute to its
wide acceptance throughout the industry.
Configuration
Single
ORDERING INFORMATION
Package
TO-220AB
Lead (Pb)-free
IRFBG20PbF
IRFBG20PbF-BE3
Lead (Pb)-free and halogen-free
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
1000
20
UNIT
Drain-source voltage
Gate-source voltage
V
DS
V
V
GS
T
C
= 25 °C
1.4
Continuous drain current
V
GS
at 10 V
I
D
T
C
= 100 °C
0.86
5.6
A
Pulsed drain current
a
I
DM
Linear derating factor
0.43
200
W/°C
mJ
A
Single pulse avalanche energy
b
Repetitive avalanche current
a
Repetitive avalanche energy
a
Maximum power dissipation
E
AS
I
AR
1.4
E
AR
5.4
mJ
W
T
C
= 25 °C
P
D
54
Peak diode recovery dV/dt
c
dV/dt
T
J
, T
stg
1.0
V/ns
Operating junction and storage temperature range
Soldering recommendations (peak temperature)
d
-55 to +150
300
°C
For 10 s
10
lbf · in
N · m
Mounting torque
6-32 or M3 screw
1.1
Notes
a. Repetitive
rating; pulse width limited by maximum junction temperature (see fig. 11)
b. V
DD
= 50 V, starting T
J
= 25 °C, L = 193 μH, R
g
= 25
Ω
, I
AS
= 1.4 A (see fig. 12)
c. I
SD
≤
1.4 A, dI/dt
≤
60 A/μs, V
DD
≤
600, T
J
≤
150 °C
d. 1.6
mm from case
S21-0883-Rev. D, 30-Aug-2021
Document Number: 91123
1
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
IRFBG20
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
62
UNIT
Maximum junction-to-ambient
Case-to-sink, flat, greased surface
Maximum junction-to-case (drain)
R
thJA
R
thCS
R
thJC
–
0.50
–
–
°C/W
2.3
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX. UNIT
Static
Drain-source breakdown voltage
V
DS
Δ
V
DS
/T
J
V
GS(th)
I
GSS
V
GS
= 0 V, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 μA
1000
–
1.2
–
–
V
V/°C
V
V
DS
temperature coefficient
–
2.0
–
–
Gate-source threshold voltage
Gate-source leakage
4.0
100
100
500
11
–
V
GS
V
DS
= 1000 V, V
GS
= 0 V
V
DS
= 800 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
I
D
= 0.84 A
b
V
DS
= 50 V, I
D
= 0.84 A
b
=
20 V
–
nA
–
–
Zero gate voltage drain current
I
DSS
μA
–
–
Drain-source on-state resistance
Forward transconductance
Dynamic
R
DS(on)
g
fs
–
–
Ω
1.0
–
S
Input capacitance
C
iss
C
oss
C
rss
–
–
–
500
52
–
–
–
V
GS
= 0 V,
DS
= 25 V,
f = 1.0 MHz, see fig. 5
Output capacitance
V
pF
Reverse transfer capacitance
17
Total gate charge
Gate-source charge
Gate-drain charge
Q
g
Q
gs
Q
gd
–
–
–
–
–
–
38
4.9
22
I
D
= 1.4 A, V
DS
= 400 V,
see fig. 6 and 13
b
V
GS
= 10 V
nC
Turn-on delay time
Rise time
t
d(on)
t
r
t
d(off)
t
f
–
–
–
–
9.4
17
58
31
–
–
–
–
V
DD
= 500 V, I
D
= 1.4 A,
ns
R
g
= 18
Ω
, R
D
= 370
Ω
, see fig. 10
b
Turn-off delay time
Fall time
D
Between lead,
Internal drain inductance
Internal source inductance
L
D
–
4.5
–
6 mm (0.25″) from
package and center of
die contact
nH
G
L
S
R
g
–
7.5
–
–
S
Gate input resistance
f = 1 MHz, open drain
0.6
3.4
Ω
Drain-Source Body Diode Characteristics
MOSFET symbol
showing the
integral reverse
p – n junction diode
D
Continuous source-drain diode current
Pulsed diode forward current
a
I
S
–
–
–
–
1.4
5.6
A
G
I
SM
S
Body diode voltage
V
SD
t
rr
T
J
= 25 °C, I
S
= 1.4 A, V
GS
= 0 V
b
–
–
–
–
1.5
190
0.69
V
Body diode reverse recovery time
Body diode reverse recovery charge
Forward turn-on time
130
0.46
ns
μC
T
J
= 25 °C, I
F
= 1.4 A, dI/dt = 100 A/μs
b
Q
rr
t
on
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
Notes
a. Repetitive
rating; pulse width limited by maximum junction temperature (see fig. 11)
b. Pulse
width
≤
300 μs; duty cycle
≤
2 %
S21-0883-Rev. D, 30-Aug-2021
Document Number: 91123
2
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
IRFBG20
Vishay Siliconix
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
Fig. 1 –
Typical Output Characteristics, T
C
= 25 °C
Fig. 3 – Typical Transfer Characteristics
Fig. 2 – Typical Output Characteristics, T
C
= 150 °C
Fig. 4 – Normalized On-Resistance vs. Temperature
S21-0883-Rev. D, 30-Aug-2021
Document Number: 91123
3
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
IRFBG20
Vishay Siliconix
Fig. 7 – Typical Source-Drain Diode Forward Voltage
Fig. 5 – Typical Capacitance vs. Drain-to-Source Voltage
Fig. 8 – Maximum Safe Operating Area
Fig. 6 – Typical Gate Charge vs. Gate-to-Source Voltage
S21-0883-Rev. D, 30-Aug-2021
Document Number: 91123
4
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
IRFBG20
Vishay Siliconix
R
D
V
DS
V
GS
D.U.T.
R
G
+
–
V
DD
10 V
Pulse width
≤
1 µs
Duty factor
≤
0.1 %
Fig. 10a – Switching Time Test Circuit
V
DS
90 %
10 %
V
GS
Fig. 9 – Maximum Drain Current vs. Case Temperature
t
d(on)
t
r
t
d(off)
t
f
Fig. 10b – Switching Time Waveforms
Fig. 11 – Maximum Effective Transient Thermal Impedance, Junction-to-Case
L
V
DS
V
DS
Vary t
p
to obtain
required I
AS
t
p
V
DD
D.U.T
R
G
+
–
V
DD
V
DS
I
AS
A
10 V
0.01
Ω
t
p
I
AS
Fig. 12a – Unclamped Inductive Test Circuit
Fig. 12b – Unclamped Inductive Waveforms
S21-0883-Rev. D, 30-Aug-2021
Document Number: 91123
5
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
IRFBG20
Vishay Siliconix
Fig. 12c – Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 k
Ω
Q
G
10 V
12 V
0.2 µF
0.3 µF
Q
GS
Q
GD
+
V
DS
D.U.T.
–
V
G
V
GS
3 mA
Charge
I
G
I
D
Current sampling resistors
Fig. 13a – Basic Gate Charge Waveform
Fig. 13b – Gate Charge Test Circuit
S21-0883-Rev. D, 30-Aug-2021
Document Number: 91123
6
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
IRFBG20
Vishay Siliconix
Peak Dio
d
e Recovery
d
V/
d
t Test Circuit
+
Circuit layout con
s
ideration
s
•
Low
s
tray inductance
•
G
round plane
D.U.T.
•
Low leakage inductance
current tran
s
former
–
+
–
–
+
R
g
•
dV/dt controlled by R
g
•
Driver
s
ame type a
s
D.U.T.
•
I
S
D
controlled by duty factor “D”
•
D.U.T. – device under te
s
t
+
–
V
DD
Driver gate drive
P.W.
P.W.
D =
Period
Period
V
GS
= 10 V
a
D.U.T. l
S
D
waveform
D.U.T. V
D
S
waveform
Rever
s
e
recovery
current
Body diode forward
current
dI/dt
Diode recovery
dV/dt
V
DD
Re-applied
voltage
Body diode forward drop
Inductor current
I
S
D
Ripple
≤
5 %
Note
a. V
GS
= 5 V for logic level device
s
Fig. 14 – For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
S21-0883-Rev. D, 30-Aug-2021
Document Number: 91123
7
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
Package Information
Vishay Siliconix
TO-220-1
A
E
F
Ø P
1
3
2
*
M
b(1)
C
b
e
J(1)
e(1)
MILLIMETERS
INCHES
DIM.
MIN.
4.24
0.69
1.14
0.36
14.33
9.96
2.41
4.88
1.14
6.10
2.41
13.36
3.33
3.53
2.54
MAX.
4.65
1.02
1.78
0.61
15.85
10.52
2.67
5.28
1.40
6.71
2.92
14.40
4.04
3.94
3.00
MIN.
MAX.
0.183
0.040
0.070
0.024
0.624
0.414
0.105
0.208
0.055
0.264
0.115
0.567
0.159
0.155
0.118
A
b
0.167
0.027
0.045
0.014
0.564
0.392
0.095
0.192
0.045
0.240
0.095
0.526
0.131
0.139
0.100
b(1)
c
D
E
e
e(1)
F
H(1)
J(1)
L
L(1)
Ø P
Q
ECN: E21-0621-Rev. D, 04-Nov-2021
DWG: 6031
Note
M* = 0.052 inches to 0.064 inches (dimension including protrusion), heatsink hole for HVM
•
Revison: 04-Nov-2021
Document Number: 66542
1
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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Vishay
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular product
with the properties described in the product specification is suitable for use in a particular application. Parameters provided in
datasheets and / or specifications may vary in different applications and performance may vary over time. All operating
parameters, including typical parameters, must be validated for each customer application by the customer’s technical experts.
Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited
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© 2022 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED
Revision: 01-Jan-2022
Document Number: 91000
1
