Nexperia-BSH203-215
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Philips Semiconductors
Product specification
P-channel enhancement mode
MOS transistor
BSH203
FEATURES
SYMBOL
QUICK REFERENCE DATA
s
• Very low threshold voltage
• Fast switching
V
DS
= -30 V
• Logic level compatible
• Subminiature surface mount
package
I
D
= -0.47 A
g
R
DS(ON)
≤
1.1
Ω
(V
GS
= -2.5 V)
V
GS(TO)
≥
0.4 V
d
GENERAL DESCRIPTION
PINNING
SOT23
P-channel, enhancement mode,
logic level, field-effect power
transistor. This device has low
threshold voltage and extremely
fast switching making it ideal for
battery powered applications and
high speed digital interfacing.
PIN
DESCRIPTION
3
1
2
3
gate
Top view
source
drain
1
2
The BSH203 is supplied in the
SOT23
subminiature
surface
mounting package.
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
DS
V
DGR
V
GS
I
D
Drain-source voltage
–
–
–
–
–
–
–
–
-30
-30
±
8
-0.47
-0.3
-1.9
0.417
0.17
150
V
V
V
A
A
Drain-gate voltage
Gate-source voltage
Drain current (DC)
R
GS
= 20 k
Ω
T
a
= 25 ˚C
T
a
= 100 ˚C
T
a
= 25 ˚C
T
a
= 25 ˚C
T
a
= 100 ˚C
I
DM
P
tot
Drain current (pulse peak value)
Total power dissipation
A
W
W
˚C
T
stg
, T
j
Storage & operating temperature
– 55
THERMAL RESISTANCES
SYMBOL PARAMETER
CONDITIONS
TYP.
MAX.
UNIT
R
th j-a
Thermal resistance junction to
ambient
FR4 board, minimum
footprint
300
–
K/W
August 1998
1
Rev 1.000
Philips Semiconductors
Product specification
P-channel enhancement mode
MOS transistor
BSH203
ELECTRICAL CHARACTERISTICS
T
j
= 25˚C
unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN. TYP.
MAX. UNIT
V
(BR)DSS
V
GS(TO)
R
DS(ON)
Drain-source breakdown
voltage
Gate threshold voltage
V
GS
= 0 V; I
D
= -10
µ
A
-30
–
–
V
V
DS
= V
GS
; I
D
= -1 mA
-0.4 -0.68
-0.1
–
–
–
–
–
–
V
V
Ω
Ω
Ω
T
j
= 150˚C
–
Drain-source on-state
resistance
V
GS
= -4.5 V; I
D
= -280 mA
V
GS
= -2.5 V; I
D
= -280 mA
0.66
0.92
1.1
1.4
1.0
0.9
1.1
1.2
1.65
–
V
GS
= -1.8 V; I
D
= -140 mA
V
GS
= -2.5 V; I
D
= -280 mA; T
j
= 150˚C
Ω
S
g
fs
Forward transconductance
V
DS
= -24 V; I
D
= -280 mA
0.3
I
GSS
I
DSS
Gate source leakage current
V
GS
=
±
8 V; V
DS
= 0 V
–
–
–
±
10
±
100
nA
nA
µ
A
Zero gate voltage drain
current
V
DS
= -24 V; V
GS
= 0 V;
-50
-100
-10
T
j
= 150˚C
-1.3
Q
g(tot)
Q
gs
Q
gd
Total gate charge
Gate-source charge
Gate-drain (Miller) charge
I
D
= -0.5 A; V
DD
= -10 V; V
GS
= -4.5 V
–
–
–
2.2
0.4
0.25
–
–
–
nC
nC
nC
t
d on
t
r
t
d off
t
f
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
V
DD
= -10 V; I
D
= -0.5 A;
V
GS
= -8 V; R
G
= 6
Ω
Resistive load
–
–
–
–
2
–
–
–
–
ns
ns
ns
ns
4.5
45
20
C
iss
C
oss
C
rss
Input capacitance
Output capacitance
Feedback capacitance
V
GS
= 0 V; V
DS
= -24 V; f = 1 MHz
–
–
–
110
27
7
–
–
–
pF
pF
pF
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
T
j
= 25˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN. TYP.
MAX. UNIT
I
DR
Continuous reverse drain
current
T
a
= 25 ˚C
–
–
-0.47
A
I
DRM
V
SD
Pulsed reverse drain current
Diode forward voltage
–
–
–
-1.9
-1.3
A
V
I
F
= -0.38 A; V
GS
= 0 V
-0.87
t
rr
Q
rr
Reverse recovery time
Reverse recovery charge
I
F
= -0.5 A; -dI
F
/dt = 100 A/
µ
s;
V
GS
= 0 V; V
R
= -24 V
–
–
27
28
–
–
ns
nC
August 1998
2
Rev 1.000
Philips Semiconductors
Product specification
P-channel enhancement mode
MOS transistor
BSH203
Normalised Power Dissipation, PD (%)
120
Peak Pulsed Drain Current, IDM (A)
D = 0.5
1000
100
10
100
80
60
40
20
0
0.2
0.1
0.05
0.02
single pulse
P
D = tp/T
D
tp
1
T
0.1
0
25
50
75
100
125
150
1E-06 1E-05 1E-04 1E-03 1E-02 1E-01 1E+00
1E+01
Pulse width, tp (s)
Ambient Temperature, Ta (C)
Fig.1. Normalised
power dissipation.
PD% = 100 P
D
/P
D 25 ˚C
= f(T
a
)
Fig.4. Transient
thermal impedance.
Z
th j-a
= f(t); parameter D = t
p
/T
BSH203
Drain current, ID (A)
Tj = 25 C
Normalised Drain Current, ID (%)
-3
-2.5
-2
120
100
80
60
40
20
0
-4.5 V
-2.5 V
-1.5
-1
-2.2 V
-2 V
-1.8 V
-1.6 V
-1.4 V
VGS = -1.2 V
-0.5
0
0
25
50
75
100
125
150
0
-0.5
-1
-1.5
-2
Ambient Temperature, Ta (C)
Drain-Source Voltage, VDS (V)
Fig.2. Normalised
continuous drain current.
ID% = 100 I
D
/I
D 25 ˚C
= f(T
a
); conditions: V
GS
≤
-10 V
Fig.5. Typical
output characteristics, T
j
= 25 ˚C
.
I
D
= f(V
DS
); parameter V
GS
BSH203
Tj = 25 C
Drain-Source On Resistance, RDS(on) (Ohms)
3
2.8
2.6
2.4
2.2
2
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
BSH203
tp = 10us
Peak Pulsed Drain Current, IDM (A)
RDS(on) = VDS/ ID
-1.3 V
-1.1 V
-1.5 V
10
1
-1.2 V
-1.4 V
-1.6 V
-1.8 V
100 us
1 ms
10 ms
0.1
100 ms
-2.5 V
d.c.
VGS = -4.5V
0.01
0.001
0.1
1
10
100
0
-0.2
-0.4
-0.6
-0.8
-1
-1.2
-1.4
Drain Current, ID (A)
Drain-Source Voltage, VDS (V)
Fig.3. Safe
operating area. T
a
= 25 ˚C
I
D
& I
DM
= f(V
DS
); I
DM
single pulse; parameter t
p
Fig.6. Typical
on-state resistance, T
j
= 25 ˚C
.
R
DS(ON)
= f(I
D
); parameter V
GS
August 1998
3
Rev 1.000
Philips Semiconductors
Product specification
P-channel enhancement mode
MOS transistor
BSH203
Drain Current, ID (A)
-2.6
BSH203
Threshold Voltage, VGS(to), (V)
typical
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-2.4
VDS > ID X RDS(on)
-2.2
-2
-1.8
-1.6
-1.4
-1.2
-1
-0.8
-0.6
-0.4
-0.2
0
Tj = 25 C
150 C
minimum
0
25
50
75
100
125
150
0
-0.5
-1
-1.5
-2
-2.5
-3
-3.5
Junction Temperature, Tj (C)
Gate-Source Voltage, VGS (V)
Fig.7. Typical
transfer characteristics.
I
D
= f(V
GS
)
Fig.10. Gate
threshold voltage.
GS(TO)
= f(T
j
); conditions: I
D
= 1 mA; V
DS
= V
GS
V
Transconductance, gfs (S)
VDS > ID X RDS(on)
BSH203
BSH203
Drain Current, ID (A)
2
1.8
1.6
1.4
1.2
1
1E-01
1E-02
1E-03
1E-04
1E-05
1E-06
1E-07
VDS = -5 V
Tj = 25 C
Tj = 25 C
150 C
0.8
0.6
0.4
0.2
0
0
-0.2 -0.4 -0.6 -0.8
-1 -1.2
-1.4 -1.6 -1.8
-2 -2.2
-2.4 -2.6
Drain Current, ID (A)
-1 -0.9
-0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1
Gate-Source Voltage, VGS (V)
0
Fig.8. Typical
transconductance, T
j
= 25 ˚C
.
g
fs
= f(I
D
)
Fig.11. Sub-threshold
drain current.
I
D
= f(V
GS)
; conditions: T
j
= 25 ˚C
BSH203
Capacitances, Ciss, Coss, Crss (pF)
Normalised Drain-Source On Resistance
1000
100
10
2
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1
RDS(ON) @ Tj
-2.5 V
RDS(ON) @ 25C
VGS = -4.5 V
Ciss
-1.8 V
Coss
Crss
0.9
0.8
0.7
0.6
0.5
1
0
25
50
75
100
125
150
-0.1
-1.0
-10.0
-100.0
Junction Temperature, Tj (C)
Drain-Source Voltage, VDS (V)
Fig.9. Normalised
drain-source on-state resistance.
R
DS(ON)
/R
DS(ON)25 ˚C
= f(T
j
)
Fig.12. Typical
capacitances, C
iss
, C
oss
, C
rss
.
C = f(V
DS
); conditions: V
GS
= 0 V; f = 1 MHz
August 1998
4
Rev 1.000
Philips Semiconductors
Product specification
P-channel enhancement mode
MOS transistor
BSH203
BSH203
BSH203
Source-Drain Diode Current, IF (A)
Gate-Source Voltage, VGS (V)
-7
5
4.5
4
VDD = 10 V
RD = 20 Ohms
-6
Tj = 25 C
-5
3.5
3
-4
-3
-2
-1
0
2.5
2
150 C
Tj = 25 C
1.5
1
0.5
0
0
0.5
1
1.5
2
2.5
3
0
0.5
1
1.5
2
2.5
Gate Charge, Qg (nC)
Drain-Source Voltage, VSDS (V)
Fig.13. Typical
turn-on gate-charge characteristics.
V
GS
= f(Q
G
)
Fig.14. Typical
reverse diode current.
I
F
= f(V
SDS
); conditions: V
GS
= 0 V; parameter T
j
August 1998
5
Rev 1.000
Philips Semiconductors
Product specification
P-channel enhancement mode
MOS transistor
BSH203
MECHANICAL DATA
Plastic surface mounted package; 3 leads
SOT23
D
B
E
A
X
H
v
M
A
E
3
Q
A
A
1
c
1
2
e
1
b
p
w
M
B
L
p
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
1
UNIT
b
c
D
E
e
e
H
L
Q
v
w
A
p
p
1
E
max.
1.1
0.9
0.48
0.38
0.15
0.09
3.0
2.8
1.4
1.2
2.5
2.1
0.45
0.15
0.55
0.45
mm
0.1
1.9
0.95
0.2
0.1
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
EIAJ
97-02-28
SOT23
Fig.15. SOT23
surface mounting package.
Notes
1. This product is supplied in anti-static packaging. The gate-source input must be protected against static
discharge during transport or handling.
2. Refer to SMD Footprint Design and Soldering Guidelines, Data Handbook SC18.
3. Epoxy meets UL94 V0 at 1/8″.
August 1998
6
Rev 1.000
Philips Semiconductors
Product specification
P-channel enhancement mode
MOS transistor
BSH203
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134).
Stress above one
or more of the limiting values may cause permanent damage to the device.
These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied.
Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 1998
All rights are reserved.
Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice.
No liability will be accepted by the publisher for any
consequence of its use.
Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury.
Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
August 1998
7
Rev 1.000
