TECH-PUBLIC-TPNTS4101PT1G

TPNTS4101PT1G  

P-Channel Enhancement-Mode MOS FETs  

Features  

Applications  

-20V, -2.3A, R

DS(ON)

=100

m

Ω

(typ) @V  

ƽ

ƽ

ƽ

Battery protection  

ƽ

Load switch  

= 125m

Ω

(typ) @V

GS

= 2.5V.  

R

DS(ON)  

ƽ

Power management  

SOT-323 package.  

ƽ

Ordering Information  

Part Number  

TPNTS4101PT1G  

Qty per Reel

 

Reel Size  

ꢀꢁꢁꢁ ꢂw  

D

S

G

SOT-323  

Absolute Maximum Ratings (T

A

=25°C unless otherwise specified)  

Parameter  

Symbol  

Value  

Unit  

Drain-Source Voltage  

Gate-Source Voltage  

V

DS  

V

GS  

I

D  

– 20  

±10  

V

Continuous Drain Current  

Pulsed Drain Current

 

(

t

p

=10µs)  

Power Dissipation  

-2.3  

A

I

DM  

P

D  

-5.0  

0.29  

W

Thermal Resistance from Junction to Ambient  

Junction Temperature  

R

θ

JA  

T

J  

43

1  

℃

/W  

125  

℃

Storage Temperature  

T

stg  

-50 ~+150  

TPNTS4101PT1G  

P-Channel Enhancement-Mode MOS FETs  

(T =25°C

 

unless otherwise specified)  

Electrical Characteristics  

A

Parameter  

Symbol  

Test Condition  

Min  

Typ  

Max  

Unit  

OFF CHARACTERISSTICS  

Drain-Source Breakdown Voltage  

Gate-Source Leakage  

V

DSS  

I

GSS  

I

DSS  

V

GS

= 0V, I

D

=-250µA  

V

DS

=0V, V

GS

=

±

8V  

V

DS

=-

20

V, V

GS

=0V  

–

20  

V

±

100  

nA  

µA  

-1.0  

Zero Gate Voltage Drain Current  

OFF CHARACTERISSTICS  

Gate-Source Threshold Voltage  

-0.7  

V

GS(th)  

V

DS

=V

GS

, I

D

=-250µA  

V

GS

=-4.5V, I

D

=-2.3A  

V

GS

=-2.5V, I

D

=-1A  

-0.45  

V

-1.0  

100  

125  

Drain-Source On-State Resistance  

CHARGES AND CAPACITANCES  

Input Capacitance  

R

DS(on)  

m

Ω

 

C

iss  

C

oss  

C

rss  

640  

120  

82  

V

DS

=-8.0V,V

GS

=0V,f =1MHz  

pF  

ns  

Output Capacitance  

Reverse Transfer Capacitance  

SWITCHING CHARACTERISSTICS  

Turn-On Delay Time  

t

d(on)  

t

r  

t

d(off)  

t

f  

6.2  

15  

26  

18  

Rise Time  

V

GS

=-4.5V,V

DD

=-4.0V,  

I

D

=-1.0A,

R

G

=6.2

ꢀ  

Turn-Off Delay Time  

Fall Time  

TPNTS4101PT1G  

P-Channel Enhancement-Mode MOS FETs  

PACKAGE DIMENSIONS  

SC

−

70 (SOT

−

323)  

CASE 419

−

04  

ISSUE N  

NOTES:  

1. DIM

E

NSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.  

2. CON

T

ROLLING DIMENSION: INCH.  

D

e1  

MILLIMETERS  

INCHES  

DIM  

A

A1  

A2  

b

c

D

E

e

e1  

L

MIN  

0.80  

0.00  

NOM  

0.90  

0.05  

0.70 REF  

0.35  

0.18  

2.10  

1.24  

1.30  

0.65 BSC  

0.38  

MAX  

1.00  

0.10  

MIN  

0.032  

0.000  

NOM  

0.035  

0.002  

0.028 REF  

0.014  

0.007  

0.083  

0.049  

0.051  

0.026 BSC  

0.015  

MAX  

0.040  

0.004  

3

E

H

E

1

2

0.30  

0.10  

1.80  

1.15  

1.20  

0.40  

0.25  

2.20  

1.35  

1.40  

0.012  

0.004  

0.071  

0.045  

0.047  

0.016  

0.010  

0.087  

0.053  

0.055  

b

e

0.20  

2.00  

0.56  

2.40  

0.008  

0.079  

0.022  

0.095  

H

2.10  

0.083  

E

STYLE 8:  

PIN 1.

 

GATE  

2. SOURCE  

c

A

A2  

3. DRAIN  

0.05 (0.002)  

L

A1  

SOLDERING FOOTPRINT*  

0.65  

0.025  

0.65  

0.025  

1.9  

0.075  

0.9  

0.035  

0.7  

0.028  

mm  

inches  

ǒ

Ǔ

SCALE 10:1