onsemi-FDBL0150N60

Part #onsemi-FDBL0150N60
Download 
onsemi-FDBL0150N60
Is Now Part of  
To learn more about ON Semiconductor, please visit our website at  
Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers  
will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor  
product management systems do not have the ability to manage part nomenclature that utilizes an underscore  
(_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain  
device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated  
email any questions regarding the system integration to

.  
ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number  
to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON  
Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON  
Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s  
technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA  
Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended  
or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out  
of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor  
is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  

June 2015  
FDBL0150N60  
®
N-Channel PowerTrench
 
MOSFET  
60 V, 240 A, 1.5 m
Ω  
Features  
„
Typical R  
= 1.1 m
Ω
at V
 
= 10V, I
 
= 80 A  
GS D  
DS(on)  
„
Typical Q  
= 130 nC at V
 
= 10V, I
 
= 80 A  
g(tot)  
GS  
D
D
„
UIS Capability  
„
RoHS Compliant  
Applications  
„
Industrial Motor Drive  
„
Industrial Power Supply  
„
Industrial Automation  
„
Battery Operated tools  
„
Battery Protection  
„
Solar Inverters  
G
S
For current package drawing, please refer to the Fairchild web
‐
 
„
UPS and Energy Inverters  
„
Energy Storage  
„
Load Switch  
MOSFET Maximum Ratings
 
T

J

= 25°C unless otherwise noted.  
Symbol  
V

DSS  

Parameter  
Ratings  
60  
Units  
Drain-to-Source Voltage  
Gate-to-Source Voltage  
V
V
V

GS  

±20  
Drain Current – Continuous (V

GS

=10) (Note 1)  
Pulsed Drain Current  
T

C

= 25°C  
T

C

= 25°C  
240  
I

D  

A
See Figure 4  
614  
E

AS  

P

D  

Single Pulse Avalanche Energy  
(Note 2)  
(Note 3)  
mJ  
W
W/

o

C  

o

C  

o

C/W  

o

C/W  
Power Dissipation  
Derate Above 25

o

C  
357  
2.38  
T

J

, T

STG

Operating and Storage
T
e
mperature  
-55 to + 175  
0.42  
R

θ
JC  

R

θ
JA  

Thermal Resistance, Junction to Case  
Maximum Thermal Resistance, Junction to Ambient  
43  
Notes:  
1: Current
 
is limited by silicon.  
2: Starting
 
T =
 
25°C, L = 0.3mH, I
 
= 64A, V
 
= 60V during inductor charging and V
 
= 0V during time in avalanche.  
J
AS  
DD  
DD  
3: R  
is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder  
θ
JA  
mounting surface of the drain pins.  
presented here is based on mounting on a 1 in
 
pad of 2oz copper.  
R
is guaranteed by design, while R
 
is determined by the board design.
 
The maximum rating  
θ
JC
θ
JA  
2
Package Marking and Ordering Information  
Device Marking  
Device  
Package  
Reel Size  
Tape Width  
Quantity  
FDBL0150N60  
FDBL0150N60  
MO-299A  
13″  
24mm  
2000 units  
©2015 Fairchild Semiconductor Corporation  
FDBL0150N60 Rev. 1.0  
1

Electrical Characteristics
T

J

= 25°C unless otherwise noted.  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Units  
Off Characteristics  
B

VDSS  

I

DSS  

Drain-to-Source Breakdown Voltage  
Drain-to-Source Leakage Current  
Gate-to-Source Leakage Current  
I

D

= 250
μ
A, V

GS

= 0V  
60  
–
–
–
–
–
–
1
V
V

DS

= 6 0 V ,
 
T

J

= 25

o

C  
μ
A  
mA  
nA  
V

GS

= 0V  
T

J

= 175

o

C (Note 4)  
–
1
I

GSS  

V

GS

= ±20V  
–
±100  
On Characteristics  
V

GS(th)  

R

DS(on)  

Gate to Source Threshold Voltage  
Drain to Source On Resistance  
V

GS

= V

DS

, I

D

= 250
μ
A  
2.0  
2.9  
1.1  
2.1  
4.0  
1.5  
2.9  
V
T

J

= 25

o

C  
–
–
m
Ω  
m
Ω  
I

D

= 80A,  

GS

= 10V  
T

J

= 175

o

C (Note 4)  
V
Dynamic Characteristics  
C

iss  

Input Capacitance  
–
–
–
–
–
–
–
–
10300  
2590  
270  
4.3  
–
pF  
pF  
pF  
Ω
V

DS

= 30V, V

GS

= 0V,  
f = 1MHz  
C

oss  

C

rss  

R

g  

Output Capacitance  
–
Reverse Transfer Capacitance  
Gate Resistance  
–
f = 1MHz  
–
Q

g(
T
o
T)  

Q

g(th)  

Q

gs  

T
o
tal Gate Charge at 10V  
Threshold Gate Charge  
Gate-to-Source Gate Charge  
Gate-to-Drain “Miller“ Charge  
V

GS

= 0 to 10V  
V
130  
19  
169  
nC  
nC  
nC  
nC  

DD

= 48V  

D

= 80A  
V

GS

= 0 to 2V  
–
–
–
I
48  
Q

gd  

20  
Switching Characteristics  
t

on  

t

d(on)  

t

r  

Turn-On Time  
Turn-On Delay  
Rise Time  
–
–
–
–
–
–
–
160  
ns  
ns  
ns  
ns  
ns  
ns  
30  
77  
78  
57  
–
–
–
V
V

DD

= 30V, I

D

= 80A,  

GS

= 10V, R

GEN

= 6
Ω  
t

d(off)  

t

f  

Turn-Off Delay  
Fall Time  
–
–
t

off  

Turn-Off Time  
200  
Drain-Source Diode Characteristics  
I

SD

=80A, V

GS

= 0V  
–
–
–
–
–
–
1.25  
1.2  
V
V

SD  

Source-to-Drain Diode Voltage  
I

SD

= 40A, V

GS

= 0V  
V
t

rr  

Reverse-Recovery Time  
94  
131  
140  
200  
ns  
nC  
I

F

= 80A, dI

SD

/dt = 100A/
μ
s,  
V

DD

=48V  
Q

rr  

Reverse-Recovery Charge  
Note:  
4: The
 
maximum value is specified by design at T
 
= 175°C.
 
Product is not tested to this condition in production.  
J
©2015 Fairchild Semiconductor Corporation  
FDBL0150N60 Rev. 1.0  
2

Typical Characteristics  
400  
350  
300  
250  
200  
150  
100  
50  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
V

GS

= 10V  
CURRENT LIMITED  
BY SILICON  
0
0
25  
50  
75  
100  
125  
150  
175  
25  
50  
75  
100  
125  
150  
175  
200  
T

C

, CASE TEMPERATURE(

o

C)  
T

C

, CASE TEMPERATURE(

o

C)  
Figure 2.
 
Maximum Continuous Drain Current vs.  
Case Temperature  
Figure 1.
 
Normalized Power Dissipation vs. Case  
Temperature  
2
DUTY CYCLE – DESCENDING ORDER  
1
D = 0.50  
0.20  
P
DM  
0.10  
0.05  
0.02  
0.01  
t
1
0.1  
t
2
NOTES:  
DUTY FACTOR: D = t
 
/t  
SINGLE PULSE  
1
2
PEAK T
 
= P  
x Z  
x R  
+ T  
J
DM  
θ
JA  
θ
JA C  
0.01  
10

-5  

10

-4  

10

-3  

10

-2  

10

-1  

10

0  

10

1  

t, RECTANGULAR
 
PULSE DURATION(s)  
Figure 3.
 
Normalized Maximum Transient Thermal Impedance  
10000  
T

C

= 25

o

C  
V

GS

= 10V  
FOR TEMPERATURES  
ABOVE 25

o

C DERATE PEAK  
CURRENT AS FOLLOWS:  
1000  
100  
10  
175 – T

C  

I = I

2  

150  
SINGLE PULSE  
10

-5  

10

-4  

10

-3  

10

-2  

10

-1  

10

0  

10

1  

t, RECTANGULAR PULSE DURATION(s)  
Figure 4.
 
Peak Current Capability  
©2015 Fairchild Semiconductor Corporation  
FDBL0150N60 Rev. 1.0  
3

Typical Characteristics  
2000  
1000  
1000  
100  
If R = 0  
= (L)(I
 
)/(1.3*RATED BV  
t
AV  
– V  
)
AS  
DSS  
DD  
If R  
≠
0  
t
AV  
= (L/R)ln[(I
 
*R)/(1.3*RATED BV  
– V
 
) +1]  
AS  
DSS DD  
100  
10  
1
100us  
10  
1
OPERATION IN THIS  
AREA MAY BE  
LIMITED BY r  
DS(on)  
STARTING T

J

= 25

o

C  
1ms  
STARTING T

J

= 150

o

C  
SINGLE PULSE  
10ms  
100ms  
T
J
= MAX RATED  
o
T
C
= 25  
C
0.1  
0.1  
0.001 0.01  
0.1  
1
10  
100 1000
 
10000  
1
10  
100 200  
t

AV

, TIME IN AVALANCHE (ms)  
-V

DS

, DRAIN TO SOURCE VOLTAGE (V)  
NOTE: Refer to Fairchild Application Notes AN7514 and AN7515  
Figure 6.
 
Unclamped Inductive Switching  
Capability  
Figure 5.
 
Forward Bias Safe Operating Area  
350  
350  
PULSE DURATION = 80
μ
s  
DUTY CYCLE = 0.5% MAX  
V

GS

= 0 V  
100  
300  
V

DD

= 5V  
250  
200  
T

J

= 175

o  

C
T

J

= 25

o

C  
10  
1
T

J

= 25

o

C  
150  
100  
T

J

= 175

o

C  
T

J

= -55

o

C  
50  
0
0.1  
2
3
4
5
6
7
8
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
V

GS

, GATE TO SOURCE VOLTAGE (V)  
V

SD

, BODY DIODE FORWARD VOLTAGE (V)  
Figure 7.
 
Transfer Characteristics  
Figure 8.
 
Forward Diode Characteristics  
350  
350  
V

GS  

V

GS  

15V Top  
10V  
8V  
7V  
6V  
5.5V  
5V Bottom  
15V Top  
10V  
8V  
7V  
6V  
300  
250  
200  
150  
100  
50  
300  
250  
5.5V  
5V Bottom  
200  
150  
80
μ
s PULSE WIDTH  
Tj=25

o

C  
100  
50  
0
80
μ
s PULSE WIDTH  
Tj=175

o

C  
0
0
1
2
3
4
5
0
1
2
3
4
5
V

DS

, DRAIN TO SOURCE VOLTAGE (V)  
V

DS

, DRAIN TO SOURCE VOLTAGE (V)  
Figure 9.
 
Saturation Characteristics  
Figure 10.
 
Saturation Characteristics  
©2015 Fairchild Semiconductor Corporation  
FDBL0150N60 Rev. 1.0  
4

Typical Characteristics  
50  
2.4  
2.0  
1.6  
1.2  
0.8  
0.4  
PULSE DURATION = 80
μ
s  
DUTY CYCLE = 0.5% MAX  
I

D

=
80A  
PULSE DURATION = 80
μ
s  
DUTY CYCLE = 0.5% MAX  
40  
30  
20  
10  
0
T

J

= 25

o

C  
T

J

= 175

o

C  
I

D

= 80A  
V

GS

= 10V  
2
4
6
8
10  
-80  
-40  
0
40  
80  
120  
160  
200  
T

J

, JUNCTION TEMPERATURE
(

o

C
)  
V

GS

, GATE TO SOURCE VOLTAGE (V)  
Figure 11.
 
R

DSON

vs. Gate Voltage  
Figure 12.
 
Normalized R

DSON

vs. Junction  
Temperature  
1.5  
1.10  
V

GS

=
V

DS  

I

D

= 5mA  
I
D
= 250
μ
A  
1.2  
0.9  
0.6  
0.3  
0.0  
1.05  
1.00  
0.95  
0.90  
-80  
-40  
0
40  
80  
120  
160  
200  
-80  
-40  
0
40  
80  
120  
160  
200  
T

J

, JUNCTION TEMPERATURE (

o

C)  
T

J

, JUNCTION TEMPERATURE(

o

C)  
Figure 13.
 
Normalized Gate Threshold Voltage vs.  
Temperature  
Figure 14.
 
Normalized Drain to Source  
Breakdown Voltage vs. Junction Temperature  
100000  
10  
I
D
= 80A  
V

DD

= 30V  
C

iss  

8
10000  
V

DD

=24V  
V

DD

= 36V  
6
4
2
0
1000  
100  
10  
C

oss  

C

rss  

f = 1MHz  

GS

= 0V  
V
0.1  
1
10  
100  
0
30  
60  
90  
120  
150  
Q

g

,
GATE CHARGE(nC)  
V

DS

, DRAIN TO SOURCE VOLTAGE
(
V
)  
Figure 15.
 
Capacitance vs. Drain to Source  
Voltage  
Figure 16.
 
Gate Charge
 
vs. Gate to Source  
Voltage  
©2015 Fairchild Semiconductor Corporation  
FDBL0150N60 Rev. 1.0  
5

Dimensional Outline and Pad Layout  
©2015 Fairchild Semiconductor Corporation  
FDBL0150N60 Rev. 1.0  
6

9.70  
9.90  
DETAIL “A”  
B
0.60  
0.80  
0.40  
0.60  
(0.40)  
10°  
0.60  
0.80  
(2X)  
11.58  
11.78  
(3.30)  
10.28  
10.48  
0.50  
0.70  
0.20  
C A B  
DETAIL “A”  
1
8
0.60  
0.70  
0.90

(8X)  

0.25  
1.20  
7X  
C
C
A B  
(0.35)  
0.20  
8.40  
10.20  
TOP VIEW  
5.10  
4.45  
DETAIL “B”  
6.64  
6.64  
2.95  
2.90  
0.20  
0.10  
C
0.40  
0.60  
8.10  
4.99  
2.20  
2.40  
C
2.04  
13.28  
1.46  
C
0.86  
0.60  
SIDE VIEW  
2.80  
1
8
1.20  
0.80  
9.80  
10.00  
A
0.20  
C
A B  
(8.00)  
LAND PATTERN  
RECOMMENDATION  
1.90  
2.10  
5.19  
5.89  
4.73  
(2X)  
0.10  
2.60  
(2X)  
(2X)  
6.55  
6.75  
(7.15)  
3.30  
NOTES: UNLESS OTHERWISE SPECIFIED  
A) PACKAGE
 
STANDARD REFERENCE:  
1.20  
0.65  
JEDEC MO-299, ISSUE A, DATED NOVEMBER  
2009.  
3X  
2X  
3.75  
7.40  
7.60  
B) ALL
 
DIMENSIONS ARE IN MILLIMETERS.  
C) DIMENSIONS
 
DO NOT INCLUDE BURRS  
OR MOLD FLASH. MOLD FLASH OR  
BURRS DOES NOT EXCEED 0.10MM.  
D) DIMENSIONING
 
AND TOLERANCING PER  
ASME Y14.5M-1994.  
(8.30)  
BOTTOM VIEW  
10°  
E) DRAWING
 
FILE NAME: MKT-PSOF08AREV3  
(0.35)  
DETAIL “B”  

ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent  
coverage may be accessed at

. ON Semiconductor reserves the right to make changes without further notice to any products herein.  
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,  
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer  
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not  
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification  
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized  
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and  
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such  
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This  
literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMEN
T
:  
N. American Technical Support
: 800
−
282
−
9855
T
o
ll Free  
USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
Japan Customer Focus Center  
Phone: 81
−
3
−
5817
−
1050  
ON Semiconductor Website
:

Literature Distribution Center for ON Semiconductor  
19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA  
Phone
: 303
−
675
−
2175 or 800
−
344
−
3860
T
o
ll Free USA/Canada  
Fax
: 303
−
675
−
2176 or 800
−
344
−
3867
T
o
ll Free USA/Canada  
Email
: orderlit@onsemi.com  
For additional information, please contact your local  
Sales Representative  
©
Semiconductor Components Industries, LLC