onsemi-FDD9411-F085

Part #onsemi-FDD9411-F085
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onsemi-FDD9411-F085
FDD9411
–
F085  
®
N-Channel PowerTrench
 
MOSFET  
40 V, 25 A, 7.8 m
Ω  
Features  
D
„
Typical R  
„
Typical Q  
= 6.2 m
Ω
at V
 
= 10V, I
 
= 15 A  
GS D  
DS(on)  
= 15 nC at V
 
= 10V, I
 
= 15 A  
g(tot)  
GS  
D
„
UIS Capability  
D
„
RoHS Compliant  
„
Qualified to AEC Q101  
G
G
S
Applications  
D-PAK  
(TO-252)  
„
Automotive Engine Control  
„
PowerTrain Management  
„
Solenoid and Motor Drivers  
„
Electronic Steering  
S
„
Integrated Starter/Alternator  
„
Primary Switch for 12V Systems  
MOSFET Maximum Ratings
 
T

J

= 25°C unless otherwise noted.  
Symbol  
V

DSS  

Parameter  
Ratings  
40  
Units  
Drain-to-Source Voltage  
Gate-to-Source Voltage  
V
V
V

GS  

±20  
Drain Current – Continuous (V

GS

=10) (Note 1)  
Pulsed Drain Current  
T

C

= 25°C  
T

C

= 25°C  
25  
I

D  

A
See Figure 4  
43.2  
E

AS  

P

D  

Single Pulse Avalanche Energy  
(Note 2)  
mJ  
W
W/

o

C  

o

C  

o

C/W  

o

C/W  
Power Dissipation  
Derate Above 25

o

C  
48.4  
0.32  
T

J

, T

STG

Operating and Storage
T
e
mperature  
-55 to + 175  
3.1  
R

θ
JC  

R

θ
JA  

Thermal Resistance, Junction to Case  
Maximum Thermal Resistance, Junction to Ambient  
(Note 3)  
52  
Notes:  
1: Current
 
is limited by bondwire configuration.  
2: Starting
 
T =
 
25°C, L = 0.6mH, I
 
= 12A, V
 
= 40V during inductor charging and V
 
= 0V during time in avalanche.  
J
AS  
DD  
DD  
3: R  
is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder  
θ
JA  
mounting surface of the drain pins.  
presented here is based on mounting on a 1 in
 
pad of 2oz copper.  
R
is guaranteed by design, while R
 
is determined by the board design.
 
The maximum rating  
θ
JC
θ
JA  
2
Package Marking and Ordering Information  
Device Marking  
Device  
Package  
Reel Size  
Tape Width  
Quantity  
FDD9411  
FDD9411
–
F085  
D-PAK(TO-252)  
13”  
16mm  
2500units  
1
©2015
Semiconductor Components Industries, LLC.  
August-2017,
Rev.
2  
Publication Order Number:  
FDD9411-F085
/D  

Electrical Characteristics
T

J

= 25°C unless otherwise noted.  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Units  
Off Characteristics  
B

VDSS  

I

DSS  

Drain-to-Source Breakdown Voltage  
Drain-to-Source Leakage Current  
Gate-to-Source Leakage Current  
I

D

= 250
μ
A, V

GS

= 0V  
40  
–
–
–
–
–
–
1
V
V

DS

= 4 0 V ,
 
T

J

= 25

o

C  
μ
A  
mA  
nA  
V

GS

= 0V  
T

J

= 175

o

C (Note 4)  
–
1
I

GSS  

V

GS

= ±20V  
–
±100  
On Characteristics  
V

GS(th)  

R

DS(on)  

Gate to Source Threshold Voltage  
Drain to Source On Resistance  
V

GS

= V

DS

, I

D

= 250
μ
A  
2.0  
3.4  
6.2  
4.0  
7.8  
14  
V
T

J

= 25

o

C  
–
–
m
Ω  
m
Ω  
I

D

= 15A,  
T

J

= 175

o

C (Note 4)  
11.2  
V

GS

= 10V  
Dynamic Characteristics  
C

iss  

Input Capacitance  
–
–
–
–
–
–
–
–
1080  
340  
22  
–
pF  
pF  
pF  
Ω
V

DS

= 25V, V

GS

= 0V,  
C

oss  

C

rss  

R

g  

Output Capacitance  
–
f = 1MHz  
Reverse Transfer Capacitance  
Gate Resistance  
–
f = 1MHz  
2.6  
15  
–
Q

g(
T
o
T)  

Q

g(th)  

Q

gs  

T
o
tal Gate Charge  
V

GS

= 0 to 10V  
V

GS

= 0 to 2V  
22.5  
nC  
nC  
nC  
nC  
V

DD

= 32V  
I

D

= 15A  
Threshold Gate Charge  
Gate-to-Source Gate Charge  
Gate-to-Drain “Miller“ Charge  
2
–
–
–
5.3  
2.8  
Q

gd  

Switching Characteristics  
t

on  

t

d(on)  

t

r  

Turn-On Time  
Turn-On Delay  
Rise Time  
–
–
–
–
–
–
–
24  
–
ns  
ns  
ns  
ns  
ns  
ns  
8.7  
7.2  
15.8  
4.4  
–
–
V

DD

= 20V, I

D

= 15A,  
V

GS

= 10V, R

GEN

= 6
Ω  
t

d(off)  

t

f  

Turn-Off Delay  
Fall Time  
–
–
t

off  

Turn-Off Time  
30  
Drain-Source Diode Characteristics  
I

SD

= 15A, V

GS

= 0V  
I

SD

= 7.5A, V

GS

= 0V  

DD

= 32V, I

F

= 15A,  
dI

SD

/dt = 100A/
μ
s  
–
–
–
–
–
1.25  
1.2  
53  
V
V

SD  

Source-to-Drain Diode Voltage  
–
V
t

rr  

Reverse-Recovery Time  
35  
20  
ns  
nC  
V
Q

rr  

Reverse-Recovery Charge  
30  
Note:  
4: The
 
maximum value is specified by design at T
 
= 175°C.
 
Product is not tested to this condition in production.  
J
2

Typical Characteristics  
80  
60  
40  
20  
0
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
V

GS

= 10V  
CURRENT LIMITED  
BY SILICON  
CURRENT LIMITED  
BY PACKAGE  
25  
50  
75  
100  
125  
150  
175  
200  
0
25  
50  
75  
100  
125  
150  
175  
T

C

, CASE TEMPERATURE(

o

C)  
T

C

, CASE TEMPERATURE(

o

C)  
Figure 2.
 
Maximum Continuous Drain Current vs.  
Case Temperature  
Figure 1.
 
Normalized Power Dissipation vs. Case  
Temperature  
2
DUTY CYCLE – DESCENDING ORDER  
1
D = 0.50  
0.20  
P
DM  
0.10  
0.05  
0.02  
0.01  
t
1
0.1  
t
2
NOTES:  
DUTY FACTOR: D = t
 
/t  
1
2
SINGLE PULSE  
PEAK T
 
= P  
x Z  
x R  
+ T  
J
DM  
θ
JA  
θ
JA C  
0.01  
10

-5  

10

-4  

10

-3  

10

-2  

10

-1  

10

0  

10

1  

t, RECTANGULAR
 
PULSE DURATION(s)  
Figure 3.
 
Normalized Maximum Transient Thermal Impedance  
1000  
T

C

= 25

o

C  
FOR TEMPERATURES  
V

GS

= 10V  
ABOVE 25

o

C DERATE PEAK  
CURRENT AS FOLLOWS:  
100  
10  
1
175 – T

C  

I = I

2  

150  
SINGLE PULSE  
10

-5  

10

-4  

10

-3  

10

-2  

10

-1  

10

0  

10

1  

t, RECTANGULAR PULSE DURATION(s)  
Figure 4.
 
Peak Current Capability  
3

Typical Characteristics  
100  
10  
1
1000  
100  
10  
If R = 0  
= (L)(I
 
)/(1.3*RATED BV  
t
AV  
– V  
)
AS  
DSS  
DD  
If R  
AV  
≠
0  
t
= (L/R)ln[(I
 
*R)/(1.3*RATED BV  
– V
 
) +1]  
DSS DD  
AS  
100us  
1ms  
10ms  
100ms  
STARTING T

J

= 25

o

C  
1
OPERATION IN THIS  
AREA MAY BE  
LIMITED BY r  
DS(on)  
STARTING T

J

= 150

o

C  
SINGLE PULSE  
0.1  
T
J
= MAX RATED  
o
T
C
= 25  
C
0.01  
0.1  
1
10  
100  
1E-3  
0.01  
0.1  
1
10  
100  
V

DS

, DRAIN TO SOURCE VOLTAGE (V)  
t

AV

, TIME IN AVALANCHE (ms)  
NOTE: Refer to
ON Semiconductor
Application Notes AN7514  
and AN7515  
Figure 5.
 
Forward Bias Safe Operating Area  
Figure 6.
 
Unclamped Inductive Switching  
Capability  
100  
100  
PULSE DURATION = 80
μ
s  
V

GS

= 0 V  
DUTY CYCLE = 0.5% MAX  
V

DD

= 5V  
80  
10  
60  
T

J

= 25

o

C  
T

J

= 25

o  

C
40  
T

J

= 175

o  

C
1
T

J

= 175

o

C  
T

J

= -55

o

C  
20  
0
0.1  
2
3
4
5
6
7
8
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
V

GS

, GATE TO SOURCE VOLTAGE (V)  
V

SD

, BODY DIODE FORWARD VOLTAGE (V)  
Figure 7.
 
Transfer Characteristics  
Figure 8.
 
Forward Diode Characteristics  
100  
100  
V

GS  

15V Top  
10V  
8V  
7V  
6V  
V

GS  

15V Top  
10V  
8V  
7V  
6V  
80
μ
s PULSE WIDTH  
Tj=25

o

C  
80  
60  
40  
20  
0
80  
5.5V  
5V Bottom  
5.5V  
5V Bottom  
60  
40  
20  
80
μ
s PULSE WIDTH  
Tj=175

o

C  
0
0
1
2
3
4
5
0
1
2
3
4
5
V

DS

, DRAIN TO SOURCE VOLTAGE (V)  
V

DS

, DRAIN TO SOURCE VOLTAGE (V)  
Figure 9.
 
Saturation Characteristics  
Figure 10.
 
Saturation Characteristics  
4

Typical Characteristics  
120  
2.4  
2.0  
1.6  
1.2  
0.8  
0.4  
PULSE DURATION = 80
μ
s  
DUTY CYCLE = 0.5% MAX  
I

D

=
15A  
PULSE DURATION = 80
μ
s  
DUTY CYCLE = 0.5% MAX  
90  
60  
30  
0
T

J

= 25

o

C  
T

J

= 175

o

C  
I

D

= 15A  
V

GS

= 10V  
4
5
6
7
8
9
10  
-80  
-40  
0
40  
80  
120  
160 200  
T

J

, JUNCTION TEMPERATURE
(

o

C
)  
V

GS

, GATE TO SOURCE VOLTAGE (V)  
Figure 11.
 
R

DSON

vs. Gate Voltage  
Figure 12.
 
Normalized R

DSON

vs. Junction  
Temperature  
1.5  
1.10  
V

GS

=
V

DS  

I

D

= 1mA  
I
D
= 250
μ
A  
1.2  
0.9  
0.6  
0.3  
1.05  
1.00  
0.95  
0.90  
-80  
-40  
0
40  
80  
120  
160  
200  
-80  
-40  
0
40  
80  
120  
160  
200  
T

J

, JUNCTION TEMPERATURE (

o

C)  
T

J

, JUNCTION TEMPERATURE(

o

C)  
Figure 13.
 
Normalized Gate Threshold Voltage vs.  
Temperature  
Figure 14.
 
Normalized Drain to Source  
Breakdown Voltage vs. Junction Temperature  
5000  
10  
I
D
= 15A  
V

DD

= 16V  
C

iss  

8
1000  
V

DD

= 24V  
C

oss  

6
V

DD

= 20V  
4
2
0
100  
C

rss  

f = 1MHz  
V

GS

= 0V  
10  
0.1  
40  
1
10  
0
4
8
12  
16  
Q

g

,
GATE CHARGE(nC)  
V

DS

, DRAIN TO SOURCE VOLTAGE
(
V
)  
Figure 15.
 
Capacitance vs. Drain to Source  
Voltage  
Figure 16.
 
Gate Charge
 
vs. Gate to Source  
Voltage  
5

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