onsemi-MJH11022G

Part #onsemi-MJH11022G
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onsemi-MJH11022G
MJH11017, MJH11019,  
MJH11021ꢀ(PNP)  
MJH11018, MJH11020,  
MJH11022ꢀ(NPN)  
Complementary Darlington  
Silicon Power
T
r
ansistors  
These devices are designed for use as general purpose amplifiers,  
low frequency switching and motor control applications.  
15 AMPERE DARLINGTON  
COMPLEMENTARY SILICON  
POWER TRANSISTORS  
Features  
•
High DC Current Gain @ 10 Adc — h
 
= 400 Min (All Types)  
FE  
150−250 VOLTS, 150 WATTS  
•
Collector−Emitter Sustaining
V
o
ltage  
V
= 150 Vdc (Min) — MJH11018, 17  
CEO(sus)  
NPN  
PNP  
= 200 Vdc (Min) — MJH11020, 19  
= 250 Vdc (Min) — MJH11022, 21  
COLLECTOR 2  
COLLECTOR 2  
•
Low Collector−Emitter Saturation
V
o
ltage  
BASE  
1
BASE  
1
V
= 1.2 V (Typ) @ I
 
= 5.0 A  
CE(sat)  
C
= 1.8 V (Typ) @ I
 
= 10 A  
C
•
Monolithic Construction  
•
These are Pb−Free Devices  
EMITTER 3  
EMITTER 3  
MJH11018  
MJH11020  
MJH11022  
MJH11017  
MJH11019  
MJH11021  
MAXIMUM RATINGS  
Rating  
Symbol  
Max  
Unit  
Collector−Emitter Voltage  
V
CEO  
Vdc  
MJH11018, MJH11017  
MJH11020, MJH11019  
MJH11022, MJH11021  
150  
200  
250  
SOT−93  
(TO−218)  
CASE 340D  
STYLE 1  
Collector−Base Voltage  
V
CB  
Vdc  
MJH11018, MJH11017  
MJH11020, MJH11019  
MJH11022, MJH11021  
150  
200  
250  
1
2
Emitter−Base Voltage  
V
5.0  
Vdc  
Adc  
3
EB  
Collector Current
 
− Continuous  
− Peak (Note 1)  
I
15  
30  
C
TO−247  
CASE 340L  
STYLE 3  
Base Current  
I
B
0.5  
Adc  
T
o
tal Device Dissipation @ T
 
= 25
_
C  
P
150  
1.2  
W
C
D
Derate above 25
_
C  
W/
_
C  
_
C  
Operating and Storage Junction
T
e
mperature
 
T , T  
–
ꢀ
65 to  
+
ꢀ
150  
J
stg  
Range  
NOTE: Effective
 
June 2012 this device will  
be available only in the TO−247  
THERMAL CHARACTERISTICS  
package. Reference FPCN# 16827.  
Characteristic  
Symbol  
Max  
Unit  
Thermal Resistance, Junction−to−Case  
R
0.83  
_
C/W  
q
JC  
Stresses exceeding those listed in the Maximum Ratings table may damage the  
device. If any of these limits are exceeded, device functionality should not be  
assumed, damage may occur and reliability may be affected.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
1. Pulse
 
T
e
st: Pulse Width = 5.0 ms, Duty Cycle
v
10%.  
©
Semiconductor Components Industries, LLC, 2016  
1
Publication Order Number:  
August, 2016 − Rev. 10  
MJH11017/D  

MJH11017, MJH11019, MJH11021 (PNP) MJH11018, MJH11020, MJH11022 (NPN)  
MARKING DIAGRAMS  
TO−247  
TO−218  
MJH110xx  
AYWWG  
AYWWG  
MJH110xx  
1 BASE  
3 EMITTER  
2 COLLECTOR  
1 BASE  
3 EMITTER  
2 COLLECTOR  
A
Y
= Assembly Location  
=
Y
e
ar  
WW  
G
= Work Week  
= Pb−Free Package  
MJH110xx =
 
Device Code  
xx = 17, 19, 21, 18, 20, 22  
ORDERING INFORMATION  
Device Order Number  
Package Type  
Shipping  
MJH11017G  
MJH11018G  
MJH11019G  
MJH11020G  
MJH11021G  
MJH11022G  
MJH11017G  
MJH11018G  
MJH11019G  
MJH11020G  
MJH11021G  
MJH11022G  
TO−218  
(Pb−Free)  
30 Units / Rail  
TO−218  
(Pb−Free)  
30 Units / Rail  
30 Units / Rail  
30 Units / Rail  
30 Units / Rail  
30 Units / Rail  
30 Units / Rail  
30 Units / Rail  
30 Units / Rail  
30 Units / Rail  
30 Units / Rail  
30 Units / Rail  
TO−218  
(Pb−Free)  
TO−218  
(Pb−Free)  
TO−218  
(Pb−Free)  
TO−218  
(Pb−Free)  
TO−247  
(Pb−Free)  
TO−247  
(Pb−Free)  
TO−247  
(Pb−Free)  
TO−247  
(Pb−Free)  
TO−247  
(Pb−Free)  
TO−247  
(Pb−Free)  
2

MJH11017, MJH11019, MJH11021 (PNP) MJH11018, MJH11020, MJH11022 (NPN)  
160  
140  
120  
100  
80  
60  
40  
20  
0
0
20  
40  
60  
80  
100  
120  
140  
160  
T ,
 
CASE TEMPERATURE (
°
C)  
C
Figure 1. Power Derating  
ELECTRICAL CHARACTERISTICS
(T =
 
25
_
C unless otherwise noted)  
C
Characteristic  
Symbol  
Min  
Max  
Unit  
OFF CHARACTERISTICS  
Collector−Emitter Sustaining Voltage (Note 2)  
V
Vdc  
CEO(sus)  
(I =
 
0.1 Adc, I
 
= 0)  
MJH11017, MJH11018  
MJH11019, MJH11020  
MJH11021, MJH11022  
C
B
150  
200  
250  
−
−
−
Collector Cutoff Current  
(V =
 
75 Vdc, I
 
= 0)  
I
mAdc  
mAdc  
CEO  
MJH11017, MJH11018  
MJH11019, MJH11020  
MJH11021, MJH11022  
CE  
B
−
−
−
1.0  
1.0  
1.0  
(V =
 
100 Vdc, I
 
= 0)  
CE  
B
(V =
 
125 Vdc, I
 
= 0)  
CE  
B
Collector Cutoff Current  
(V =
 
Rated V
 
, V  
I
CEV  
= 1.5 Vdc)  
= 1.5 Vdc, T
 
= 150
_
C)  
CE  
CB  
BE(off)  
BE(off)  
−
−
0.5  
5.0  
(V =
 
Rated V
 
, V  
CE  
CB  
J
Emitter Cutoff Current (V
 
= 5.0 Vdc I
 
= 0)  
I
−
2.0  
mAdc  
−
BE  
ON CHARACTERISTICS
(Note 2)  
DC Current Gain  
C
EBO  
h
FE  
(I =
 
10 Adc, V
 
= 5.0 Vdc)  
400  
100  
15,000  
−
C
CE  
(I =
 
15 Adc, V
 
= 5.0 Vdc)  
C
CE  
Collector−Emitter Saturation Voltage  
(I =
 
10 Adc, I
 
= 100 mA)  
V
Vdc  
CE(sat)  
−
−
2.5  
4.0  
C
B
(I =
 
15 Adc, I
 
= 150 mA)  
C
B
Base−Emitter On Voltage (I
 
= 10 A, V
 
= 5.0 Vdc)  
V
−
−
2.8  
3.8  
Vdc  
Vdc  
C
CE  
BE(on)  
V
BE(sat)  
Base−Emitter Saturation Voltage (I
 
= 15 Adc, I
 
= 150 mA)  
C
B
DYNAMIC CHARACTERISTICS  
Current−Gain Bandwidth Product (I
 
= 10 Adc, V
 
= 3.0 Vdc, f = 1.0 MHz)  
f
T
3.0  
−
−
C
CE  
Output Capacitance  
(V =
 
10 Vdc, I
 
= 0, f = 0.1 MHz)  
MJH11018, MJH11020, MJH11022  
MJH11017, MJH11019, MJH11021  
C
−
−
400  
600  
pF  
ob  
CB  
E
Small−Signal Current Gain (I
 
= 10 Adc, V
 
= 3.0 Vdc, f = 1.0 kHz)  
h
fe  
75  
−
−
C
CE  
SWITCHING CHARACTERISTICS  
Typical  
Characteristic  
Symbol  
NPN  
PNP  
Unit  
Delay Time  
Rise Time  
Storage Time  
Fall Time  
t
150  
75  
ns  
d
t
1.2  
4.4  
2.5  
0.5  
2.7  
2.5  
m
s  
m
s  
m
s  
r
(V =
 
100
V
, I
 
=
1
0 A, I
 
= 100 mA  
CC  
C
B
V
BE(off)  
= 5.0 V) (See Figure 2)  
t
s
t
f
2. Pulse
 
T
e
st: Pulse Width = 300
m
s, Duty Cycle
v
2.0%.  
3

MJH11017, MJH11019, MJH11021 (PNP) MJH11018, MJH11020, MJH11022 (NPN)  
V
CC  
-100 V  
R
C
SCOPE  
TUT  
R
& R
 
varied to obtain desired current levels  
V2  
APPROX  
+12 V  
0
R
B
C
B
D ,
 
must be fast recovery types, e.g.:  
1
1N5825 used above I
 
≈
100 mA  
B
MSD6100 used below I
 
≈
100 mA  
51  
D
1
B
V1  
APPROX  
-ꢀ8.0 V  
+ꢀ4.0 V  
25
m
s  
For t
 
and t , D
 
is disconnected  
d
r
1
and V2 = 0  
t , t
 
≤
10 ns  
r
f
Duty Cycle = 1.0%  
For NPN test circuit, reverse diode and voltage polarities.  
Figure 2. Switching Times Test Circuit  
1.0  
0.7  
0.5  
D = 0.5  
0.2  
0.3  
0.2  
0.1  
P
(pk)  
R
R
(t) = r(t) R  
q
JC  
0.1  
0.07  
0.05  
q
q
JC  
JC  
0.05  
0.02  
= 0.83
°
C/W MAX  
D CURVES APPLY FOR POWER  
PULSE TRAIN SHOWN  
t
1
0.03  
0.02  
0.01  
READ TIME AT t  
t
1
2
T
– T
 
= P  
C
R (t)  
q
JC  
SINGLE PULSE  
J(pk)  
(pk)  
DUTY CYCLE, D = t
 
/t  
1
2
0.01  
0.01  
0.02 0.03
 
0.05  
0.1  
0.2 0.3
 
0.5  
1.0  
2.0 3.0
 
5.0  
t, TIME (ms)  
10  
20 30  
50  
100  
200 300
 
500  
1000  
Figure 3. Thermal Response  
FORWARD BIAS  
T
= 25
°
C SINGLE PULSE  
C
There are two limitations on the power handling ability of  
a transistor: average junction temperature and second  
30  
20  
0.1 ms  
breakdown. Safe operating area curves indicate I
 
− V  
C
CE  
10  
0.5 ms  
1.0 ms  
5.0 ms  
limits of the transistor that must be observed for reliable  
operation; i.e., the transistor must not be subjected to greater  
dissipation than the curves indicate.  
5.0  
2.0  
1.0  
0.5  
dc  
WIRE BOND LIMIT  
THERMAL LIMIT  
SECOND BREAKDOWN LIMIT  
The data of Figure 4 is based on T  
variable depending on conditions. Second breakdown pulse  
= 150
_
C; T
 
is  
J(pk)  
C
limits are valid for duty cycles to 10% provided T  
J(pk)  
MJH11017, MJH11018  
MJH11019, MJH11020  
MJH11021, MJH11022  
v
150
_
C. T  
may be calculated from the data in  
0.2  
0
J(pk)  
Figure 3. At high case temperatures, thermal limitations will  
reduce the power that can be handled to values less than the  
limitations imposed by second breakdown.  
2.0 3.0
 
5.0 10  
20 30
 
50  
100 150
 
250  
V
CE  
, COLLECTOR-EMITTER VOLTAGE (VOLTS)  
Figure 4. Maximum Rated Forward Bias  
Safe Operating Area (FBSOA)  
4

MJH11017, MJH11019, MJH11021 (PNP) MJH11018, MJH11020, MJH11022 (NPN)  
REVERSE BIAS  
30  
20  
10  
0
For inductive loads, high voltage and high current must be  
sustained simultaneously during turn−off, in most cases,  
L = 200
m
H  
I /I
 
≥
50  
with the base to emitter junction reverse biased. Under these  
conditions the collector voltage must be held to a safe level  
at or below a specific value of collector current. This can be  
accomplished by several means such as active clamping, RC  
snubbing, load line shaping, etc. The safe level for these  
devices is specified as Reverse Bias Safe Operating Area  
and represents the voltage−current conditions during  
reverse biased turn−off. This rating is verified under  
clamped conditions so that the device is never subjected to  
an avalanche mode. Figure 5 gives RBSOA characteristics.  
C
B1  
= 100
°
C  
T
C
V
R
= 0ꢀ-ꢀ5.0 V  
BE(off)  
= 47
W  
BE  
DUTY CYCLE = 10%  
MJH11017, MJH11018  
MJH11019, MJH11020  
MJH11021, MJH11022  
0
20  
60  
100  
140  
180  
220  
260  
V
CE  
, COLLECTOR-EMITTER VOLTAGE (VOLTS)  
Figure 5. Maximum Rated Reverse Bias  
Safe Operating Area (RBSOA)  
PNP  
NPN  
10,000  
7000  
10,000  
V
CE  
= 5.0 V  
V
CE  
= 5.0 V  
5000  
5000  
T
= 150
°
C  
25
°
C  
3000  
2000  
C
T
= 150
°
C  
2000  
1000  
500  
C
1000  
500  
25
°
C  
-ꢀ55
°
C  
-ꢀ55
°
C  
200  
100  
200  
100  
0.2 0.3  
0.5 0.7
 
1.0  
3.0  
5.0  
10 15  
0.2 0.3  
0.5 0.7 1.0  
3.0  
5.0 7.0 10
 
15  
I ,
 
COLLECTOR CURRENT (AMPS)  
C
I ,
 
COLLECTOR CURRENT (AMPS)  
C
Figure 6. DC Current Gain  
5

MJH11017, MJH11019, MJH11021 (PNP) MJH11018, MJH11020, MJH11022 (NPN)  
PNP  
NPN  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
4.5  
T =
 
25
°
C  
J
T =
 
25
°
C  
J
4.0  
3.5  
3.0  
I
= 15 A  
= 10 A  
C
2.5  
2.0  
I
C
= 15 A  
I
C
I
= 10 A  
C
1.5  
1.0  
1.5  
1.0  
I
C
= 5.0 A  
I
C
= 5.0 A  
1.0 2.0
 
3.0 5.0  
10  
20 30
 
50 100
 
200 300
 
500 1000  
1.0  
2.0 3.0
 
5.0  
10  
20 30
 
50 100
 
20
0
3
00 500 1000  
I ,
 
BASE CURRENT (mA)  
B
I ,
 
BASE CURRENT (mA)  
B
Figure 7. Collector Saturation Region  
PNP  
NPN  
4.0  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
T =
 
25
°
C  
J
3.5  
T =
 
25
°
C  
J
3.0  
2.5  
V
@ I
 
/I =
 
100  
B
V @
 
I /I
 
= 100  
BE(sat) C
 
B  
BE(sat)  
C
2.0  
1.5  
V
BE  
@ V
 
= 5.0 V  
CE  
V
BE  
@ V
 
= 5.0 V  
CE  
1.0  
0.5  
1.0  
0.5  
V
@ I
 
/I =
 
100  
C B  
V
@ I
 
/I =
 
100  
C B  
CE(sat)  
CE(sat)  
0.2 0.3  
0.5 0.7
 
1.0  
2.0 3.0  
5.0 7.0
 
10  
20  
0.2  
0.5 0.7 1.0  
2.0  
5.0  
10  
20  
I ,
 
COLLECTOR CURRENT (AMPS)  
C
I ,
 
COLLECTOR CURRENT (AMPS)  
C
Figure 8. “On” Voltages  
PNP  
NPN  
MJH11018  
MJH11020  
MJH11022  
MJH11017  
MJH11019  
MJH11021  
COLLECTOR  
COLLECTOR  
BASE  
BASE  
EMITTER  
EMITTER  
Figure 9. Darlington Schematic  
6

MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
SOT
−
93 (TO
−
218)  
CASE 340D
−
02  
ISSUE E  
DATE 01/03/2002  
NOTES:  
SCALE 1:1  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING
 
DIMENSION: MILLIMETER.  
C
E
Q
B
MILLIMETERS  
INCHES  
MIN  
DIM MIN  
MAX  
20.35  
15.20  
MAX  
0.801  
0.598  
0.193  
0.051  
0.054  
0.219  
0.118  
0.031  
A
B
C
D
E
G
H
J
—  
14.70  
4.70  
1.10  
1.17  
5.40  
2.00  
0.50  
—  
0.579  
U
4
4.90 0.185  
1.30 0.043  
1.37 0.046  
5.55 0.213  
3.00 0.079  
0.78 0.020  
A
L
S
1
2
3
K
K
L
31.00 REF  
1.220 REF  
—  
4.00  
16.20  
4.10 0.158  
18.20 0.701  
—  
0.638  
0.161  
0.717  
Q
S
U
V
17.80  
4.00 REF  
1.75 REF  
0.157 REF  
0.069  
J
H
D
MARKING DIAGRAM  
V
G
STYLE 1:  
PIN 1.
 
BASE  
STYLE 2:  
AYWW  
xxxxx  
PIN 1.
 
ANODE  
2. CATHODE  
3. ANODE  
2. COLLECTOR  
3. EMITTER  
4. COLLECTOR  
4. CATHODE  
A
Y
= Assembly Location  
=
Y
e
ar  
WW  
= Work Week  
xxxxx =
 
Device Code  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions
 
are uncontrolled
 
except when stamped
 
“CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98ASB42643B  
SOT
−
93  
PAGE 1 OF 1  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically  
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the  
rights of others.  
©
Semiconductor Components Industries, LLC, 2019  

MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
TO
−
247  
CASE 340L
−
02  
ISSUE F  
DATE 26 OCT 2011  
SCALE 1:1  
NOTES:  
−
T
−  
1. DIMENSIONING
 
AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING
 
DIMENSION: MILLIMETER.  
C
−
B
−  
E
MILLIMETERS  
INCHES  
DIM MIN  
MAX  
21.08  
16.26  
5.30  
MIN  
MAX  
8.30  
U
L
A
B
C
D
E
F
20.32  
15.75  
4.70  
1.00  
1.90  
1.65  
0.800  
0.620  
0.185  
0.040  
0.075  
0.065  
N
0.640  
0.209  
0.055  
0.102  
0.084  
4
A
K
1.40  
2.60  
−
Q
−  
M
M
T B  
0.63 (0.025)  
2.13  
1
2
3
G
H
J
5.45 BSC  
0.215 BSC  
1.50  
0.40  
19.81  
5.40  
4.32  
—  
2.49  
0.80  
20.83  
6.20  
5.49  
4.50  
3.65  
0.059  
0.016  
0.780  
0.212  
0.170  
—  
0.098  
0.031  
0.820  
0.244  
0.216  
0.177  
0.144  
P
K
L
−
Y
−  
N
P
Q
U
W
3.55  
0.140  
6.15 BSC  
0.242 BSC  
2.87  
3.12  
0.
1
1
3  
0.123  
W
J
F
2 PL  
H
GENERIC  
G
MARKING DIAGRAM*  
D
3 PL  
M
S
Y Q  
0.25 (0.010)  
STYLE 1:  
PIN 1.
 
GATE  
2. DRAIN  
STYLE 2:  
PIN 1.
 
ANODE  
STYLE 3:  
STYLE 4:  
PIN 1.
 
GATE  
XXXXXXXXX  
AYWWG  
PIN 1.
 
BASE  
2. COLLECTOR  
3. EMITTER  
2. CATHODE
 
(S)  
3. ANODE
 
2  
4. CATHODES
 
(S)  
2. COLLECTOR  
3. EMITTER  
4. COLLECTOR  
3. SOURCE  
4. DRAIN  
4. COLLECTOR  
STYLE 5:  
STYLE 6:  
PIN 1.
 
CATHODE  
2. ANODE  
3. GATE  
PIN 1.
 
MAIN TERMINAL 1  
2. MAIN
 
TERMINAL 2  
3. GATE  
4. ANODE  
4. MAIN
 
TERMINAL 2  
XXXXX =
 
Specific Device Code  
A
Y
= Assembly Location  
=
Y
e
ar  
WW  
G
= Work Week  
= Pb
−
Free Package  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
Pb
−
Fre
e
i
ndicator, “G” or microdot “
G
”,  
may or may not be present.  
98ASB15080C  
ON SEMICONDUCTOR STANDARD  
DOCUMENT NUMBER:  
STATUS:  
Electronic versions are uncontrolled except when  
accessed directly from the Document Repository. Printed  
versions are uncontrolled except when stamped  
“CONTROLLED COPY” in red.  
NEW STANDARD:  
D
E
S
C
R
I
P
T
ION: TO
−
247  
PAGE 1 OF 2  

DOCUMENT NUMBER:  
98ASB15080C  
PAGE 2 OF 2  
ISSUE  
REVISION  
DATE  
D
CHANGE OF OWNERSHIP FROM MOTOROLA TO ON SEMICONDUCTOR. DIM A  
WAS 20.80
−
21.46/0.819
−
0.845. DIM K WAS 19.81
−
20.32/0.780
−
0.800. UPDATED  
STYLE 1, ADDED STYLES 2, 3, & 4. REQ. BY L. HAYES.  
25 AUG 2000  
E
F
DIM E MINIMUM WAS 2.20/0.087. DIM K MINIMUM WAS 20.06/0.790. ADDED  
GENERIC MARKING DIAGRAM. REQ. BY S. ALLEN.  
26 FEB 2010  
26 OCT 2011  
ADDED STYLES 5 AND 6. REQ. BY J. PEREZ.  
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Case Outline Number:  
Octobe
r
,
2
011
−
Rev. 02F  
340L  

ON Semiconductor and  
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ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent  
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−
Marking.pdf
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