VBsemi-Elec-AOB414-VB
| Part # | VBsemi-Elec-AOB414-VB |
Download  | VBsemi-Elec-AOB414-VB |
AOB414
Power MOSFET
FEATURES
PRODUCT SUMMARY
V
DS
(V)
•
Halogen-free According to IEC 61249-2-21
Definition
• Surface Mount
• Low-Profile Through-Hole
• Available in Tape and Reel
• Dynamic dV/dt Rating
• 150 °C Operating Temperature
• Fast Switching
100
R
DS(on)
(
)
V
GS
= 10 V
0.020
Q
g
(Max.) (nC)
Q
gs
(nC)
70
13
Q
gd
(nC)
39
Configuration
Single
• Fully Avalanche Rated
• Compliant to RoHS Directive 2002/95/EC
D
D
2
PAK
(TO-263)
G
G
D
S
S
N-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
UNIT
Drain-Source Voltage
V
DS
100
V
Gate-Source Voltage
V
GS
20
70
T
C
= 25 °C
C
= 100 °C
Continuous Drain Current
V
GS
at 10 V
I
D
T
A
56
Pulsed Drain Current
a, e
Linear Derating Factor
Single Pulse Avalanche Energy
b, e
Avalanche Current
a
I
DM
250
1.0
580
20
W/°C
mJ
A
E
AS
I
AR
Repetiitive Avalanche Energy
a
E
AR
mJ
13
T
C
= 25 °C
3.1
130
Maximum Power Dissipation
P
D
W
V/ns
°C
T
A
= 25 °C
Peak Diode Recovery dV/dt
c, e
dV/dt
5.0
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
T
J
, T
stg
– 55 to + 150
for 10 s
300
d
Notes
a. Repetitive
rating; pulse width limited by maximum junction temperature (see fig. 11).
b. V
DD
= 50 V, starting T
J
= 25 °C, L = 2.7 mH, R
g
= 25
, I
AS
= 18 A (see fig. 12).
c. I
SD
20 A,
dI/dt
150 A/μs, V
DD
V
DS
, T
J
150 °C.
d. 1.6
mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
1
AOB414
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
40
UNIT
Maximum Junction-to-Ambient
(PCB Mounted, Steady-State)
a
R
thJA
–
–
°C/W
Maximum Junction-to-Case (Drain)
R
thJC
1.0
Note
a. When
mounted on 1″ square PCB (FR-4 or G-10 material).
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX. UNIT
Static
Drain-Source Breakdown Voltage
V
DS
V
DS
/T
J
V
GS(th)
I
GSS
V
GS
= 0 V, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
c
V
DS
= V
GS
, I
D
= 250 μA
100
–
–
V
V/°C
V
V
DS
Temperature Coefficient
–
2.0
–
0.29
–
Gate-Source Threshold Voltage
Gate-Source Leakage
–
4.0
100
25
250
V
GS
V
DS
=100 V,
V
GS
= 0 V
DS
= 80 V,
V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
I
D
= 11 A
b
=
20 V
–
nA
–
–
Zero Gate Voltage Drain Current
I
DSS
μA
V
–
–
0.020
–
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
R
DS(on)
g
fs
–
–
–
V
DS
= 50 V, I
D
= 11 A
d
6.7
S
Input Capacitance
C
iss
C
oss
C
rss
Q
g
–
–
–
–
–
–
–
–
–
–
1300
430
130
–
–
–
V
GS
= 0 V,
V
DS
= 25 V,
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
pF
nC
f = 1.0 MHz, see fig. 5
d
–
70
13
39
–
I
D
= 20 A, V
DS
= 160 V,
Gate-Source Charge
Gate-Drain Charge
Q
gs
Q
gd
t
d(on)
t
r
V
GS
= 10 V
–
see fig. 6 and 13
b, c
–
Turn-On Delay Time
Rise Time
14
51
45
36
–
V
DD
= 50 V, I
D
= 20 A,
ns
Turn-Off Delay Time
Fall Time
t
d(off)
t
f
R
g
= 9.1
, R
D
= 5.4
, see fig. 10
b, c
–
–
Drain-Source Body Diode Characteristics
MOSFET symbol
showing the
integral reverse
p – n junction diode
D
Continuous Source-Drain Diode Current
Pulsed Diode Forward Current
a
I
S
–
–
–
–
20
72
A
G
I
SM
S
Body Diode Voltage
V
SD
t
rr
T
J
= 25 °C, I
S
= 20 A, V
GS
= 0 V
b
–
–
–
–
2.0
610
7.1
V
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
300
3.4
ns
μC
T
J
= 25 °C, I
F
= 20 A, dI/dt = 100 A/μs
b, c
Q
rr
t
on
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
Notes
a. Repetitive
rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse
width
300 μs; duty cycle
2 %.
c. Uses
IRF640/SiHF640 data and test conditions.
2
AOB414
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
V
GS
T
o
p
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
4.5 V
150
°
C
10
1
10
0
10
1
25
°
C
Bottom
10
0
4.5 V
20 µs Pulse Width
20 µs Pulse Width
T
C
=
25 °C
10
-1
V
DS
=
50 V
10
0
10
1
5
6
7
8
9
10
10
-1
4
V
DS
, Drain-to-Source Voltage (V)
91037_03
V
GS
,
Gate-to-Source Voltage (V)
91037_01
Fig. 1 – Typical Output Characteristics, T
J
= 25 °C
Fig. 3 – Typical Transfer Characteristics
3.0
2.5
V
GS
15 V
10 V
I
D
= 20 A
V
GS
= 10 V
T
o
p
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
4.5 V
10
1
2.0
1.5
Bottom
4.5 V
1.0
0.5
10
0
20 µs Pulse Width
T
C
=
150 °C
0.0
10
-1
10
0
10
1
– 60 – 40 – 20
0
20 40 60 80
100 120
140 160
V
DS
,
Drain-to-Source Voltage (V)
91037_02
T
J
,
Junction
T
e
mperature (°C)
91037_04
Fig. 2 – Typical Output Characteristics, T
J
= 175 °C
Fig. 4 – Normalized On-Resistance vs. Temperature
3
AOB414
3000
V
GS
= 0
V
, f = 1
M
Hz
C
iss
= C
gs
+ C
gd
, C
ds
Shorted
C
rss
= C
gd
2500
2000
1500
1000
500
150
°
C
C
oss
= C
ds
+ C
gd
25
°
C
10
1
C
iss
C
oss
C
rss
10
0
V
GS
= 0 V
0
10
0
10
1
1.30
1.50
0.50
0.70
0.90
1.10
V
DS
,
Drain-to-Source Voltage (V)
91037_05
V
SD
, Source-to-Drain Voltage (V)
91037_07
Fig. 5 – Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 – Typical Source-Drain Diode Forward Voltage
10
3
5
20
I
D
= 20 A
Operation in this area limited
by R
DS(on)
V
DS
= 160 V
2
16
12
8
10
2
10
µs
5
V
DS
= 100 V
V
DS
= 40 V
100
µs
2
10
5
1
ms
2
10
ms
1
4
5
T
C
= 25
°
C
T
J
= 150
°
C
Single Pulse
For test circuit
see figure 13
2
0
0.1
5
2
5
2
5
2
5
2
10
2
10
3
0
30
75
0.1
1
10
15
45
60
Q
G
,
T
o
tal Gate Charge (nC)
V
DS
, Drain-to-Source Voltage (V)
91037_06
91037_08
Fig. 6 – Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 8 – Maximum Safe Operating Area
4
AOB414
R
D
V
DS
22
18
14
V
GS
D.U.T.
R
g
+
–
V
DD
10 V
Pulse width
≤
1 µs
Duty factor
≤
0.1 %
10
Fig. 10a – Switching Time Test Circuit
5
0
V
DS
90 %
25
50
75
100
125
150
T
C
, Case
T
e
mperature (°C)
91037_09
10 %
V
GS
Fig. 9 – Maximum Drain Current vs. Case Temperature
t
d(on)
t
r
t
d(off)
t
f
Fig. 10b – Switching Time Waveforms
10
1
0
−
0.5
0.2
0.1
0.1
P
DM
0.05
0.02
t
1
Single Pulse
0.01
(Thermal Response)
t
2
10
-2
10
-3
Notes:
1. Duty
Factor, D = t
1
/t
2
2. Peak
T
j
= P
DM
x Z
thJC
+ T
C
10
-5
10
-4
10
-3
10
-2
0.1
1
10
t
1
, Rectangular Pulse Duration (s)
91037_11
Fig. 11 – Maximum Effective Transient Thermal Impedance, Junction-to-Case
5
AOB414
V
DS
15 V
t
p
Driver
L
V
DS
R
g
D.U.T.
+
–
V
A
DD
I
AS
I
AS
20 V
0.01
Ω
t
p
Fig. 12a – Unclamped Inductive Test Circuit
Fig. 12b – Unclamped Inductive Waveforms
1400
1200
I
D
8.0 A
11.0 A
T
o
p
Bottom 20.0
A
1000
800
600
400
200
V
DD
= 50 V
25
0
125
75
100
150
50
91037_12c
Starting T
J
, Junction
T
e
mperature (°C)
Fig. 12c – Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 k
Ω
Q
G
10 V
12 V
0.2 µF
0.3 µF
Q
GS
Q
GD
+
–
V
DS
D.U.T.
V
G
V
GS
3 mA
Charge
I
G
I
D
Current sampling resistors
Fig. 13a – Basic Gate Charge Waveform
Fig. 13b – Gate Charge Test Circuit
6
AOB414
Peak Dio
d
e Recovery
d
V/
d
t Test Circuit
+
Circuit layout con
s
ideration
s
•
Low
s
tray inductance
•
G
round plane
D.U.T.
•
Low leakage inductance
current tran
s
former
–
+
–
–
+
R
g
•
dV/dt controlled by R
g
•
Driver
s
ame type a
s
D.U.T.
•
I
S
D
controlled by duty factor “D”
•
D.U.T. – device under te
s
t
+
–
V
DD
Driver gate drive
P.W.
P.W.
D =
Period
Period
V
GS
= 10 V
a
D.U.T. l
S
D
waveform
D.U.T. V
D
S
waveform
Rever
s
e
recovery
current
Body diode forward
current
dI/dt
Diode recovery
dV/dt
V
DD
Re-applied
voltage
Body diode forward drop
Inductor current
I
S
D
Ripple
≤
5 %
Note
a. V
GS
= 5 V for logic level device
s
Fig. 14 – For N-Channel
7
AOB414
TO-263AB (HIGH VOLTAGE)
A
B
(Dat
u
m A)
3
4
A
A
E
c2
H
L1
4
Ga
u
ge
plane
4
0° to
8
°
B
5
Detail A
Seating plane
D
H
L
C
C
A1
L3
L4
Detail “A”
1
2
3
L2
Rotated 90° CW
B
B
scale
8
:1
A
2 x
b
2
2 x
b
c
E
M
M
B
0.010
A
M
± 0.004
B
2 x e
Base
metal
5
D1
4
Plating
(c)
b
1,
b
3
5
c1
(
b
,
b
2)
Lead tip
4
E1
Section B – B and C – C
Scale: none
V
ie
w
A – A
MILLIMETERS
INCHES
MILLIMETERS
INCHES
DIM.
A
MIN.
4.06
0.00
0.51
0.51
1.14
1.14
0.38
0.38
1.14
8.38
MAX.
4.83
0.25
0.99
0.89
1.78
1.73
0.74
0.58
1.65
9.65
MIN.
0.160
0.000
0.020
0.020
0.045
0.045
0.015
0.015
0.045
0.330
MAX.
0.190
0.010
0.039
0.035
0.070
0.068
0.029
0.023
0.065
0.380
DIM.
D1
E
MIN.
6.86
MAX.
MIN.
MAX.
–
10.67
–
0.270
0.380
0.245
–
0.420
–
A1
b
9.65
6.22
E1
e
b1
b2
b3
c
2.54 BSC
0.100 BSC
H
14.61
15.88
2.79
1.65
1.78
0.575
0.625
0.110
0.066
0.070
L
1.78
0.070
L1
L2
L3
L4
–
–
–
–
c1
c2
D
0.25 BSC
0.010 BSC
4.78
5.28
0.188
0.208
ECN: S-82110-Rev. A, 15-Sep-08
D
W
G: 5970
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimensions are shown in millimeters (inches).
3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005″) per side. These dimensions are measured at the
outmost extremes of the plastic body at datum A.
4. Thermal PAD contour optional within dimension E, L1, D1 and E1.
5. Dimension b1 and c1 apply to base metal only.
6. Datum A and B to be determined at datum plane H.
7. Outline conforms to JEDEC outline to TO-263AB.
8
AOB414
2
RECOMMENDED MINIMUM PADS FOR D PAK:
3-Lead
0.420
(10.668)
0.145
(3.683)
0.135
(3.429)
0.200
0.050
(5.080)
(1.257)
Recommended Minimum Pads
Dimensions in Inches/(mm)
9
AOB414
Disclaimer
All products due to improve reliability, function or design or for other reasons, product specifications and
data are subject to change without notice.
Taiwan VBsemi Electronics Co., Ltd., branches, agents, employees, and all persons acting on its or their
representatives (collectively, the “
T
aiwan VBsemi”), assumes no responsibility for any errors, inaccuracies or
incomplete data contained in the table or any other any disclosure of any information related to the
Taiwan VBsemi makes no guarantee, representation or warranty on the product for any particular purpose of
any goods or continuous production.
T
o
t
he maximum extent permitted by applicable law on
T
aiwan VBsemi
relinquished: (1) any application and all liability arising out of or use of any products; (2) any and all liability,
including but not limited to special, consequential damages or incidental ; (3) any and all implied warranties,
including a particular purpose, non-infringement and merchantability guarantee.
Statement on certain types of applications are based on knowledge of the product is often used in a typical
application of the general product VBsemi
T
aiwan demand that the Taiwan VBsemi of. Statement on whether the
product is suitable for a particular application is non-binding. It is the customer’s responsibility to verify specific
product features in the products described in the specification is appropriate for use in a particular application.
Parameter data sheets and technical specifications can be provided may vary depending on the application and
performance over time. All operating parameters, including typical parameters must be made by customer’s
technical experts validated for each customer application. Product specifications do not expand or modify
T
aiwan
VBsemi purchasing terms and conditions, including but not limited to warranty herein.
Unless expressly stated in writing,
T
aiwan VBsemi products are not intended for use in medical, life saving,
or life sustaining applications or any other application. Wherein VBsemi product failure could lead to personal
injury or death, use or sale of products used in
T
aiwan VBsemi such applications using client did not express their
own risk. Contact your authorized
T
aiwan VBsemi people who are related to product design applications and
other terms and conditions in writing.
The information provided in this document and the company’s products without a license, express or implied,
by estoppel or otherwise, to any intellectual property rights granted to the VBsemi act or document. Product
names and trademarks referred to herein are trademarks of their respective representatives will be all.
Material Category Policy
Taiwan VBsemi Electronics Co., Ltd., hereby certify that all of the products are determined to be
RoHS compliant and meets the definition of restrictions under Directive of the European Parliament
2011/65 / EU, 2011 Nian. 6. 8 Ri Yue restrict the use of certain hazardous substances in electrical and
electronic equipment (EEE) – modification, unless otherwise specified as
inconsistent.(www.VBsemi.com)
Please note that some documents may still refer to Taiwan VBsemi RoHS Directive 2002/95 / EC. We
confirm that all products identified as consistent with the Directive 2002/95 / EC European Directive
2011/65 /.
Taiwan VBsemi Electronics Co., Ltd. hereby certify that all of its products comply identified as
halogen-free halogen-free standards required by the JEDEC JS709A. Please note that some Taiwanese
VBsemi documents still refer to the definition of IEC 61249-2-21, and we are sure that all products
conform to confirm compliance with IEC 61249-2-21 standard level JS709A.
