STMicroelectronics-SD2941-10W
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SD2941-10
HF/VHF/UHF RF power N-channel MOSFE
T
s
Datasheet
–
production data
Features
•
Gold metallization
•
Excellent thermal stability
•
Common source configuration
•
P
= 175 W min. with 15 dB gain @ 175
MHz, 50 V
OUT
•
P
= 135 W typ. with 14 dB gain @ 123 MHz,
OUT
28 V
M174 Epoxy sealed
•
Low R
DS(on)
•
Thermally enhanced packaging for lower
junction temperatures
•
In compliance with the 2002/95/EC1 European
Figure 1. Pin connection
directive
Description
4
1
1. Drain
The SD2941-10 is a gold metalized N-channel
MOS field-effect RF power transistor, intended for
use in 28 V to 50 V dc large signal applications up
2. Source
3. Gate
to 230 MHz. It offers 25% lower R
industry standard, with 20% higher P
than the
than
DS(on)
4. Source
SAT
3
2
ST’s SD2931-10 device. The SD2941-10 is
housed in the low thermal M174 non-pedestal
package, offering 25% lower thermal resistance
than the industry standard, thus rendering it the
“best-in-class” transistor for ISM applications,
where reliability and ruggedness are critical
factor.
Table 1. Device summary
Base qty.
Order code
Marking
SD2941-10
(1)
Package
Packaging
(1)
SD2941-10W
25 pcs
M174
Plastic tray
August 2015
DocID11815 Rev 6
1/17
This is information on a product in full production.
Contents
SD2941-10
Contents
Electrical data
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Maximum rating
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
Electrical characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Impedance .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Test circuit
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision history
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2/17
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SD2941-10
Electrical data
1
Electrical data
1.1
Maximum rating
(T
= 25
°
C)
CASE
Table 2. Absolute maximum rating
Parameter
Symbol
Value
Unit
(1)
V
(BR)DSS
Drain source voltage
130
130
±40
20
V
V
(1)
V
DGR
Drain-gate voltage (R
GS
= 1
M
Ω
)
Gate-source voltage
V
GS
V
I
D
P
DISS
Drain current
A
Power dissipation
389
200
W
°C
T
J
Max. operating junction temperature
Storage temperature
T
STG
-65 to +150
°C
1. T
J
= 150 °C
Table 3. Thermal data
Symbol
Parameter
Value
Unit
R
thJC
Junction to case thermal resistance
0.45
°C/W
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Electrical characteristics
SD2941-10
2
Electrical characteristics
(T
= 25
°
C)
CASE
Table 4. Static
Test conditions
Symbol
Min. Typ. Max. Unit
(1)
V
(BR)DSS
I
DSS
V
GS
= 0 V
V
GS
= 0 V
V
GS
= 20 V
V
DS
= 10 V
I
DS
= 100 mA
V
DS
= 50 V
V
DS
= 0 V
I
D
= 250 mA
I
D
= 10 A
130
V
mA
nA
V
50
250
IGSS
(2)
V
GS(Q)
V
DS(ON)
V
GS
= 10 V
2.0
V
G
FS
C
ISS
C
OSS
V
DS
= 10 V
V
GS
= 0 V
V
GS
= 0 V
V
GS
= 0 V
I
D
= 5 A
5
6
mho
pF
pF
pF
V
DS
= 50 V
V
DS
= 50 V
V
DS
= 50 V
f = 1 MHz
f = 1 MHz
f = 1 MHz
415
236
17
CRSS
1. T
J
= 150
°
C
2. V
GS(Q)
sorted with alpha/numeric code marked on unit.
Table 5. Dynamic
Test conditions
V
DD
= 28 V
I
DQ
= 250 mA
f = 123 MHz
DD
= 50 V
I
DQ
= 250 mA
f = 175 MHz
Symbol
Min. Typ.
Max. Unit
135
P
OUT
W
V
175
14
200
14
V
DD
= 28 V
I
DQ
= 250 mA
P
OUT =
135 W
f = 123 MHz
V
DD
= 50 V
I
DQ
= 250 mA
P
OUT =
175 W
f = 175 MHz
V
DD
= 28 V
I
DQ
= 250 mA
P
OUT
= 135 W
f = 123 MHz
V
DD
= 50 V
I
DQ
= 250 mA
P
OUT
= 175 W
f = 175MHz
G
PS
dB
%
15.8
65
–
h
D
55
65
V
DD
= 50 V
I
DQ
= 250 mA
P
OUT =
175 W
f = 175MHz
All phase angles
10:1
Load
Mismatch
VSWR
V
DD
= 28 V
I
DQ
= 250 mA
P
OUT =
135 W
f = 123 MHz
All phase angles
25:1
4/17
DocID11815 Rev 6
SD2941-10
Electrical characteristics
Table 6. V
sorts
GS
Symbol
Value
Symbol
Value
Symbol
Value
AA
BB
CC
DD
EE
A
1.5 – 1.6
1.6 – 1.7
1.7 – 1.8
1.8 – 1.9
1.9 – 2.0
2.0 – 2.1
2.1 – 2.2
2.2 – 2.3
2.3 – 2.4
E
F
2.4 – 2.5
2.5 – 2.6
2.6 – 2.7
2.7 – 2.8
2.8 – 2.9
2.9 – 3.0
3.0 – 3.1
3.1 – 3.2
3.2 – 3.3
P
Q
R
S
T
3.3 – 3.4
3.4 – 3.5
3.5 – 3.6
3.6 – 3.7
3.7 – 3.8
3.8 – 3.9
3.9 – 4.0
G
H
J
K
L
U
V
B
C
M
N
D
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Impedance
SD2941-10
3
Impedance
Figure 2. Impedance data schematic
D
Z
DL
Typical Input
Impedance
Typical Drain
Load Impedance
G
Z
in
S
Table 7. Impedance data @ 28 V
f
Z
IN
(
Ω
)
Z
DL (100W)
(
Ω
)
Z
DL (140W)
(
Ω
)
2.0 + j 0.73
123 MHz
1.2 – j 3.3
2.0 + j 1.4
Table 8. Impedance data @ 50 V
f
Z
IN
(
Ω
)
Z
DL
(
Ω
)
30 MHz
1.7 – j 5.7
1.2 – j 2.0
6.8 + j 0.9
2.0 + j 2.4
175 MHz
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SD2941-10
Typical performance
4
Typical performance
Figure 3. Capacitance vs drain voltage
Figure 4. Drain current vs gate voltage
10000
20
15
10
5
Tc=-20 °C
Tc=+25 °C
f =1MHz
1000
100
10
Ciss
Coss
Tc=+80 °C
VDS = 10 V
Crss
0
0
10
20
30
40
50
2
2.5
3
3.5
4
4.5
5
5.5
6
VDS, DRAIN-SOURCE VOLTAGE (V)
VGS, GATE-SOURCE VOLTAGE (V)
Figure 5. Maximum thermal resistance vs case
temperature
Figure 6. Safe operating area
0.6
0.56
0.52
0.48
0.44
100
10
1
(1)
25
35
45
55
65
75
85
1
10
100
1000
Tc, CASE TEMPERATURE (°C)
Vds(V)
(1) Current in this area may be limited by R
ds(on)
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Typical performance
SD2941-10
Figure 7. Power gain vs output power
Figure 8. Efficiency vs output power
22
21
20
19
18
17
16
15
14
13
12
80
70
60
50
40
30
20
10
0
175 MHz
100 MHz
100 MHz
175 MHz
Vdd = 50V
Idq = 250mA
Vdd = 50V
I
d
q = 250mA
0
25
50
75 100
125 150 175 200 225 250 275
Pout (
W
)
0
25
50
75 100
125 150 175 200 225 250 275
Pout (
W
)
Figure 9. Input return loss vs output power
Figure 10. Gain and efficiency vs output power
@ 28V and 100W load line
24
100
90
20
18
20
80
16
14
175 MHz
70
16
12
60
12
10
8
50
40
30
20
100 MHz
8
6
Gain
80
Efficiency
4
4
Vdd = 50V
Idq = 250mA
Freq = 123 MHz
Idq = 250mA
10
0
2
0
0
0
20
40
60
100
120
140
160
0
25
50
75 100
125 150 175 200 225 250 275
Pout (
W
)
Output Power (W)
8/17
DocID11815 Rev 6
SD2941-10
Typical performance
Figure 11. Gain and efficiency vs output power
@ 28V and 140W load line
100
90
20
18
80
16
14
70
60
12
10
8
50
40
30
20
6
Gain
80
Efficiency
4
Freq = 123 MHz
Idq = 250mA
10
0
2
0
0
20
40
60
100
120
140
160
Output Power (W)
DocID11815 Rev 6
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Test circuit
SD2941-10
5
Test circuit
Figure 12. 30 MHz test circuit schematic (engineering test circuit)
Note:
All dimension are in inches.
Table 9. 30 MHz test circuit component part list
Symbol
Description
T2
FB1
1:4 transformer, 25
Ω
semi-rigid coax.141 OD 6” Long
T
o
roid X 2, 0.5” OD.312” ID 850µ 2 turns
VK200
FB2, FB3
FB4
Shield bead, 1” OD 0.5” ID 850µ 3 Turns
1/4 Wave Choke, 50W Semi-rigid coax.141 OD 12” Long
0.62” woven fiberglass, 1 oz. copper, 2 sides,
ε
r = 2.55
470
Ω
1 W chip resistor
L1
PCB
R1, R3
R2
360
Ω
1/2 W resistor
R4
20 K
Ω
10 turn potentiometer
560
Ω
1 W resistor
R5
C1, C11
C2
470 pF ATC chip cap
43 pF ATC chip cap
C3, C8, C9
C4
Arco 404, 12-65 pF
Arco 423, 16-100 pF
C5
120 pF ATC chip cap
C6
0.01
μ
F ATC chip cap
C7
30 pF ATC chip cap
10/17
DocID11815 Rev 6
SD2941-10
Test circuit
Table 9. 30 MHz test circuit component part list (continued)
Description
Symbol
C10
91 pF ATC chip cap
C12, C15
1200 pF ATC chip cap
C13, C14,C16, C17
0.01 mF / 500 V chip cap
C18
10 mF 63 V electrolytic capacitor
Figure 13. 175 MHz test circuit photomaster
6.4 inches
DocID11815 Rev 6
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Test circuit
SD2941-10
Figure 14. 175 MHz test circuit
12/17
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SD2941-10
Package information
6
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
®
®
ECOPACK packages,
depending on their level of environmental compliance. ECOPACK
®
ECOPACK is
an ST trademark.
Figure 15. M174 package dimensions
DocID11815 Rev 6
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17
Package information
SD2941-10
Table 10. M174 (.500 DIA 4/L N/HERM W/FLG)
mm.
inch
typ.
DIM.
min.
typ.
max
min.
max
A
B
C
D
E
F
G
H
I
5.56
5.584
0.219
0.230
3.18
0.125
0.125
6.22
6.48
0.245
0.720
0.255
0.730
18.28
18.54
3.18
24.64
12.57
0.08
24.89
12.83
0.18
3.00
0.970
0.495
0.003
0.083
0.150
0.980
0.505
0.007
0.118
0.175
0.280
1.050
0.130
2.11
J
3.81
4.45
7.11
K
L
25.53
3.05
26.67
3.30
1.005
0.120
M
14/17
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SD2941-10
Marking, packing and shipping specifications
7
Marking, packing and shipping specifications
Table 11. Packing and shipping specifications
Pcs per
tray
Dry pack
humidity
Order code
Packaging
V
GS
code
Lot code
SD2941-10W
Plastic tray
25
< 10%
Not mixed
Not mixed
Figure 16. Marking layout
SD2941-10
Table 12. Marking specifications
Description
Symbol
W
X
Wafer process code
V
GS
sort
CZ
xxx
VY
MAR
CZ
y
Assembly plant
Last 3 digit of diffusion lot
Diffusion plant
Country of origin
T
e
st and finishing plant
Assembly year
yy
Assembly week
DocID11815 Rev 6
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Revision history
SD2941-10
8
Revision history
Table 13. Document revision history
Changes
Date
Revision
15-Nov-2005
06-Apr-2006
13-Apr-2006
1
2
3
Initial release
Complete version
V
DS(ON)
updated
19-Oct-2011
04-Aug-2014
14-Aug-2015
4
5
6
Minor text changes in the title and description on the coverpage.
Added performances at 28
V
.
Minor text changes.
16/17
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SD2941-10
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T
.
A
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2015 STMicroelectronics – All rights reserved
DocID11815 Rev 6
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