STMicroelectronics-STFI20NK50Z
| Part # | STMicroelectronics-STFI20NK50Z |
Download  | STMicroelectronics-STFI20NK50Z |
STFI20NK50Z
N-channel 500
V
,
0
.23
Ω
, 17 A Zener-protected SuperMESH™
Power MOSFET in I²
P
A
KFP package
Datasheet — production data
Features
R
DS(on)
max
Type
V
DSS
I
D
P
TOT
STFI20NK50Z 500
V <
0.27
Ω
17 A
40 W
■
Fully insulated and low profile package with
increased creepage path from pin to heatsink
plate
1
2
3
■
Extremely high dv/dt capability
■
100% avalanche tested
■
Gate charge minimized
I
2
P
A
KFP
(TO-281)
Applications
Figure 1.
Internal schematic diagram
■
Switching applications
D(2)
Description
This device is an N-channel Zener-protected
Power MOSFET developed using
G(1)
STMicroelectronics’ SuperMESH™ technolog
y
,
achieved through optimization of ST’s well-
established strip-based PowerMESH™ layout. In
addition to a significant reduction in on-
resistance, this device is designed to ensure a
high level of dv/dt capability for the most
demanding applications.
S(3)
AM01476v1
Table 1.
Device summary
Order codes
Marking
Package
Packaging
I
2
P
A
KFP
(TO-281)
STFI20NK50Z
20NK50Z
T
u
be
March 2012
Doc ID 019007 Rev 3
1/13
This is information on a product in full production.
13
Contents
STFI20NK50Z
Contents
Electrical ratings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Test circuits
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2/13
Doc ID 019007 Rev 3
STFI20NK50Z
Electrical ratings
1
Electrical ratings
Table 2.
Symbol
Absolute maximum ratings
Parameter
Value
Unit
V
DS
V
GS
I
D
Drain-source voltage
500
30
V
V
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
17
(1)
10.71
(1)
68
A
I
D
A
(2)
I
DM
A
P
TOT
T
o
tal dissipation at T
C
= 25 °C
40
W
Gate-source human body model
ESD
6
kV
V
(R=1,5 k
Ω
, C=100 pF)
Insulation withstand voltage (RMS) from all three
leads to external heat sink (t = 1 s; T
C
= 25 °C)
V
ISO
2500
dv/dt
(3)
T
stg
Peak diode recovery voltage slope
Storage temperature
4.5
-55 to 150
150
V/ns
°C
T
j
Max operating junction temperature
°C
1. Limited
by maximum junction temperature.
2. Pulse
width limited by safe operating area.
3.
I
< 17 A, di/dt < 200 A/µs, V
=80% V
SD DD
(BR)DSS
T
a
ble 3.
Symbol
R
thj-case
R
thj-amb
Thermal data
Parameter
Value
Unit
Thermal resistance junction-case max
Thermal resistance junction-ambient max
3.1
°C/W
°C/W
62.5
T
a
ble 4.
Avalanche characteristics
Parameter
Symbol
Value
Unit
(1)
I
AR
Repetitive or non repetitive avalanche current
17
A
Single pulse avalanche energy
E
AS
850
mJ
(starting T
J
=25 °C, I
D
=I
AR
, V
DD
=50 V)
1. Limited
by maximum junction temperature.
Doc ID 019007 Rev 3
3/13
Electrical characteristics
STFI20NK50Z
2
Electrical characteristics
(T
CASE
= 25 °C unless otherwise specified)
T
a
ble 5.
Symbol
On/off states
Parameter
Test conditions
Min. Typ. Max. Unit
Drain-source
V
(BR)DSS
I
D
=1 mA
500
V
breakdown voltage
(V
GS
= 0)
Zero gate voltage
V
DS
= 500 V
DS
= 500
V
,
T
C
= 125 °C
1
µA
µA
I
DSS
drain current (V
GS
= 0)
V
50
Gate-body leakage
current (V
DS
= 0)
I
GSS
V
GS
=
20 V
10
µA
V
V
GS(th)
Gate threshold voltage
V
DS
= V
GS
, I
D
= 100 µA
V
GS
= 10
V
,
I
D
= 8.5 A
3
3.75 4.5
0.23 0.27
Static drain-source on
resistance
R
DS(on)
Ω
T
a
ble 6.
Symbol
Dynamic
Parameter
Test conditions
Min. Typ. Max. Unit
(1)
g
fs
Forward transconductance
V
DS
= 15
V
,
I
D
= 8.5 A
–
13
S
C
iss
C
oss
C
rss
Input capacitance
2600
328
72
pF
pF
pF
V
DS
= 25
V
, f = 1
M
Hz,
Output capacitance
–
V
GS
= 0
Reverse transfer capacitance
Equivalent output
capacitance
(2)
C
oss eq.
V
DS
=0, V
DS
= 0 to 640 V
DD
= 250
V
,
I
D
= 8.5 A,
–
–
187
pF
t
d(on)
t
r
t
d(off)
t
f
T
u
rn-on delay time
Rise time
28
20
70
15
ns
ns
ns
ns
V
R
G
= 4.7
Ω
,
V
GS
= 10 V
T
u
rn-off delay time
Fall time
Q
g
Q
gs
Q
gd
T
o
tal gate charge
Gate-source charge
Gate-drain charge
V
DD
= 400
V
,
I
D
= 17 A,
85
15.5
42
119
nC
nC
nC
V
GS
= 10 V
–
1. Pulsed:
pulse duration=300µs, duty cycle 1.5%
2. is
defined as a constant equivalent capacitance giving the same charging time as C
C
when V
DS
oss eq.
oss
increases from 0 to 80% V
.
DSS
4/13
Doc ID 019007 Rev 3
STFI20NK50Z
Electrical characteristics
T
a
ble 7.
Source drain diode
Parameter
Symbol
Test conditions
Min.
Typ. Max. Unit
I
SD
Source-drain current
17
68
A
A
–
–
(1)
I
SDM
Source-drain current (pulsed)
(2)
V
SD
Forward on voltage
I
SD
= 17 A, V
GS
= 0
1.6
V
I
SD
= 17 A,
t
rr
Reverse recovery time
Reverse recovery charge
Reverse recovery current
355
3.90
22
ns
µC
A
di/dt = 100 A/µs
V
R
= 100 V
Q
rr
–
–
I
RRM
I
SD
= 17 A,
t
rr
Reverse recovery time
Reverse recovery charge
Reverse recovery current
440
5.72
26
ns
µC
A
di/dt = 100 A/µs
V
R
= 100
V
,
T
j = 150 °C
Q
rr
I
RRM
1. Pulsed:
pulse duration=300µs, duty cycle 1.5%
2. Pulse
width limited by safe operating area.
Table 8.
Symbol
Gate-source Zener diode
Parameter
Test conditions
1mA
Min. Typ. Max. Unit
30
Gate-source breakdown voltage
(I
D
= 0)
V
(BR)GSO
I
GS
=
–
V
The built-in back-to-back Zener diodes have specifically been designed to enhance not only
the device’s ESD capabilit
y
, but also to make them safely absorb possible voltage transients
that may occasionally be applied from gate to source. In this respect the Zener voltage is
appropriate to achieve an efficient and cost-effective intervention to protect the device’s
integrit
y
.
T
hese integrated Zener diodes thus avoid the usage of external components.
Doc ID 019007 Rev 3
5/13
Electrical characteristics
STFI20NK50Z
2.1
Electrical characteristics (curves)
Figure 2.
Safe operating area
Output characteristics
Transconductance
Figure 3.
Figure 5.
Figure 7.
Thermal impedance
Figure 4.
Transfer characteristics
Figure 6.
Static drain-source on resistance
6/13
Doc ID 019007 Rev 3
STFI20NK50Z
Electrical characteristics
Figure 8.
Gate charge vs gate-source voltage
Figure 9.
Capacitance variations
Figure 10.
Normalized gate threshold voltage
Figure 11.
Normalized on resistance vs
vs temperature
temperature
-;ꢀꢁꢂꢊꢄ
-;ꢀꢁꢂꢃꢄ
H
6
E
/
H
9E
;
6
D
6
E
ꢀa`ꢁ
ꢀ`ad_ꢁ
H
9
E
ꢀfZꢁ
ꢀ`ad_ꢁ
/#””
g
3
ꢁꢅꢈ
ꢁꢅꢄ
ꢀꢅꢈ
ꢀꢅꢄ
ꢀꢅꢀ
ꢀ
ꢄꢅꢂ
ꢄꢅꢆ
H
9
E
/#”H
;
6
/* ‘3
ꢄꢅꢇ
ꢄꢅꢉ
ꢄꢅꢈ
ꢄ
F
<
ꢀ
z
5
ꢁ
ꢀꢄꢄ ꢀꢈꢄ
F
<
ꢀ
z
5
ꢁ
ªꢀꢄꢄ ªꢈꢄ
ꢄ
ꢈꢄ
ªꢀꢄꢄ ªꢈꢄ
ꢄ
ꢈꢄ
ꢀꢄꢄ ꢀꢈꢄ
Figure 12.
Maximum avalanche energy vs
Figure 13.
Normalized B
VDSS
vs temperature
temperature
-;ꢀꢁꢂꢇꢄ
-;ꢀꢁꢂꢉꢄ
4
H
6E
E
ꢀHꢁ
;
6
/#_3
7
Se
ꢀ_<ꢁ
;
6
/#)3
ꢀ`ad_ꢁ
ꢀꢅꢀ
ꢀꢄꢄꢄ
ꢆꢄꢄ
ꢉꢄꢄ
ꢊꢄꢄ
ꢁꢄꢄ
ꢀꢅꢄꢈ
ꢀꢅꢄ
ꢄꢅꢂꢈ
ꢄꢅꢂ
ꢄꢅꢆꢈ
ªꢀꢄꢄ ªꢈꢄ
ꢄ
F
<
ꢀ
z
5
ꢁ
ꢀꢄꢄ ꢀꢈꢄ
ꢈꢄ
F
<
ꢀ
z
5
ꢁ
ꢁꢈ
ꢇꢈ
ꢄ
ꢈꢄ
ꢀꢄꢄ ꢀꢁꢈ
Doc ID 019007 Rev 3
7/13
Electrical characteristics
STFI20NK50Z
Figure 14.
Source-drain diode forward
characteristic
8/13
Doc ID 019007 Rev 3
STFI20NK50Z
Test circuits
3
Test circuits
Figure 15.
Switching times test circuit for
resistive load
Figure 16.
Gate charge test circuit
V
DD
12V
47k
Ω
1k
Ω
100nF
2200
3
.
3
μ
F
R
L
μ
F
I
G
=CON
S
T
V
DD
100
Ω
V
i
=20V=V
GMAX
D.U.
T
.
V
G
V
D
R
G
V
G
S
2200
μ
F
D.U.
T
.
2.7k
Ω
47k
Ω
P
W
1k
Ω
P
W
AM0146
8
v1
AM01469v1
Figure 17.
Test circuit for inductive load
switching and diode recovery times
Figure 18.
Unclamped inductive load test
circuit
L
A
A
A
B
D
FA
S
T
DIODE
L=100
μ
H
V
D
G
2200
μ
F
D.U.
T
.
B
3
.
3
μ
F
V
DD
S
3
.
3
μ
F
1000
μ
F
B
V
DD
25
Ω
I
D
D
G
R
G
S
V
i
D.U.
T
.
P
w
AM01470v1
AM01471v1
Figure 19.
Unclamped inductive waveform
Figure 20.
Switching time waveform
t
on
td
on
t
off
td
off
V
(BR)D
SS
t
r
t
f
V
D
90
%
10
%
90
%
I
DM
10
%
V
D
S
I
D
0
0
V
DD
V
DD
90
%
V
G
S
10
%
AM01472v1
AM0147
3
v1
Doc ID 019007 Rev 3
9/13
Package mechanical data
STFI20NK50Z
4
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECO
P
A
CK
®
packages, depending on their level of environmental compliance. ECO
P
ACK
®
is an ST trademark.
10/13
Doc ID 019007 Rev 3
STFI20NK50Z
Package mechanical data
T
a
ble 9.
Dim.
I
2
P
A
KFP (TO-281) mechanical data
Min.
mm
Typ.
Max.
A
B
4.40
2.50
2.50
0.65
0.45
0.75
4.60
2.70
2.75
0.85
0.70
1.00
1.20
5.20
10.40
23.00
14.10
10.85
3.20
1.25
7.50
D
D1
E
F
F1
G
4.95
10.00
21.00
13.20
10.55
2.70
–
H
L1
L2
L3
L4
L5
L6
0.85
7.30
Figure 21.
I
2
P
A
KFP (TO-281) drawing
ꢀꢁꢂꢃꢄꢅꢆ REVꢇ!
Doc ID 019007 Rev 3
11/13
Revision history
STFI20NK50Z
5
Revision history
T
a
ble 10.
Document revision history
Date
Revision
Changes
01-Jul-2011
1
First release.
have been added.
11-Nov-2011
20-Mar-2012
2
3
Document status promoted from preliminary data to production data.
The package name has been updated.
12/13
Doc ID 019007 Rev 3
STFI20NK50Z
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
UNLESS EXPRESSLY APPROVED IN WRITING BY TWO AUTHORIZED ST REPRESENTATIVES, ST PRODUCTS ARE NOT
RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING
APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY,
DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS “AUTOMOTIVE
GRADE” MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2012 STMicroelectronics – All rights reserved
STMicroelectronics group of companies
Australia – Belgium – Brazil – Canada – China – Czech Republic – Finland – France – Germany – Hong Kong – India – Israel – Italy – Japan –
Malaysia – Malta – Morocco – Philippines – Singapore – Spain – Sweden – Switzerland – United Kingdom – United States of America
Doc ID 019007 Rev 3
13/13
