onsemi-RFD4N06LSM9A
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RFD4N06L, RFD4N06LSM
Data Sheet
January 2002
4A, 60
V
,
0
.600 Ohm, Logic Level,
N-Channel Power MOSFETs
Features
• 4A,
60V
The RFD4N06L, RFD4N06LSM are N-Channel enhancement
mode silicon gate power field effect transistors specifically
designed for use with logic level (5 volt) driving sources in
applications such as programmable controllers, automotive
switching, and solenoid drivers. This performance is
accomplished through a special gate oxide design which
provides full rated conduction at gate biases in the 3-5 volt
range, thereby facilitating true on-off power control from logic
circuit supply voltages.
• r
= 0.600
Ω
DS(ON)
• Design
Optimized for 5 Volt Gate Drive
• Can
be Driven Directly From Q-MOS, N-MOS,
or TTL Circuits
• SOA
is Power Dissipation Limited
o
• 175 C
Rated Junction
T
e
mperature
• Logic
Level Gate
Formerly developmental type
T
A
09520.
• High
Input Impedance
• Related
Literature
Ordering Information
– TB334
“Guidelines for Soldering Surface Mount
Components to PC Boards”
PART NUMBER
PACKAGE
TO-251AA
TO-252AA
BRAND
RFD4N06L
RFD4N06LSM
RFD4N06L
Symbol
RFD4N06LSM
D
NOTE: When
ordering, use the entire part number.
G
S
Packaging
JEDEC TO-251AA
JEDEC TO-252AA
SOURCE
DRAIN
DRAIN
(FLANGE)
GATE
DRAIN
(FLANGE)
GATE
SOURCE
©2002 Fairchild Semiconductor Corporation
RFD4N06L, RFD4N06LSM Rev. B
RFD4N06L, RFD4N06LSM
o
Absolute Maximum Ratings
T =
25 C,
Unless Otherwise Specified
C
RFD4N06L
RFD4N06LSM
UNITS
Drain to Source Breakdown Voltage (Note 1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
60
60
±±
0
4
V
V
DS
Drain to Gate Voltage (Note 1
)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
DGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
Continuous Drain Current
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
I
V
A
D
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
10
A
DM
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
Derated above 25
C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
30
0.20
W
W/ C
D
o
o
o
Operating and Storage
T
e
mperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
Maximum
T
e
mperature for Soldering
T
-55 to 175
C
J, STG
o
Leads at 0.063in (1.6mm) from Case for 10
s
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
T
300
260
C
L
o
Package Body for 10s, See
T
e
chbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
C
pkg
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
o
o
1. T
= 25
C to 150
C.
J
o
Electrical Specifications
T =
25 C,
Unless Otherwise Specified
C
PARAMETER
SYMBOL
BV
TEST CONDITIONS
= 1mA, V
= 0V
MIN
TYP
MAX
–
UNITS
V
Drain to Source Breakdown Voltage
Gate to Threshold Voltage
I
60
1
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
DSS
GS(TH)
D
GS
= V
, I
= 250
µ
A
V
V
2.5
1
V
GS
DS D
o
Zero Gate Voltage Drain Current
I
T
T
= 25
C, V
o
= 50V, V
= 0V
GS
µ
A
µ
A
nA
V
DSS
C
C
DS
= 125
C, V
= 50V, V
= 0V
DS
= 0V
GS
–
50
DS
Gate to Source Leakage Current
I
V
=
10V, V
–
100
0.8
2.0
4.0
0.600
4.5
20
GSS
GS
Drain to Source On Voltage (Note 2)
V
I
I
I
I
= 1A, V
= 2A, V
= 4A, V
= 1A, V
= 5V
= 5V
= 7.5V
= 5V
–
DS(ON)
D
D
D
D
GS
GS
GS
GS
–
V
–
V
Drain to Source On Resistance (Note 2)
Forward Transconductance (Note 2)
Turn-On Delay Time
r
–
Ω
DS(ON)
V
V
= 15V, I
= 4A
–
V
DS
D
(plateau)
t
V
V
= 30V, I
= 1A, R
= 6.25
Ω,
D GS
= 5V
–
ns
ns
ns
ns
nC
d(ON)
DD
GS
Rise Time
t
–
130
40
r
Turn-Off Delay Time
t
–
d(OFF)
Fall Time
t
–
160
8
f
Total Gate Charge
(Gate to Source + Gate to Drain)
Q
V
= 0-10V
V
= 48V,
–
g(TOT)
GS
DD
I =
2A,
D
R =
24
Ω
L
Gate Charge at 5V
Q
V
V
= 0-5V
= 0-1V
–
–
–
–
–
–
5
1
5
nC
nC
g(5)
GS
GS
Threshold Gate Charge
Q
g(TH)
o
Thermal Resistance Junction to Case
R
C/W
θ
JC
Source to Drain Diode Specifications
PARAMETER
Source to Drain Diode Voltage (Note 2)
Reverse Recovery Time
NOTES:
SYMBOL
TEST CONDITIONS
MIN
TYP
–
MAX
1.4
–
UNITS
V
V
I
I
= 1A
–
–
SD
SD
SD
t
= 2A, dI
/dt = 100A/
µ
s
SD
150
ns
rr
2. Pulsed:
pulse duration = 300
µ
s max, duty cycle = 2%.
3. Repetitive
rating: pulse width limited by maximum junction temperature.
©2002 Fairchild Semiconductor Corporation
RFD4N06L, RFD4N06LSM Rev. B
RFD4N06L, RFD4N06LSM
Typical Performance Curves
Unless Otherwise Specified
5
4
3
2
1
1.2
1.0
0.8
0.6
0.4
0.2
0
0
25
50
75
100
125
150
0
25
50
75
100
125
150
o
T ,
CASE TEMPERATURE (
C)
o
C
T ,
CASE TEMPERATURE (
C)
C
FIGURE 2.
MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 1.
NORMALIZED POWER DISSI
P
A
T
ION vs CASE
TEMPERATURE
10
PULSE DURATION = 80
µ
s
C
T
T
= MAX RATED
= 25
C
J
C
12
V
= 10V
o
o
GS
T
= 25
C
V
= 7.5V
= 5V
GS
10
8
1.0
OPERATION IN THIS AREA
LIMITED BY r
6
V
GS
DS(ON)
4.5V
4V
4
3.5V
2
3V
2.5V
2V
0
0.1
0
1
2
3
4
5
6
7
1
10
, DRAIN TO SOURCE VOLTAGE (V)
100
V
V
, DRAIN TO SOURCE VOLTAGE (V)
DS
DS
FIGURE 3.
FORWARD BIAS SAFE OPERATING AREA
FIGURE 4.
SATURATION CHARACTERISTICS
8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
V
= 5V
GS
V
= 10V
DS
PULSE DURATION = 80
µ
s
7
6
5
4
3
2
1
0
PULSE DURATION = 80
µ
s
DUTY CYCLE
≤
2%
o
o
T
C
= 125
C
T
= 25
C
C
o
T
= -40
C
C
o
T
= 125
C
C
o
T
= 25
C
C
o
T
= -40
C
C
o
T
= 125
C
C
o
T
= -40
C
3
C
1
2
4
5
6
0
2
4
6
8
10
V
, GATE TO SOURCE VOLTAGE (V)
I ,
DRAIN CURRENT (A)
GS
D
FIGURE 5.
TRANSFER CHARACTERISTICS
FIGURE 6.
DRAI
N
T
O SOURCE ON RESISTANCE vs DRAIN
CURRENT
©2002 Fairchild Semiconductor Corporation
RFD4N06L, RFD4N06LSM Rev. B
RFD4N06L, RFD4N06LSM
Typical Performance Curves
Unless Otherwise Specified
(Continued)
2
2
V
= 5
V
, I
=
2
A
D
V
= V
, I
= 250
µ
A
DS
GS
GS
D
1.5
1.5
1
0.5
0
1
0.5
0
-50
0
50
100
200
-50
0
50
100
200
150
150
o
o
T ,
JUNCTION TEMPERATURE (
C)
T ,
JUNCTION TEMPERATURE (
C)
J
J
FIGURE 7.
NORMALIZED DRAI
N
T
O SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 8.
NORMALIZED GAT
E
T
HRESHOL
D
V
OLTAGE vs
JUNCTION TEMPERATURE
10
8
400
60
V
= 0
V
, f =
1
MHz
R
= 4
Ω
= 0.5mA
= 5V
GS
ISS
L
C
C
C
= C
+ C
I
GS
GD
G(REF)
= C
GD
RSS
OSS
V
GS
45
≈
C +
C
300
200
100
0
DS
GD
GATE SOURCE
VOLTAGE
6
V
DD
= BV
V
= BV
DSS
DSS
DD
30
C
ISS
4
0.75BV
0.50BV
0.25BV
DSS
DSS
DSS
15
0
2
C
OSS
DRAIN SOURCE VOLTAGE
C
RSS
0
I
I
0
10
V
20
30
40
50
G(REF)
G(REF)
I
G(ACT)
20
80
t
,
T
IME (
µ
s)
I
, DRAIN TO SOURCE VOLTAGE (V)
G(ACT)
DS
NOTE: Refer
to Fairchild Application Notes AN7254 and AN7260.
FIGURE 10.
NORMALIZED SWITCHIN
G
W
AVEFORMS FOR
CONSTANT GATE CURRENT
FIGURE 9.
CA
P
ACITANCE vs DRAIN TO SOURCE VOLTAGE
Test Circuits and Waveforms
t
t
ON
OFF
t
d(OFF)
t
d(ON)
t
t
f
r
R
L
V
DS
90%
90%
+
V
DD
10%
10%
R
G
0
–
DUT
90%
50%
V
GS
50%
PULSE WIDTH
10%
V
GS
0
FIGURE 11.
SWITCHING TIME TEST CIRCUIT
FIGURE 12.
RESISTIVE SWITCHING WAVEFORMS
©2002 Fairchild Semiconductor Corporation
RFD4N06L, RFD4N06LSM Rev. B
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
â
SMART START™
STAR*POWER™
Stealth™
VCX™
FAST
ACEx™
Bottomless™
CoolFET™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
FASTr™
FRFET™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
CROSSVOL
T
™
DenseTrench™
DOME™
POP™
Power247™
PowerTrenc
h
â
QFET™
EcoSPARK™
E
2
CMOS
TM
TinyLogic™
QS™
EnSigna
TM
TruTranslation™
UHC™
QT Optoelectronics™
Quiet Series™
SILEN
T
S
WITCHE
R
â
FACT™
FACT Quiet Series™
UltraFE
T
â
STAR*POWER is used under license
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILIT
Y
,
F
UNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILIT
Y
A
RISING OUT OF THE APPLICATION OR USE O
F
A
NY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICE
S
O
R
S
YSTEM
S
W
ITHOU
T
T
H
E
E
XPRES
S
W
RITTE
N
A
PPROVA
L
O
F
F
AIRCHIL
D
S
EMICONDUCTO
R
C
ORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H4
Product Folder – Fairchild P/N RFD4N06LSM – 4A, 60V, 0.600 Ohm, Logic Level, N-Channel Power MOSFETs
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RFD4N06LSM
4A, 60V, 0.600 Ohm, Logic Level, N-Channel
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Contents
General description
|
Features
|
Product
status/pricing/packaging
General description
The RFD4N06L, RFD4N06LSM are N-
Channel enhancement mode silicon gate power
field effect transistors specifically designed for
use with logic level (5 volt) driving sources in
applications such as programmable controllers,
automotive switching, and solenoid drivers.
This performance is accomplished through a
special gate oxide design which provides full
rated conduction at gate biases in the 3-5 volt
range, thereby facilitating true on-off power
control from logic circuit supply voltages.
This page
Print version
Design tools
Formerly developmental type TA09520.
company
back to top
Features
●
●
4A, 60V
= 0.600
Ω
r
DS(ON)
●
●
Design Optimized for 5 Volt Gate Drive
Can be Driven Directly From Q-MOS,
N-MOS, or TTL Circuits
●
●
●
●
●
SOA is Power Dissipation Limited
175°C Operating Temperature
Logic Level Gate
High Input Impedance
Related Literature
❍
TB334 “Guidelines for
Soldering Surface Mount
Components to PC Boards”
Product Folder – Fairchild P/N RFD4N06LSM – 4A, 60V, 0.600 Ohm, Logic Level, N-Channel Power MOSFETs
back to top
Product status/pricing/packaging
Product
Product status
Pricing*
Package type
Leads Packing
method
TAPE REEL
RFD4N06LSM9A
Full Production
$1.26 TO-252(DPAK)
3
* 1,000 piece Budgetary Pricing
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