onsemi-FQI7P06TU

Part #	onsemi-FQI7P06TU
Download	onsemi-FQI7P06TU

May 2001

QFET

FQB7P06 / FQI7P06

60V P-Channel MOSFET

General Description

Features

These P-Channel enhancement mode power field effect

transistors are produced using Fairchild’s proprietary,

planar stripe, DMOS technology.

This advanced technology has been especially tailored to

minimize on-state resistance, provide superior switching

performance, and withstand a high energy pulse in the

avalanche and commutation modes. These devices are

well suited for low voltage applications such as automotive,

DC/DC converters, and high efficiency switching for power

management in portable and battery operated products.

•

-7A, -60V, R

= 0.41

Ω

@V =

-10 V

DS(on) GS

Low gate charge ( typical 6.3 nC)

Low Crss ( typical

25 pF)

Fast switching

100% avalanche tested

Improved dv/dt capability

175

C maximum junction temperature rating

●

▶

▲

●

-PAK

FQB Series

-PAK

FQI Series

Absolute Maximum Ratings

T =

25°C unless otherwise noted

Symbol

Parameter

FQB7P06 / FQI7P06

Units

Drain-Source Voltage

-60

-7.0

DSS

– Continuous (T

= 25°C)

Drain Current

– Continuous (T

= 100°C)

-4.95

-28

(Note 1)

Drain Current

– Pulsed

Gate-Source Voltage

GSS

(Note 2)

(Note 1)

(Note 3)

Single Pulsed Avalanche Energy

Avalanche Current

-7.0

Repetitive Avalanche Energy

Peak Diode Recovery dv/dt

4.5

V/ns

dv/dt

-7.0

Power Dissipation

(T =

25°C) *

3.75

Power Dissipation

(T =

25°C)

– Derate above 25°C

Operating and Storage

mperature Range

0.3

W/°C

°C

T , T

-55 to +175

STG

Maximum lead temperature for soldering purposes,

300

°C

1/8

”

from case for 5 seconds

Thermal Characteristics

Symbol

Parameter

Typ

—

Max

3.35

Units

°C

Thermal Resistance, Junction-to-Case

Thermal Resistance, Junction-to-Ambient *

Thermal Resistance, Junction-to-Ambient

—

62.5

* When mounted on the minimum pad size recommended (PCB Mount)

Rev. A2. May 2001

Elerical Characteristics

T =

25°C unless otherwise noted

Symbol

Parameter

Test Conditions

Min

Typ

Max

Units

Off Characteristics

= 0

, I

–

250

GS D

Drain-Source Breakdown Voltage

-60

—

DSS

∆

Breakdown Voltage

mperature

Coefficient

DSS

= -250

A, Referenced to 25°C

-0.07

V/°C

∆

= -60

, V

= 0 V

—

-1

DSS

Zero Gate Voltage Drain Current

= -48

, T

50°C

-10

= -25

, V

= 0 V

Gate-Body Leakage Current, Forward

Gate-Body Leakage Current, Reverse

-100

100

GSSF

= 25

, V

= 0 V

GSSR

On Characteristics

= V

, I

= -250

Gate Threshold Voltage

-2.0

—

-4.0

0.41

—

Ω

GS(th)

Static Drain-Source

On-Resistance

DS(on)

= -10

, I

–

3.5 A

0.32

4.0

(Note 4)

= -30

, I

–

3.5 A

Forward Transconductance

—

Dynamic Characteristics

Input Capacitance

—

225

110

295

145

iss

= -25

, V

= 0 V,

Output Capacitance

oss

rss

f = 1.0 MHz

Reverse Transfer Capacitance

Switching Characteristics

Turn-On Delay Time

Turn-On Rise Time

Turn-Off Delay Time

Turn-Off Fall Time

tal Gate Charge

Gate-Source Charge

Gate-Drain Charge

—

110

8.2

—

d(on)

= -30

, I

–

3.5 A,

= 25

Ω

7.5

d(off)

(Note 4, 5)

6.3

1.6

3.1

= -48

, I

–

7.0 A,

= -10 V

—

Drain-Source Diode Characteristics and Maximum Ratings

Maximum Continuous Drain-Source Diode Forward Current

—

-7.0

-28

-4.0

—

Maximum Pulsed Drain-Source Diode Forward Current

= 0

, I

–

7.0 A

Drain-Source Diode Forward Voltage

Reverse Recovery Time

—

= 0

, I

–

7.0 A,

0.23

(Note 4)

dI /

dt = 100 A/

Reverse Recovery Charge

—

Notes:

1. Repetitive Rating : Pulse width limited by maximum junction temperature

2. L = 2.1mH, I

= -7.0A, V

= -25V, R

= 25

Ω,

Starting T =

25°C

3. I

≤

-7.0A, di/dt

≤

300A/

s, V

≤

BV Starting

T =

25°C

DSS, J

4. Pulse Test : Pulse width

≤

300

s, Duty cycle

≤

5. Essentially independent of operating temperature

Rev. A2. May 2001

Typical Characteristics

Top :

– 15.0 V

– 10.0 V

– 8.0 V

– 7.0 V

– 6.0 V

– 5.5 V

– 5.0 V

Bottom :

– 4.5 V

℃

175

℃

-55

※

Notes :

※

Notes :

1. 250

s Pulse Test

1. V

= -30V

-1

℃

2. T

= 25

2. 250

s Pulse Test

-1

-V

, Gate-Source Voltage

[V]

-V

, Drain-Source Voltage [V]

Figure 1. On-Region Characteristics

Figure 2. Transfer Characteristics

1.2

1.0

0.8

0.6

0.4

0.2

0.0

= – 10V

= – 20V

℃

175

℃

※

Notes :

1. V

= 0V

※

℃

Note : T = 25

2. 250

s Pulse Test

-1

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8

-V

, Source-Drain Voltage

[V]

-I

, Drain Current

[A]

Figure 3. On-Resistance Variation

vs.

Drain Current and Gate Voltage

Figure 4. Body Diode Forward Voltage

Variation vs. Source Current

and Temperature

600

500

400

300

200

100

_{iss
= C
g
s
+ C
g
d
(C
d
s
= shorted)}

_{oss
= C
d
s
+ C
g
d}

_{rss
= C
g
d}

= -30V

= -48V

oss

※

Notes :

iss

1. V

= 0 V

2. f = 1 MHz

rss

※

Note : I

= -7.0 A

-1

, Total Gate Charge [nC]

, Drain-Source Voltage [V]

Figure 5. Capacitance Characteristics

Figure 6. Gate

Charge Characteristics

Rev. A2. May 2001

Typical Characteristics

(Continued)

2.5

2.0

1.5

1.0

0.5

0.0

1.2

1.1

1.0

※

otes :

1. V

= 0 V

2. I

= -250

0.9

※

Notes :

1. V

= -10 V

2. I

= -3.5 A

0.8

-100

-50

100

150

200

-100

-50

100

150

200

, Junction Temperature [

]

, Junction Temperature [

]

Figure 7. Breakdown Voltage Variation

vs. Temperature

Figure 8. On-Resistance Variation

vs. Temperature

Operation in This Area

is Limited by R

S(on)

100

10 ms

※

Notes :

1. T

= 25

2. T

= 175

3. Single Pulse

-1

100

125

150

175

℃

ase Temperature [

]

-V

rain-Source Voltage [V]

Figure 9. Maximum Safe Operating Area

Figure 10. Maximum Drain Current

vs. Case

Temperature

D = 0

1 0

※

N o

e s

1 .

(

2 .

D u

F a c to r,

D = t

℃

/W M

a x .

3 5

3 .

J M

–

(

0 5

0 2

–

0 1

s in g le

p u ls e

–

1 0

–

1 0

–

1 0

–

1 0

–

1 0

, S

q u a

W a

v e

P u ls e

D u ra tio n

[s e c ]

Figure 11. Transient Thermal Response Curve

Rev. A2. May 2001

Gate Charge Test Circuit & Waveform

Same Type

50K

as DUT

12V

200nF

-10V

300nF

DUT

-3mA

Charge

Resistive Switching Test Circuit & Waveforms

off

d(on)

d(off)

10%

DUT

-10V

90%

Unclamped Inductive Switching Test Circuit & Waveforms

DSS

——————–

DSS

– V

—-

Time

(t)

DUT

-10V

DSS

Rev. A2. May 2001

Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT

Driver

Compliment of DUT

(N-Channel)

• dv/dt controlled by

• I

controlled by pulse period

Gate Pulse Width

————————–

D =

Gate Pulse Period

10V

( Driver )

Body Diode Reverse Current

( DUT )

di/dt

, Body Diode Forward Current

( DUT )

Body Diode

Forward Voltage Drop

Body Diode Recovery dv/dt

Rev. A2. May 2001

Package Dimensions

PAK

4.50

0.20

9.90

0.20

+0.10

–0.05

1.30

0.10

0.15

2.40

0.20

0.80

0.10

1.27

0.10

+0.10

0.50

–0.05

2.54 TYP

10.00

0.20

(8.00)

(4.40)

10.00

0.20

(2XR0.45)

0.80

0.10

Rev. A2. May 2001

Package Dimensions

(Continued)

PAK

4.50

0.20

9.90

0.20

+0.10

–

0.05

1.30

1.27

0.10

1.47

0.10

0.80

0.10

+0.10

–

0.05

0.50

2.40

0.20

2.54 TYP

10.00

0.20

Rev. A2. May 2001

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not

intended to be an exhaustive list of all such trademarks.

SuperSOT™-3

ACEx™

Bottomless™

CoolFET™

CROSSVOLT™

DenseTrench™

DOME™

EcoSPARK™

CMOS™

EnSigna™

FAST

FASTr™

FRFET™

GlobalOptoisolator™

GTO™

OPTOPLANAR™

PACMAN

™

SuperSOT™-6

SuperSOT™-8

SyncFET™

TinyLogic™

UHC™

POP™

PowerTrench

QFET™

HiSeC™

QS™

UltraFET

VCX™

ISOPLANAR™

LittleFET™

MicroFET™

MICROWIRE™

OPTOLOGIC™

QT Optoelectronics™

Quiet Series™

SLIENT SWITCHER

SMART START™

Stealth™

FACT™

FACT Quiet Series™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY

PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY

LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;

NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR

CORPORATION.

As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the body,

or (b) support or sustain life, or (c) whose failure to perform

when properly used in accordance with instructions for use

provided in the labeling, can be reasonably expected to

result in significant injury to the user.

2. A critical component is any component of a life support

device or system whose failure to perform can be

reasonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification

Product Status

Definition

Advance Information

Formative or In

Design

This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

Preliminary

First Production

This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconductor reserves the right to make

changes at any time without notice in order to improve

design.

No Identification Needed

Obsolete

Full Production

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

Not In Production

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

Rev. H2

Product Folder – Fairchild P/N FQI7P06 – 60V P-Channel QFET

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