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HUFA75337G3, HUFA75337P3, HUFA75337S3S
Data Sheet
December 2001
75A, 55
V
,
0
.014 Ohm, N-Channel UltraFET
Power MOSFETs
Features
• 75A,
55V
These N-Channel power MOSFETs
are manufactured using the
innovative UltraFET® process. This
• Simulation
Models
–
T
e
mperature
Compensated PSPICE® and SABER™
Models
advanced process technology
– SPICE
and SABER Thermal Impedance Models
achieves the lowest possible on-resistance per silicon area,
resulting in outstanding performance. This device is capable
of withstanding high energy in the avalanche mode and the
diode exhibits very low reverse recovery time and stored
charge. It was designed for use in applications where power
efficiency is important, such as switching regulators,
switching converters, motor drivers, relay drivers, low-
voltage bus switches, and power management in portable
and battery-operated products.
• Peak
Current vs Pulse Width Curve
• UIS
Rating Curve
• Related
Literature
– TB334,
“Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
Formerly developmental type
T
A
75337.
D
Ordering Information
PART NUMBER
HUFA75337G3
HUFA75337P3
HUFA75337S3S
PACKAGE
BRAND
75337G
G
TO-247
TO-220AB
TO-263AB
75337P
75337S
S
NOTE: When
ordering, use the entire part number. Add the suffix T to
obtain the TO-263AB variant in tape and reel, e.g., HUFA75337S3S
T
.
Packaging
JEDEC STYLE TO-247
JEDEC TO-220AB
SOURCE
DRAIN
GATE
SOURCE
DRAIN
G
A
T
E
DRAIN
(FLANGE)
DRAIN
(TAB)
JEDEC TO-263AB
DRAIN
(FLANGE)
GATE
SOURCE
This product has been designed to meet the extreme test conditions and environment demanded by the automotive industry. For a copy
All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certificat
i
o
n.
©2001 Fairchild Semiconductor Corporation
HUFA75337G3, HUFA75337P3, HUFA75337S3S Rev. B
HUFA75337G3, HUFA75337P3, HUFA75337S3S
o
Absolute Maximum Ratings
T
= 25
C, Unless Otherwise Specified
C
UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V
55
55
V
V
V
DSS
DGR
Drain to Gate Voltage (R
= 20k
Ω
) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V
±
20
GS
Drain Current
Continuous (Figure 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
75
Figure 4
Figure 6
175
A
D
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
DM
Pulsed Avalanche Ratin
g
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
E
AS
Power Dissipation
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
P
W
D
o
o
Derate Above 25
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.17
W/ C
o
Operating and Storage
T
e
mperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
T , T
-55 to 175
C
J
STG
Maximum
T
e
mperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10
s
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
Package Body for 10s, See
T
e
chbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
o
300
260
C
C
L
o
pkg
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
o
o
1. T
= 25
C to 150
C.
J
o
Electrical Specifications
T =
25 C,
Unless Otherwise Specified
C
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage
Zero Gate Voltage Drain Current
BV
I
= 250
µ
A, V
= 0V (Figure 11)
55
–
–
–
–
–
–
V
DSS
D
GS
GS
GS
I
V
V
V
= 50V, V
= 45V, V
=
±
20V
= 0V
= 0V, T
= 150
C
1
µ
A
µ
A
nA
DSS
DS
DS
GS
o
–
250
±
100
C
Gate to Source Leakage Current
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage
Drain to Source On Resistance
THERMAL SPECIFICATIONS
I
–
GSS
V
V
= V
, I
= 250
µ
A (Figure 10)
2
–
–
4
V
GS(TH)
GS
DS
D
r
I
= 75A, V
= 10V (Figure 9)
0.011
0.014
Ω
DS(ON)
D
GS
o
Thermal Resistance Junction to Case
Thermal Resistance Junction to Ambient
R
R
(Figure 3)
TO-247
–
–
–
–
–
–
0.85
30
C/W
θ
JC
o
C/W
θ
JA
o
TO-220AB, TO-263AB
62
C/W
SWITCHING SPECIFICATIONS
(V
Turn-On Time
= 10V)
GS
t
V
R
R
= 30V, I
= 0.4
Ω
, V
= 6.2
Ω
75A,
=
10V,
–
–
–
–
–
–
–
100
ns
ns
ns
ns
ns
ns
ON
DD
D
L
GS
Turn-On Delay Time
Rise Time
t
13
56
31
28
–
–
–
d(ON)
GS
t
r
Turn-Off Delay Time
Fall Time
t
–
d(OFF)
t
–
f
Turn-Off Time
t
88
OFF
GATE CHARGE SPECIFICATIONS
Total Gate Charge
Q
V
V
V
= 0V to 20V
= 0V to 10V
= 0V to 2V
V
DD
= 30V,
75A,
–
–
–
–
–
91
51
3.4
9
109
61
4.1
–
nC
nC
nC
nC
nC
g(TOT)
GS
GS
GS
I
D
Gate Charge at 10V
Q
g(10)
g(TH)
R
I
= 0.4
Ω
L
= 1.0mA
Threshold Gate Charge
Q
g(REF)
(Figure 13)
Gate to Source Gate Charge
Reverse Transfer Capacitance
Q
gs
gd
Q
23
–
©2001 Fairchild Semiconductor Corporation
HUFA75337G3, HUFA75337P3, HUFA75337S3S Rev. B
HUFA75337G3, HUFA75337P3, HUFA75337S3S
o
Electrical Specifications
T
= 25
C, Unless Otherwise Specified
C
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
CAPACITANCE SPECIFICATIONS
Input Capacitance
C
V
= 25V, V
= 0V,
GS
–
–
–
1775
625
–
–
–
pF
pF
pF
ISS
DS
f = 1MHz
(Figure 12)
Output Capacitance
C
C
OSS
RSS
Reverse Transfer Capacitance
150
Source to Drain Diode Specifications
PARAMETER
Source to Drain Diode Voltage
Reverse Recovery Time
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
1.25
85
UNITS
V
V
I
I
I
= 75A
–
–
–
–
–
–
SD
SD
SD
SD
t
= 75A, dI
/dt = 100A/
µ
s
SD
ns
rr
Reverse Recovered Charge
Q
= 75A, dI
/dt = 100A/
µ
s
180
nC
RR
SD
Typical Performance Curves
1.2
1.0
0.8
80
60
40
20
0
0.6
0.4
0.2
0
25
50
75
100
125
150
175
0
25
50
75
100
125
o
150
175
o
T
, CASE TEMPERATURE (
C)
T ,
CASE TEMPER
A
T
URE (
C)
C
C
FIGURE 1.
NORMALIZED POWER DISSI
P
A
T
ION vs CASE
TEMPERATURE
FIGURE 2.
MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPER
A
T
URE
2
DUTY CYCLE – DESCENDING ORDER
0.5
0.2
1
0.1
0.05
0.02
0.01
P
DM
0.1
t
1
t
2
NOTES:
DUTY FACTOR: D = t
/t
1
2
PEAK T
= P
x Z
x R
+ T
J
DM
θ
JC
θ
JC C
SINGLE PULSE
0.01
-5
-4
-3
-2
-1
10
0
1
10
10
10
10
t, REC
T
A
NGULAR PULSE DURATION (s)
10
10
FIGURE 3.
NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
©2001 Fairchild Semiconductor Corporation
HUFA75337G3, HUFA75337P3, HUFA75337S3S Rev. B
HUFA75337G3, HUFA75337P3, HUFA75337S3S
Typical Performance Curves
(Continued)
1000
o
T
= 25
C
FOR TEMPERATURES
C
o
ABOVE 25
C DE
R
A
TE PEAK
CURRENT AS FOLLOWS:
175 – T
150
C
I = I
25
V
= 10V
GS
100
50
TRANSCONDUC
T
A
NCE
M
A
Y
L
IMIT CURRENT
IN THIS REGION
-5
10
-4
10
-3
10
-2
-1
0
1
10
t, PULSE WIDTH (s)
10
10
10
FIGURE 4.
PEAK CURRENT CAPABILITY
1000
700
T
T
= MAX RATED
If R = 0
= (L)(I
)/(1.3*R
A
T
ED BV
J
t
– V
)
o
AV
If R
AS
DSS
DD
= 25
C
C
≠
0
t
= (L/R)ln[(I
*R)/(1.3*RATED BV
AS
– V
) +1]
DSS DD
AV
100
10
1
o
S
T
A
RTING T
= 25
C
J
100
µ
s
100
1ms
OPERATION IN THIS
AREA M
A
Y
B
E
LIMITED BY r
o
STARTING T
= 150
C
10ms
J
DS(ON)
= 55V
V
DSS(MAX)
10
0.001
0.01
0.1
, TIME IN AVALANCHE (ms)
1
10
1
10
, DRAIN TO SOURCE VOLTAGE (V)
100
200
V
t
AV
DS
NOTE: Refer
to Fairchild Application Notes AN9321 and AN9322.
FIGURE 5.
FORWARD BIAS SAFE OPERATING AREA
FIGURE 6.
UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
150
120
90
60
30
0
150
PULSE DURATION = 80
µ
s
o
V
V
= 20V
= 10V
-55 C
GS
GS
DUTY CYCLE = 0.5% MAX
V
= 15V
DD
120
90
60
30
0
V
= 7V
GS
V
= 6V
o
GS
25 C
o
175 C
V
= 5V
GS
PULSE DURATION = 80
µ
s
DUTY CYCLE = 0.5% MAX
o
T
= 25
C
4.5
C
0
1.5
3.0
4.5
6.0
7.5
0
1.5
3.0
6.0
7.5
V
, DRAIN TO SOURCE VOLTAGE (V)
V
GS
, GATE TO SOURCE VOLTAGE (V)
DS
FIGURE 7.
SATURATION CHARACTERISTICS
FIGURE 8.
TRANSFER CHARACTERISTICS
©2001 Fairchild Semiconductor Corporation
HUFA75337G3, HUFA75337P3, HUFA75337S3S Rev. B
HUFA75337G3, HUFA75337P3, HUFA75337S3S
Typical Performance Curves
(Continued)
2.5
2.0
1.5
1.0
0.5
1.2
1.0
0.8
0.6
PULSE DURATION = 80
µ
s
DUTY CYCLE = 0.5% MAX
V
= V
, I
= 250
µ
A
DS D
GS
V
= 10
V
, I
=
7
5A
GS
D
-80
-40
0
40
80
120
160
200
-80
-40
0
40
80
120
160
200
o
o
T ,
JUNCTION TEMPERATURE (
C)
T ,
JUNCTION TEMPERATURE (
C)
J
J
FIGURE 9.
NORMALIZED DRAIN TO SOURCE ON
FIGURE 10.
NORMALIZED G
A
T
E THRESHOLD VO
L
TAGE vs
JUNCTION TEMPER
A
TURE
RESIS
T
A
NCE vs JUNCTION TEMPE
R
A
TURE
1.2
1.1
1.0
0.9
0.8
3000
I
= 250
µ
A
V
= 0
V
, f =
1
MHz
D
GS
C
C
C
= C
+ C
ISS
GS GD
= C
≈
C
2400
1800
1200
600
0
RSS
OSS
GD
DS
+ C
GD
C
ISS
C
C
OSS
RSS
-80
-40
0
40
80
120
160
200
0
10
20
, DRAIN TO SOURCE VOLTAGE (V)
DS
30
40
50
60
o
T ,
JUNCTION TEMPER
A
T
URE (
C)
V
J
FIGURE 11.
NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 12.
CA
P
ACITANCE vs DRAIN TO SOURCE VOLTAGE
10
8
6
4
WAVEFORMS IN
DESCENDING ORDER:
I
I
I
I
= 75A
= 60A
= 40A
= 20A
D
D
D
D
2
V
= 30V
DD
0
0
10
20
30
40
50
60
Q ,
GATE CHARGE (nC)
g
NOTE: Refer
to Fairchild Application Notes AN7254 and AN7260.
FIGURE 13.
GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT
©2001 Fairchild Semiconductor Corporation
HUFA75337G3, HUFA75337P3, HUFA75337S3S Rev. B
HUFA75337G3, HUFA75337P3, HUFA75337S3S
Test Circuits and Waveforms
V
DS
BV
DSS
L
t
P
V
DS
I
VARY t
TO OBTAIN
P
AS
+
–
V
DD
R
REQUIRED PEAK I
G
AS
V
DD
V
GS
DUT
t
P
I
AS
0V
0
0.01
Ω
t
AV
FIGURE 14.
UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15.
UNCLAMPED ENERGY WAVEFORMS
V
DS
V
Q
g(TOT)
R
DD
L
V
DS
V
= 20V
GS
V
Q
GS
g(10)
+
–
V
DD
V
= 10V
V
GS
GS
DUT
V
= 2V
GS
I
0
G(REF)
Q
g(TH)
Q
Q
gd
gs
I
g(REF)
0
FIGURE 16.
GATE CHARGE TEST CIRCUIT
FIGURE 17.
G
A
T
E CHARGE WAVEFORM
V
t
t
DS
ON
OFF
t
d(OFF)
t
d(ON)
t
t
f
R
L
r
V
DS
90%
90%
+
V
GS
V
DD
10%
10%
0
–
DUT
90%
50%
R
GS
V
GS
50%
PULSE WIDTH
10%
V
GS
0
FIGURE 18.
SWITCHING TIME TEST CIRCUIT
FIGURE 19.
RESISTIVE SWITCHING
W
A
VEFORMS
©2001 Fairchild Semiconductor Corporation
HUFA75337G3, HUFA75337P3, HUFA75337S3S Rev. B
HUFA75337G3, HUFA75337P3, HUFA75337S3S
PSPICE Electrical Model
.SUBCKT HUFA75337 2 1 3 ;
rev August 1997
CA 12 8
2.4e-9
CB 15 14
2.4e-9
CIN 6 8
1.63e-9
LDRAIN
DPLCAP
DRAIN
2
5
10
RLDRAIN
DBODY 7 5 DBODYMOD
DBREAK 5 11
DBREAKMOD
DPLCAP 10 5 DPLCAPMOD
RSLC1
51
DBREAK
+
RSLC2
5
ESLC
11
51
–
50
EBREAK 11 7 17
18 58.5
EDS 14 8 5 8
1
EGS 13 8 6 8
1
ESG 6 10 6 8 1
EVTHRES 6 21 19 8
1
+
–
17
DBODY
RDRAIN
6
8
EBREAK 18
ESG
–
EVTHRES
+
16
21
+
–
EVTEMP 20 6 18 22 1
19
MWEAK
LGATE
EVTEMP
+
8
RG
A
T
E
GATE
1
6
–
18
22
MMED
IT 8 17 1
9
20
MSTRO
8
RLGATE
LDRAIN 2 5 1e-9
LGATE 1
9 3.58e-9
LSOURCE 3 7
7.7e-10
LSOURCE
CIN
SOURCE
3
7
RSOURCE
MMED 16 6 8 8 MMEDMOD
MSTRO 16 6 8 8 MSTROMOD
MWEAK 16 21 8 8 MWEAKMOD
RLSOURCE
S1A
S2A
RBREAK
12
15
13
14
13
17
18
8
RBREAK 17 18 RBREAKMOD 1
RDRAIN 50 16 RDRAINMOD 2.3e-3
RGATE 9 20
1
RLDRAIN 2 5 10
RLGATE 1 9 35.8
RLSOURCE 3 7 7.7
RSLC1 5 51 RSLCMOD 1e-6
RSLC2 5 50 1e3
RVTEMP
19
S1B
S2B
13
CB
CA
IT
14
–
+
+
VBAT
6
8
5
8
EGS
EDS
+
–
–
8
22
RSOURCE 8 7 RSOURCEMOD
6.0e-3
RVTHRES 22 8 RVTHRESMOD
1
RVTEMP 18 19 RVTEMPMOD 1
RVTHRES
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 22 19
DC 1
ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*180),5.3))}
.MODEL DBODYMOD D (IS = 1.8e-12
RS = 3e-3
IKF = 20 N = 0.99 XTI = 4.5 TRS1 = 2e-3
TRS2 = 9e-9
CJO = 2.6e-9
TT = 1.1e-7 M = 0.48)
.MODEL DBREAKMOD D (RS = 9.6e-2 IKF = 9e-
6TRS1 = 1.5e-
3TRS2 = -4.7e-5)
.MODEL DPLCAPMOD D (CJO = 2.5e-
9IS = 1e-30 M = 0.97 vj = 1.45)
.MODEL MMEDMOD NMOS (VTO = 3.2 KP = 2 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 1)
.MODEL MSTROMOD NMOS (VTO = 3.71 KP = 63 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)
.MODEL MWEAKMOD NMOS (VTO = 2.7 KP =8e-3 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 10)
.MODEL RBREAKMOD RES (TC1 = 1.17e-
3TC2 = -1.25e-6)
.MODEL RDRAINMOD RES (TC1 = 1.9e-2
TC2 = 5e-6)
.MODEL RSLCMOD RES (TC1 = 2.8e-3 TC2 = 1e-9)
.MODEL RSOURCEMOD RES (TC1 = 1e-3 TC2 = 1e-5)
.MODEL RVTHRESMOD RES (TC1 = -3e-3 TC2 = -3e-6)
.MODEL RVTEMPMOD RES (TC1 = -2.8e-
3TC2 = 1e-6)
.MODEL S1AMOD VSWITCH (RON = 1e-5
ROFF = 0.1
VON = -8
VOFF= -4)
.MODEL S1BMOD VSWITCH (RON = 1e-5
ROFF = 0.1
VON = -4
VOFF= -8)
.MODEL S2AMOD VSWITCH (RON = 1e-5
ROFF = 0.1
VON = 0
VOFF= 1.5)
.MODEL S2BMOD VSWITCH (RON = 1e-5
ROFF = 0.1
VON =1.5
VOFF= 0)
.ENDS
NOTE: For
further discussion of the PSPICE model, consult
A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options
; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatl
e
y
.
©2001 Fairchild Semiconductor Corporation
HUFA75337G3, HUFA75337P3, HUFA75337S3S Rev. B
HUFA75337G3, HUFA75337P3, HUFA75337S3S
SABER Electrical Model
REV August 1997
template HUFA75337 n2, n1, n3
electrical n2, n1, n3
{
var i iscl
d..model dbodymod =
(is = 1.8e-12, xti = 4.5, cjo = 2.6e-9, tt = 1.1e-7, n = 0.99, m = 0.48)
d..model dbreakmod = ()
d..model dplcapmod =
(cjo = 2.5e-9, is = 1e-30, n = 1, m = 0.97, vj = 1.45)
m..model mmedmod = (type=_n, vto = 3.2, kp = 2, is = 1e-30, tox = 1)
LDRAIN
RLDRAIN
RDBODY
DPLCAP
5
DRAIN
2
m..model mstrongmod = (type=_n, vto = 3.71, kp = 63, is = 1e-30, tox = 1)
m..model mweakmod = (type=_n, vto = 2.7, kp = 8e-3, is = 1e-30, tox = 1)
sw_vcsp..model s1amod =
(ron = 1e-5, roff = 0.1, von = -8, voff = -4)
sw_vcsp..model s1bmod =
(ron = 1e-5, roff = 0.1, von = -4, voff = -8)
sw_vcsp..model s2amod =
(ron = 1e-5, roff = 0.1, von = 0, voff = 1.5)
sw_vcsp..model s2bmod =
(ron = 1e-5, roff = 0.1, von = 1.5, voff = 0)
10
RSLC1
51
RDBREAK
72
DBREAK
11
RSLC2
ISCL
c.ca n12 n8 = 2.4e-9
c.cb n15 n14 = 2.4e-9
c.cin n6 n8 = 1.63e-9
50
–
71
RDRAIN
6
8
ESG
EVTHRES
d.dbody n7 n71 = model=dbodymod
d.dbreak n72 n11 = model=dbreakmod
d.dplcap n10 n5 = model=dplcapmod
+
16
21
+
–
19
8
MWEAK
LGATE
EVTEMP
+
DBODY
RG
A
TE
GATE
1
6
–
18
22
EBREAK
+
MMED
i.it n8 n17 = 1
9
20
MSTRO
8
17
18
–
RLG
A
T
E
l.ldrain n2 n5 = 1e-9
LSOURCE
CIN
SOURCE
3
l.lgate n1 n9 = 3.58e-9
l.lsource n3 n7 = 7.7e-10
7
RSOURCE
RLSOURCE
m.mmed n16 n6 n8 n8 = model=mmedmod, l = 1u, w = 1u
m.mstrong n16 n6 n8 n8 = model=mstrongmod, l = 1u, w = 1u
m.mweak n16 n21 n8 n8 = model=mweakmod, l = 1u, w = 1u
S1A
S2A
RBREAK
12
15
13
8
14
13
17
18
res.rbreak n17 n18
= 1, tc1 = 1.17e-3, tc2 = -1.25e-6
res.rdbody n71 n5 = 3e-3, tc1 = 2e-3, tc2 = 9e-9
res.rdbreak n72 n5 = 9.6e-2, tc1 = 1.5e-3, tc2 = -4.7e-5
res.rdrain n50 n16
= 2.3e-3, tc1 = 1.9e-2, tc2 = 5e-6
res.rgate n9 n20 = 1
res.rldrain n2 n5 = 10
res.rlgate n1 n9 = 35.8
res.rlsource n3 n7 = 7.7
res.rslc1 n5 n51
= 1e-6, tc1 = 2.8e-3, tc2 = 1e-9
res.rslc2 n5 n50 = 1e3
RVTEMP
19
S1B
S2B
13
CB
CA
IT
14
–
+
+
VBAT
6
8
5
8
EGS
EDS
+
–
–
8
22
RVTHRES
res.rsource n8 n7
= 6e-3, tc1 = 1e-3, tc2 = 1e-5
res.rvtemp n18 n19
= 1, tc1 = -2.8e-3, tc2 = 1e-6
res.rvthres n22 n8
= 1, tc1 = -3e-3, tc2 = -3e-6
spe.ebreak n11 n7 n17 n18 = 58.5
spe.eds n14 n8 n5 n8 = 1
spe.egs n13 n8 n6 n8 = 1
spe.esg n6 n10 n6 n8 = 1
spe.evtemp n20 n6 n18 n22 = 1
spe.evthres n6 n21 n19 n8 = 1
sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod
sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod
sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod
sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod
v.vbat n22 n19 = dc = 1
equations {
i (n51->n50) + = iscl
iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/180))** 5.3))
}
}
©2001 Fairchild Semiconductor Corporation
HUFA75337G3, HUFA75337P3, HUFA75337S3S Rev. B
HUFA75337G3, HUFA75337P3, HUFA75337S3S
SPICE Thermal Model
JUNCTION
th
REV February 1999
HUFA75337
CTHERM1 th 6 8.0e-7
CTHERM2 6 5 1.6e-6
CTHERM3 5 4 4.8e-3
CTHERM4 4 3 7.6e-3
CTHERM5 3 2 2.4e-2
CTHERM6 2 tl 1.5
RTHERM1
RTHERM2
RTHERM3
RTHERM4
RTHERM5
RTHERM6
CTHERM1
CTHERM2
CTHERM3
CTHERM4
CTHERM5
CTHERM6
6
RTHERM1 th 6 1.3e-4
RTHERM2 6 5 1.8e-3
RTHERM3 5 4 3.7e-2
RTHERM4 4 3 2.3e-1
RTHERM5 3 2 3.4e-1
RTHERM6 2 tl 6.4e-2
5
SABER Thermal Model
SABER thermal model HUFA75337
template thermal_model th tl
thermal_c th, tl
{
ctherm.ctherm1 th 6 = 8.0e-7
ctherm.ctherm2 6 5 = 1.6e-6
ctherm.ctherm3 5 4 = 4.8e-3
ctherm.ctherm4 4 3 = 7.6e-3
ctherm.ctherm5 3 2 = 2.4e-2
ctherm.ctherm6 2 tl = 1.5
4
3
2
rtherm.rtherm1 th 6 = 1.3e-4
rtherm.rtherm2 6 5 = 1.8e-3
rtherm.rtherm3 5 4 = 3.7e-2
rtherm.rtherm4 4 3 = 2.3e-1
rtherm.rtherm5 3 2 = 3.4e-1
rtherm.rtherm6 2 tl = 6.4e-2
}
tl
CASE
©2001 Fairchild Semiconductor Corporation
HUFA75337G3, HUFA75337P3, HUFA75337S3S Rev. B
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Rev. H4
