Vishay-Intertech-VS-ST330C12L0L
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VS-ST330C Series
Vishay Semiconductors
Phase Control Thyristors
(Hockey PUK Version), 720 A
FEATURES
• Center amplifying gate
• Metal case with ceramic insulator
• International standard case E-PUK (TO-200AB)
• Designed and qualified for industrial level
RoHS
COMPLIANT
• Material
categorization: for definitions of compliance
E-PUK (TO-200AB)
TYPICAL APPLICATIONS
• DC motor controls
PRIMARY CHARACTERISTICS
• Controlled DC power supplies
• AC controllers
I
T(AV)
720 A
V
DRM
/V
RRM
400 V, 800 V, 1200 V, 1400 V, 1600 V
1.96 V
V
TM
I
GT
100 mA
T
J
-40 °C to +125 °C
E-PUK (TO-200AB)
Single SCR
Package
Circuit configuration
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER
TEST CONDITIONS
VALUES
720
UNITS
A
°C
A
I
T(AV)
I
T(RMS)
I
TSM
I
2
t
T
hs
55
1420
T
hs
25
°C
50 Hz
60 Hz
50 Hz
60 Hz
9000
A
9420
405
kA
2
s
370
V
DRM
/V
RRM
400 to 1600
100
V
t
q
Typical
μs
°C
T
J
-40 to 125
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
V
DRM
/V
RRM
, MAXIMUM REPETITIVE
V
RSM
, MAXIMUM
NON-REPETITIVE PEAK VOLTAGE
V
I
DRM
/I
RR
M
MAXIMUM
AT T
J
= T
J
VOLTAGE
CODE
TYPE NUMBER
PEAK AND OFF-STATE VOLTAGE
V
MAXIMUM mA
04
08
12
14
16
400
800
500
900
VS-ST330C..C
50
1200
1400
1600
1300
1500
1700
Revision: 27-Sep-17
Document Number: 94407
1
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,
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
VS-ST330C Series
Vishay Semiconductors
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
I
T(AV)
TEST CONDITIONS
VALUES UNITS
720 (350)
55 (75)
1420
9000
9420
7570
7920
405
A
Maximum average on-state current
at heatsink temperature
180° conduction, half sine wave
double side (single side) cooled
°C
Maximum RMS on-state current
I
T(RMS)
DC at 25 °C heatsink temperature double side cooled
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
No voltage
reapplied
A
Maximum peak, one-cycle
non-repetitive surge current
I
TSM
100 % V
RRM
reapplied
Sinusoidal half wave,
initial T
J
= T
J
maximum
No voltage
reapplied
370
Maximum I
2
t for fusing
I
2
t
kA
2
s
287
100 % V
RRM
reapplied
262
Maximum I
2
t for fusing
I
2
t
V
T(TO)1
V
T(TO)2
r
t1
t = 0.1 to 10 ms, no voltage reapplied
4050
0.91
kA
2
s
Low level value of threshold voltage
High level value of threshold voltage
Low level value of on-state slope resistance
High level value of on-state slope resistance
Maximum on-state voltage
(16.7 % x
x I
T(AV)
< I <
x I
T(AV)
), T
J
= T
J
maximum
(I >
x I
T(AV)
), T
J
= T
J
maximum
V
0.92
(16.7 % x
x I
T(AV)
< I <
x I
T(AV)
), T
J
= T
J
maximum
(I >
x I
T(AV)
), T
J
= T
J
maximum
0.58
m
V
r
t2
0.57
V
TM
I
H
I
pk
= 1810 A, T
J
= T
J
maximum, t
p
= 10 ms sine pulse
1.96
Maximum holding current
600
T
J
= 25 °C, anode supply 12 V resistive load
mA
Typical latching current
I
L
1000
SWITCHING
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES UNITS
Maximum non-repetitive rate of
rise of turned-on current
Gate drive 20 V, 20
, t
r
1 μs
T
J
= T
J
maximum, anode voltage
80 % V
DRM
dI/dt
1000
A/µs
Gate current 1 A, dI
g
/dt = 1 A/μs
Typical delay time
t
d
t
q
1.0
V
d
= 0.67 % V
DRM
, T
J
= 25 °C
µs
I
TM
= 550 A, T
J
= T
J
maximum, dI/dt = 40 A/μs,
Typical turn-off time
100
V
R
= 50 V, dV/dt = 20 V/μs, gate 0 V 100
, t
p
= 500 μs
BLOCKING
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES UNITS
Maximum critical rate of rise of
off-state voltage
dV/dt
T
J
= T
J
maximum linear to 80 % rated V
DRM
T
J
= T
J
maximum, rated V
DRM
/V
RRM
applied
500
50
V/µs
mA
Maximum peak reverse and
off-state leakage current
I
RRM
,
I
DRM
Revision: 27-Sep-17
Document Number: 94407
2
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,
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
VS-ST330C Series
Vishay Semiconductors
TRIGGERING
VALUES
UNITS
PARAMETER
SYMBOL
TEST CONDITIONS
T
J
= T
J
maximum, t
p
5 ms
TYP. MAX.
Maximum peak gate power
P
GM
P
G(AV)
I
GM
10.0
W
Maximum average gate power
T
J
= T
J
maximum, f = 50 Hz, d% = 50
2.0
3.0
20
Maximum peak positive gate current
Maximum peak positive gate voltage
Maximum peak negative gate voltage
T
J
= T
J
maximum, t
p
5 ms
A
V
+ V
GM
– V
GM
T
J
= T
J
maximum, t
p
5 ms
5.0
T
J
= -40 °C
T
J
= 25 °C
200
100
50
–
200
–
DC gate current required to trigger
DC gate voltage required to trigger
I
GT
mA
Maximum required gate trigger/
T
J
= 125 °C
T
J
= -40 °C
T
J
= 25 °C
T
J
= 125 °C
current/voltage are the lowest
value which will trigger all units
12 V anode to cathode applied
2.5
1.8
1.1
–
V
GT
V
3.0
–
Maximum gate current/voltage
not to trigger is the maximum
T
J
= T
J
maximum value
which will not trigger any
unit with rated V
DRM
anode to
cathode applied
DC gate current not to trigger
DC gate voltage not to trigger
I
GD
10
mA
V
V
GD
0.25
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
-40 to 125
-40 to 150
0.09
UNITS
Maximum operating junction temperature range
Maximum storage temperature range
T
J
°C
T
Stg
DC operation single side cooled
DC operation double side cooled
DC operation single side cooled
DC operation double side cooled
Maximum thermal resistance, junction to heatsink
R
thJ-hs
0.04
K/W
0.02
Maximum thermal resistance, case to heatsink
Mounting force,
10 %
R
thC-hs
0.01
9800
(1000)
N
(kg)
Approximate weight
Case style
83
g
See dimensions – link at the end of datasheet
E-PUK (TO-200AB)
R
thJ-hs
CONDUCTION
SINUSOIDAL CONDUCTION
RECTANGULAR CONDUCTION
CONDUCTION ANGLE
TEST CONDITIONS
UNITS
SINGLE SIDE
DOUBLE SIDE
SINGLE SIDE
DOUBLE SIDE
180°
120°
90°
0.012
0.014
0.017
0.025
0.043
0.011
0.012
0.015
0.022
0.036
0.008
0.014
0.019
0.026
0.043
0.007
0.013
0.017
0.023
0.037
T
J
= T
J
maximum
K/W
60°
30°
Note
•
The table above shows the increment of thermal resistance R
thJ-hs
when devices operate at different conduction angles than DC
Revision: 27-Sep-17
Document Number: 94407
3
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,
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VS-ST330C Series
Vishay Semiconductors
130
120
110
100
90
130
120
110
100
90
ST
3
30C..C
S
e
r
ies
ST
3
30C . . C
S
e
r
ie s
(
S
i
ngle
S
i
d
e Cooled)
thJ-hs
(Double
S
i
d
e Cooled)
R
(DC) = 0.04
K
/
W
R
(DC) = 0.09
K
/
W
th
J
-hs
80
Conduction
P
e
r
i
o
d
Conduct
i
o
n Angle
70
30°
60
50
60°
30°
60°
90°
90°
120°
40
120°
180°
180°
30
80
20
DC
10
70
0
200 400 600 800
100
0
1
200 1400 1600
Average On-
s
t
ate Cu
r
rent (A)
0
50 100
150 200 250 300 350 400
Average On-
s
t
ate Cu
r
rent (A)
Fig. 1 – Current Ratings Characteristics
Fig. 4 – Current Ratings Characteristics
130
1400
ST
3
30C . . C
S
e r
i
e s
180°
120°
90°
120
110
100
90
(
S
i
ngle
S
i
d
e Coo
l
e
d)
1200
1000
800
600
400
200
0
R
(DC) = 0.09 K
/
W
thJ-hs
60°
RM S L
i
m it
30°
Conduction
P
e
r
i
o
d
80
70
60
Conduction Angle
ST
3
30C . . C
S
e r
i
e s
50
60°
40
30°
90°
T =
125°C
J
30
120°
180°
DC
20
0
100 200 300 400 500 600 700 800 900
Average On-
s
t
ate Cu
r
rent (A)
0
100 200 300 400 500 600 700 800
Average On-
s
t
ate Cur
r
e
nt (A)
Fig. 2 – Current Ratings Characteristics
Fig. 5 – On-State Power Loss Characteristics
130
1800
DC
ST
3
30C . . C
S
e r
i
e s
120
110
100
90
180°
(Double
S
i
d
e Cooled)
1600
120°
R
(DC) = 0.04
K
/
W
th
J
-hs
1400
1200
1000
800
600
400
200
0
90°
60°
30°
RM S L
i
m it
80
Conduction Angle
70
60
Conduction
P
e
r
i
o
d
ST
3
30C..C
S
e
ries
30°
50
60°
90°
120°
40
180°
T =
125°C
J
30
20
0
200
400
600
800
1000
0
200 400 600 800
1000 1200
Average On-
s
t
ate Current (A)
Average On-
s
t
ate Current (A)
Fig.
3 – Current Ratings Characteristics
Fig. 6 – On-State Power Loss Characteristics
Revision: 27-Sep-17
Document Number: 94407
4
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DiodesAmericas@vishay.com
,
DiodesAsia@vishay.com
,
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
VS-ST330C Series
Vishay Semiconductors
9000
8500
8000
7500
7000
6500
6000
5500
5000
4500
4000
3500
8000
7500
7000
6500
6000
5500
5000
4500
4000
3500
Maximum Non
R
e
pet
i
t
i
ve
S
u
rge Current
Ver
s
u
s
P
u
l
s
e T
r
a
i
n Dur
a
tion. Control
At Any
R
a
ted
L
o
ad Condition And With
R
a
ted V
Applied
F
o
l
lowing
S
u
rge.
RRM
Ini
t
i
a
l T =
1
25°C
Of Conduction May
N
o
t
B
e
M
a
i
ntained.
J
I
n
itial T = 125°C
@60 Hz 0.0083 s
@50 Hz 0.0100 s
J
No Vol
t
age
R
e
app
l
i
e
d
R
a
ted V
R
e
applied
RRM
ST
3
30 C . . C
S
e
r
ie s
ST
3
30C . . C
S
e
r
ie s
0.01
0.1
Pul
s
e T
r
a
in Dura
tion (
s
)
1
1
10
100
Num
b
er Of
E
q
ual Amplitude Half Cycle Current
P
u
l
s
e
s(
N
)
Fig. 7 – Maximum Non-Repetitive Surge Current
Single and Double Side Cooled
Fig. 8 – Maximum Non-Repetitive Surge Current
Single and Double Side Cooled
10000
T = 25°
C
J
T = 125°
C
J
1000
ST
3
30C..C
S
e
r
i
e
s
100
0
1
2
3
4
5
6
7
I
n
s
t
antaneousOn-
s
t
ate Voltage (V)
Fig. 9 – On-State Voltage Drop Characteristics
0.1
0.01
St e a d y
St a t e
V a
l
u e
= 0.09 K/ W
R
thJ-hs
(
S
i
ngle
S
i
d
e Cooled)
= 0.04 K/ W
R
thJ-hs
(Double
S
i
d
e Cooled)
(DC Operat
i
o
n)
ST3 3
0
C . . C
S
e r
i
e s
1
0.001
0.001
0.01
0.1
10
Sq u a r e
W a v e
P
u lse
D u r a t io n
( s)
Fig. 10 – Thermal Impedance Z
thJ-hs
Characteristics
Revision: 27-Sep-17
Document Number: 94407
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DiodesAmericas@vishay.com
,
DiodesAsia@vishay.com
,
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
VS-ST330C Series
Vishay Semiconductors
100
R
e
ctangu
l
a
r
g
ate pu
l
s
e
(1)
P
G
M = 10W,
tp =
4
m
s
a)
R
e
commended
l
o
a
d
l
ine for
rated di
/
dt :
2
0V, 10ohms; tr<=1 µs
b)
R
e
commended load
l
ine for
<=30
%
r
ated di
/
dt :
1
0V, 10ohms
tr<=1 µs
(2)
P
G
M = 20W,
tp =
2
m
s
(3)
P
G
M = 40W,
tp =
1
m
s
(4)
P
G
M = 60W,
tp = 0.66 ms
10
1
(a)
(b)
(2)
(1)
(3) (4)
VGD
I
G
D
F
r
e
quency
L
i
mited by
P
G
(AV)
10 100
D e v ic e :
S
T
3
30C . . C
S
e r
i
e s
0.1
0
.
1
0.001
0.01
1
I
n
s
t
antaneousGate Cu
r
rent (A)
Fig. 11 – Gate Characteristics
ORDERING INFORMATION TABLE
Device code
VS- ST
33
0
C
16
C
1
–
1
2
3
4
5
6
7
8
9
1
2
3
–
–
Vi
s
hay
S
emiconductor
s
product
Thyristor
–
–
E
ss
ential part number
0 = converter grade
4
5
6
7
8
–
–
–
–
C = ceramic PUK
Voltage code x 100 = V
RRM
(
s
ee Voltage Rating
s
table)
C = PUK ca
s
e E-PUK (TO-200AB)
0 = eyelet terminal
s
(gate and auxiliary cathode un
s
oldered lead
s
)
1 = fa
s
t-on terminal
s
(gate and auxiliary cathode un
s
oldered lead
s
)
2 = eyelet terminal
s
(gate and auxiliary cathode
s
oldered lead
s
)
3 = fa
s
t-on terminal
s
(gate and auxiliary cathode
s
oldered lead
s
)
None = 500 V/μ
s
(
s
tandard
s
election)
L = 1000 V/μ
s
(
s
pecial
s
election)
9
–
Critical dV/dt:
LINKS TO RELATED DOCUMENTS
Dimensions
Revision: 27-Sep-17
Document Number: 94407
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Outline Dimensions
Vishay Semiconductors
E-PUK (TO-200AB)
DIMENSIONS
in millimeters (inches)
Anode to gate
Creepage distance: 11.18 (0.44) minimum
Strike distance: 7.62 (0.30) minimum
25.3 (0.99)
DIA. MAX.
0.3 (0.01) MIN.
C
G
14.1/15.1
(0.56/0.59)
A
0.3 (0.01) MIN.
25.3 (0.99)
DIA. MAX.
Gate terminal for
1.47 (0.06) DIA.
pin receptacle
Note:
A = Anode
40.5 (1.59) DIA. MAX.
C = Cathode
G
=
G
ate
2 holes 3.56 (0.14) x 1.83 (0.07) minimum deep
6.5 (0.26)
4.75 (0.19)
25° 5°
42 (1.65) MAX.
28 (1.10)
Quote between upper and lower pole pieces has to be considered after
application of mounting force (see thermal and mechanical specification)
Revision: 12-Jul-17
Document Number: 95075
1
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,
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Disclaimer
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Revision: 01-Jan-2023
Document Number: 91000
1
