Advanced-Linear-Devices-ALD110814PCL
| Part # | Advanced-Linear-Devices-ALD110814PCL |
Download  | Advanced-Linear-Devices-ALD110814PCL |
TM
A
L
D
DVANCED
INEAR
EVICES,
I
NC.
®
e
EPAD
A
ALD110814/ALD110914
QUAD/DUAL N-CHANNEL ENHANCEMENT MODE EPAD
®
PRECISION MATCHED PAIR MOSFET ARRAY
V
= +1.40V
GS(th)
APPLICATIONS
GENERAL DESCRIPTION
• Precision current mirrors
• Precision current sources
• Voltage choppers
ALD110814/ALD110914 are high precision
monolithic quad/dual enhance-
ment mode N-Channel MOSFE
T
s
m
atched at the factory using ALD’s
proven EPAD
CMOS technology. These devices are intended for low
®
• Differential amplifier input stages
• Discrete voltage comparators
• Voltage bias circuits
• Sample and Hold circuits
• Analog inverters
• Level shifters
• Source followers and buffers
• Current multipliers
voltage, small signal applications.
The ALD110814/ALD110914 MOSFE
T
s
a
re designed and built with
ex-
ceptional device electrical characteristics matching.
Since these devices
are on the same monolithic chip, they also exhibit excellent tempco track-
ing characteristics. Each device is versatile as a circuit element and is a
useful design component for a broad range of analog applications. They
are basic building blocks for current sources, differential amplifier input
stages, transmission gates, and multiplexer applications. For most appli-
cations, connect the V+ pin to the most positive voltage and the V- and IC
pins to the most
negative voltage in the system. All other pins must have
voltages within these voltage limits at all times.
• Discrete analog multiplexers/matrices
• Discrete analog switches
The ALD110814/ALD110914 devices are built for minimum offset voltage
and differential thermal response, and they are designed for switching
and amplifying applications in +1.5V to +10V systems where low input
bias current, low input capacitance and fast switching speed are desired.
Since these are MOSFET devices, they feature very large (almost infinite)
current gain in a low frequency, or near DC, operating environment.
PIN CONFIGURATION
ALD110814
–
–
V
V
1
2
3
4
5
6
7
8
IC*
G
16
IC*
G
The ALD110814/ALD110914 are suitable for use in precision applications
which require very high current gain, beta, such as current mirrors and
current sources. The high input impedance and the high DC current gain
of the Field Effect Transistors result in extremely low current loss through
the control gate. The DC current gain is limited by the gate input leakage
current, which is specified at 30pA at room temperature. For example, DC
beta of the device at a drain current of 3mA and input leakage current of
30pA at 25
°
C is 3mA/30pA = 100,000,000.
15
14
13
12
11
10
9
N2
N1
M 2
M 1
D
V
S
D
S
N2
N1
+
+
V
12
–
–
V
V
34
D
D
N4
N3
M 4
M 3
FEATURES
G
N4
G
N3
• Enhancement-mode (normally off)
IC*
IC*
–
–
• Standard Gate Threshold Voltages: +1.40V
• Matched MOSFET-to-MOSFET characteristics
• Tight lot-to-lot parametric control
V
V
SCL, PCL PACKAGES
• Parallel connection of MOSFE
T
s
t
o increase drain currents
• Low input capacitance
ALD110914
–
• V
match to 10mV
GS(th)
• High input impedance — 10
12
Ω
typical
–
V
V
1
2
3
4
8
7
6
5
• Positive, zero, and negative V
• DC current gain >10
8
temperature coefficient
IC*
G
IC*
GS(th)
G
N2
• Low input and output leakage currents
N1
M 1
M 2
ORDERING INFORMATION
(“L” suffix
denotes lead-free (RoHS))
Operating
T
e
mperature Range*
D
S
D
N1
N2
–
–
V
V
12
0
°
C to +70
°
C
0
°
C to +70
°
C
16-Pin
SOIC
Package
16-Pin
Plastic Dip
Package
8-Pin
SOIC
Package
8-Pin
Plastic Dip
Package
SAL, PAL PACKAGES
*IC pins are internally connected.
Connect to V-
ALD110814SCL ALD110814PCL
ALD110914SAL ALD110914PAL
* Contact factory for industrial temp. range or user-specified threshold voltage values.
©2016 Advanced Linear Devices, Inc., Vers. 2.3
1 of 12
ABSOLUTE MAXIMUM RATINGS
Drain-Source voltage, V
Gate-Source voltage, V
Power dissipation
10.6V
10.6V
500 mW
DS
GS
Operating temperature range SCL, PCL, SAL, PAL
Storage temperature range
Lead temperature, 10 seconds
0
°
C to +70
°
C
-65
°
C to +150
°
C
+260
°
C
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.
OPERATING ELECTRICAL CHARACTERISTICS
+
–
V =
+5V V
= GND
T =
25
°
C unless otherwise specified
A
ALD110814/ALD110914
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions
Gate Threshold Voltage
Offset Voltage
V
V
1.38
1.40
3
1.42
10
V
I
I
= 1
µ
A, V
= 1
µ
A
= 0.1V
GS(th)
OS
DS
DS
mV
DS
V
-V
GS(th)1 GS(th)2
Offset Voltage
T
e
mpco
TC
TC
5
µ
V/
°
C
mV/
°
C
V
= V
VOS
DS1
DS2
Gate Threshold Voltage
T
e
mpco
-1.7
0.0
+1.6
I
I
I
= 1
µ
A, V
= 20
µ
A, V
= 40
µ
A, V
= 0.1V
VGS(th)
DS
DS
DS
DS
= 0.1V
= 0.1V
DS
DS
Drain Source On Current
Forward Transconductance
I
12.0
3.0
mA
V
V
= +10.6V, V
= +5V
DS(ON)
GS
GS
DS
= +5V
= +5.4V, V
DS
G
1.4
mmho
V
V
= +5.4V
= +10.4V
FS
GS
DS
Transconductance Mismatch
Output Conductance
∆
G
1.8
68
%
FS
G
µ
mho
V
V
= +5.4V
= +10.4V
OS
GS
DS
Drain Source On Resistance
R
500
0.5
Ω
%
V
V
V
= +5.4V
= +0.1V
DS(ON)
GS
DS
Drain Source On Resistance
Mismatch
∆
R
BV
I
DS(ON)
–
Drain Source Breakdown
Voltage
10
V =
V
= -0.6V
GS
= 1.0
µ
A
DSX
I
DS
Drain Source Leakage Current
1
10
3
400
4
pA
nA
V
= -0.6
V
, V
=+5V
DS(OFF)
GS
DS
–
V =
-5V
T
= 125
°
C
A
Gate Leakage Current
1
I
200
1
pA
nA
V
= +5
V
, V
=125
°
C
= 0V
DS
GSS
GS
T
A
Input Capacitance
C
C
2.5
0.1
10
pF
pF
ns
ns
ISS
Transfer Reverse Capacitance
Turn-on Delay Time
RSS
+
+
t
on
t
off
V
V
= 5
V
,
R =
5
K
Ω
L
Turn-off Delay Time
10
= 5
V
,
R =
5
K
Ω
L
Crosstalk
60
dB
f = 100KHz
1
Notes:
Consists of junction leakage currents
ALD110814/ALD110914, Vers. 2.3
Advanced Linear Devices
2 of 12
PERFORMANCE CHARACTERISTICS OF EPAD
®
PRECISION MATCHED PAIR MOSFET FAMILY
ALD1108xx/ALD1109xx/ALD1148xx/ALD1149xx are monolithic
signal voltages are applied to the gate terminal, the designer/user
can depend on the EPAD MOSFET device to be controlled, modu-
lated and turned off precisely. The device can be modulated and
turned-off under the control of the gate voltage in the same manner
as the enhancement mode EPAD MOSFET and the same device
equations apply.
quad/dual N-Channel MOSFE
T
s
m
atched at the factory usin
g
A
LD’s
®
proven EPAD
CMOS technology. These devices are intended for
low voltage, small signal applications.
ALD’s Electrically Programmable Analog Device (EPAD) technol-
ogy provides a family of matched transistors with a range of preci-
sion threshold values.
All members of this family are designed and
actively programmed for exceptional matching of device electrical
characteristics. Threshold
values range from -3.50V Depletion to
+3.50V Enhancement devices, including standard products speci-
fied at -3.50
V
,
–
1.30V, -0.40V, +0.00V, +0.20V, +0.40V, +0.80V,
+1.40
V
,
a
nd +3.30
V
.
A
LD can also provide any customer desired
value between -3.50V and +3.50V.
For all these devices, even the
depletion and zero threshold transistors, ALD EPAD technology
enables the same well controlled turn-off, subthreshold, and low
leakage characteristics as standard enhancement mode MOSFE
T
s
.
With the design and active programming, even units from different
batches and different dates of manufacture have well matched char-
acteristics. As these devices are on the same monolithic chip, they
also exhibit excellent tempco tracking.
EPAD MOSFE
T
s
a
re ideal for minimum offset voltage and differen-
tial thermal response, and they are used for switching and amplify-
ing applications in low voltage (1V to 10V or +/-0.5V to +/-5V) or
ultra low voltage (less than 1V or +/-0.5V) systems. They feature
low input bias current (less than 30pA max.), ultra low power
(microWatt) or Nanopower (power measured in nanoWatt) opera-
tion, low input capacitance and fast switching speed. These de-
vices can be used where a combination of these characteristics
are desired.
KEY APPLICATION ENVIRONMENT
EPAD MOSFE
T
A
rray products are for circuit applications in one or
more of the following operating environments:
This EPAD MOSFE
T
A
rray product family (EPAD MOSFET) is avail-
able in the three separate categories, each providing a distinctly
different set of electrical specifications and characteristics. The first
category is the ALD110800/ALD110900 Zero-Threshold™ mode
EPAD MOSFE
T
s
. The second category is the ALD1108xx/
ALD1109xx enhancement mode EPAD MOSFE
T
s
. The third cat-
egory is the ALD1148xx/ALD1149xx depletion mode EPAD
MOSFE
T
s
. (The suffix “xx” denotes threshold voltage in 0.1V steps,
for example, xx = 08 denotes 0.80V).
* Low voltage: 1V to 10V or +/-0.5V to +/-5V
* Ultra low voltage: less than 1V or +/-0.5V
* Low power: voltage x current = power measured in microwatt
* Nanopower: voltage x current = power measured in nanowatt
* Precision matching and tracking of two or more MOSFE
T
s
ELECTRICAL CHARACTERISTICS
The turn-on and turn-off electrical characteristics of the EPAD
MOSFET products are shown in the Drain-Source On Current vs
Drain-Source On Voltage and Drain-Source On Current vs Gate-
Source Voltage graphs. Each graph shows the Drain-Source On
Current versus Drain-Source On Voltage characteristics as a func-
tion of Gate-Source voltage in a different operating region under
different bias conditions. As the threshold voltage is tightly speci-
fied, the Drain-Source On Current at a given gate input voltage is
better controlled and more predictable when compared to many
other types of MOSFE
T
s
.
The ALD110800/ALD110900 (quad/dual) are EPAD MOSFE
T
s
i
n
which the individual threshold voltage of each MOSFET is fixed at
zero. The threshold voltage is defined as I
= 1
µ
A @ V
= 0.1V
DS DS
when the gate voltage V
= 0.00
V
.
Z
ero threshold devices oper-
GS
ate in the enhancement region when operated above threshold volt-
age and current level (V
> 0.00V and I
> 1
µ
A) and subthresh-
GS DS
old region when operated at or below threshold voltage and cur-
rent level (V
<= 0.00V and I
< 1
µ
A). This device, along with
GS DS
other very low threshold voltage members of the product family,
constitute a class of EPAD MOSFE
T
s
t
hat enable ultra low supply
voltage operation and nanopower type of circuit designs, applicable
in either analog or digital circuits.
EPAD MOSFE
T
s
b
ehave similarly to a standard MOSFE
T
,
t
here-
fore classic equations for a n-channel MOSFET applies to EPAD
MOSFET as well. The Drain current in the linear region (V
<
DS
The ALD1108xx/ALD1109xx (quad/dual) product family features
precision matched enhancement mode EPAD MOSFET devices,
which require a positive bias voltage to turn on. Precision threshold
values such as +1.40
V
,
+
0.80V, +0.20V are offered. No conductive
channel exists between the source and drain at zero applied gate
voltage for these devices, except that the +0.20V version has a
subthreshold current at about 20nA.
V
– V
) is given by:
GS
GS(th)
I
= u . C
. W/L . [V
– V
GS(th)
– V
/2] . V
DS DS
DS
OX
GS
where:
u = Mobility
C
V
= Capacitance / unit area of Gate electrode
= Gate to Source voltage
OX
GS
V
= Turn-on threshold voltage
GS(th)
The ALD1148xx/ALD1149xx (quad/dual) features depletion mode
EPAD MOSFE
T
s
, which are normally-on devices when the gate
bias voltage is at zero volts. The depletion mode threshold voltage
is at a negative voltage level at which the EPAD MOSFET turns off.
V
= Drain to Source voltage
W = Channel width
L = Channel length
DS
Without a supply voltage and/or with V
= 0.0V the EPAD MOSFET
In this region of operation the I
value is proportional to V
value
DS DS
GS
device is already turned on and exhibits a defined and controlled
on-resistance between the source and drain terminals.
and the device can be used as a gate-voltage controlled resistor.
For higher values of V
where V
>= V
DS DS
– V
, the satura-
GS(th)
GS
is now given by (approx.):
The ALD1148xx/ALD1149xx depletion mode EPAD MOSFE
T
s
a
re
different from most other types of depletion mode MOSFE
T
s
a
nd
certain types of JFE
T
s
i
n that they do not exhibit high gate leakage
currents and channel/junction leakage currents.
When negative
tion current I
DS
2
]
GS(th)
I
= u . C
OX
. W/L . [V
– V
DS
GS
ALD110814/ALD110914, Vers. 2.3
Advanced Linear Devices
3 of 12
PERFORMANCE CHARACTERISTICS OF EPAD
®
PRECISION MATCHED PAIR MOSFET FAMILY (cont.)
ZERO TEMPERATURE COEFFICIENT (ZTC) OPERATION
SUB-THRESHOLD REGION OF OPERATION
For an EPAD MOSFET in this product family, there exist operating
points where the various factors that cause the current to increase
as a function of temperature balance out those that cause the cur-
rent to decrease, thereby canceling each other, and resulting in net
temperature coefficient of near zero. One of these temperature
stable operating points is obtained by a ZTC voltage bias condi-
Low voltage systems, namely those operating at 5
V
,
3
.3V or less,
typically require MOSFE
T
s
t
hat have threshold voltage of 1V or
less. The threshold, or turn-on, voltage of the MOSFET is a voltage
below which the MOSFET conduction channel rapidly turns off. For
analog designs, this threshold voltage directly affects the operating
signal voltage range and the operating bias current levels.
tion, which is 0.55V above a threshold voltage when V
= V
,
GS
DS
resulting in a temperature stable current level of about 68
µ
A. For
other ZTC operating points, see ZTC characteristics.
At or below threshold voltage, an EPAD MOSFET exhibits a turn-
off characteristic in an operating region called the subthreshold re-
gion. This is when the EPAD MOSFET conduction channel rapidly
turns off as a function of decreasing applied gate voltage. The con-
duction channel induced by the gate voltage on the gate electrode
decreases exponentially and causes the drain current to decrease
exponentially. However, the conduction channel does not shut off
abruptly with decreasing gate voltage.
Rather, it decreases at a
fixed rate of approximately 116mV per decade of drain current de-
crease. Thus, if the threshold voltage is +0.20V, for example, the
PERFORMANCE CHARACTERISTICS
Performance characteristics of the EPAD MOSFET product family
are shown in the following graphs. In general, the threshold voltage
shift for each member of the product family causes other affected
electrical characteristics to shift with an equivalent linear shift in
V
GS(th)
bias voltage. This linear shift in V
causes the subthresh-
drain current is 1
µ
A at V
= +0.20
V
.
A
t V
= +0.09
V
,
t
he drain
GS
GS
GS
old I-V curves to shift linearly as well. Accordingly, the subthreshold
operating current can be determined by calculating the gate volt-
current would decrease to 0.1
µ
A. Extrapolating from this, the drain
current is 0.01
µ
A (10nA) at V
= -0.03V, 1nA at V
= -0.14V,
GS
GS
age drop relative to its threshold voltage, V
.
and so forth. This subthreshold characteristic extends all the way
down to current levels below 1nA and is limited by other currents
such as junction leakage currents.
GS(th)
R
AT V
= GROUND
GS
DS(ON)
At a drain current to be declared “zero current” by the user, the
Several of the EPAD MOSFE
T
s
p
roduce a fixed resistance when
their gate is grounded. For ALD110800, the drain current is 1
µ
A at
V
voltage at that zero current can now be estimated. Note that
GS
using the above example, with V
= +0.20
V
,
t
he drain current
GS(th)
V
DS
= 0.1V and V
= 0.0
V
.
T
hus, just by grounding the gate of
still hovers around 20nA when the gate is at zero volts, or ground.
GS
the ALD110800, a resistor with R
= ~100K
Ω
is produced.
DS(ON)
When an ALD114804 gate is grounded, the drain current I
=
DS
= 5.4K
Ω
. Similarly,
18.5
µ
A @ V
= 0.1
V
,
p
roducing R
LOW POWER AND NANOPOWER
DS
ALD114813 and ALD114835 produce drain currents of 77
µ
A and
DS(ON)
185
µ
A, respectively, at V
and 540
Ω
, respectively.
= 0.0
V
,
a
nd R
values of 1.3K
Ω
When supply voltages decrease, the power consumption of a given
load resistor decreases as the square of the supply voltage. So
one of the benefits in reducing supply voltage is to reduce power
consumption. While decreasing power supply voltages and power
consumption go hand-in-hand with decreasing usefu
l
A
C bandwidth
and at the same time increases noise effects in the circuit, a circuit
designer can make the necessary tradeoffs and adjustments in any
given circuit design and bias the circuit accordingly.
GS
DS(ON)
MATCHING CHARACTERISTICS
A key benefit of using a matched pair EPAD MOSFET is to main-
tain temperature tracking. In general, for EPAD MOSFET matched
pair devices, one device of the matched pair has gate leakage cur-
rents, junction temperature effects, and drain current temperature
coefficient as a function of bias voltage that cancel out similar ef-
fects of the other device, resulting in a temperature stable circuit.
As mentioned earlier, this temperature stability can be further en-
hanced by biasing the matched-pairs at Zero
T
e
mpco (ZTC) point,
even though that could require special circuit configuration and
power consumption design consideration.
With EPAD MOSFE
T
s
, a circuit that performs a specific function
can be designed so that power consumption can be minimized. In
some cases, these circuits operate in low power mode where the
power consumed is measure in micro-watts. In other cases, power
dissipation can be reduced to the nano-watt region and still provide
a useful and controlled circuit function operation.
ALD110814/ALD110914, Vers. 2.3
Advanced Linear Devices
4 of 12
TYPICAL PERFORMANCE CHARACTERISTICS
OUTPUT CHARACTERISTICS
DRAIN-SOURCE ON RESISTANCE
vs. DRAIN-SOURCE ON CURRENT
5
4
2500
2000
V
– V
– V
= +5V
= +4V
T
= +25
°
C
GS
GS(th)
A
T
= +25
°
C
A
V
GS
GS(th)
3
2
1
1500
1000
V
– V
= +3V
V
= V
+ 4V
GS(th)
GS
GS
GS(th)
GS
V
– V
GS(th)
= +2V
= +1V
500
0
V
– V
GS
GS(th)
V
= V
GS(th)
+ 6V
10000
GS
0
0
2
4
6
8
10
100
10
1000
DRAIN-SOURCE ON VOLTAGE (V)
DRAIN-SOURCE ON CURRENT (
µ
A)
TRANSCONDUCTANCE vs.
AMBIENT TEMPERATURE
FORWARD TRANSFER CHARACTERISTICS
2.5
2.0
20
15
V
= -3.5V
GS(th)
T
DS
= +25
°
C
A
V
= +10V
V
= -1.3V
GS(th)
1.5
1.0
0.5
0
V
= -0.4V
GS(th)
= 0.0V
10
V
GS(th)
= +0.2V
V
GS(th)
5
0
V
= +0.8V
GS(th)
V
= +1.4V
GS(th)
-50
-25
0
25
50
75
100
125
-4
-2
0
6
10
2
4
8
AMBIENT TEMPERATURE (
°
C)
GATE-SOURCE VOLTAGE (V)
SUBTHRESHOLD FORWARD TRANSFER
CHARACTERISTICS
SUBTHRESHOLD FORWARD TRANSFER
CHARACTERISTICS
10000
1000
100000
10000
T
V
= +25
°
C
A
= +0.1V
DS
V
= +0.1V
DS
Slope = 110mV/decade
~
1000
100
10
100
10
1
=
0.0V
= +1.4V
=
-0.4V
=
-3.5V
= +0.8V
=
-1.3V
=
+0.2V
GS(th)
GS(th)
GS(th)
GS(th)
GS(th)
GS(th)
GS(th)
V
V
V
V
1
V
V
V
0.1
0.01
0.1
0.01
-4
-3
-2
-1
0
1
2
V
-0.5
GS(th)
V
-0.4
GS(th)
V
-0.3
GS(th)
V
-0.2
GS(th)
V
-0.1
GS(th)
V
GS(th)
GATE-SOURCE VOLTAGE (V)
GATE-SOURCE VOLTAGE (V)
ALD110814/ALD110914, Vers. 2.3
Advanced Linear Devices
5 of 12
TYPICAL PERFORMANCE CHARACTERISTICS (cont.)
DRAIN-SOURCE ON CURRENT, BIAS
CURRENT vs. AMBIENT TEMPERATURE
DRAIN-SOURCE ON CURRENT, BIAS
CURRENT vs. AMBIENT TEMPERATURE
5
4
100
Zero Temperature
Coefficient (ZTC)
-55
°
C
-25
°
C
+125
°
C
3
2
1
0
°
C
50
-25
°
C
+70
°
C
+125
°
C
0
0
V
V
+3
V
GS(th)
V
-1
GS(th)
V
+1
GS(th)
V
+2
GS(th)
+4
GS(th)
V
GS(th)
V
+0.2
GS(th)
V
+0.4
GS(th)
V
+0.6
GS(th)
V
+0.8
GS(th)
V
+1.0
GS(th)
GS(th)
GATE- AND DRAIN-SOURCE VOLTAGE
(V =
V )
(V)
GATE- AND DRAIN-SOURCE VOLTAGE
(V =
V )
(V)
GS DS
GS
DS
DRAIN-SOURCE ON CURRENT vs.
DRAIN-SOURCE ON RESISTANCE
GATE-SOURCE VOLTAGE vs.
DRAIN-SOURCE ON CURRENT
V
+4
GS(th)
100000
10000
V
= +0.5V
V
= R
• I
DS
T =
+125
°
C
A
DS
ON DS(ON)
T
V
= +25
°
C
A
V
+3
+2
= -4.0V to +5.4V
GS(th)
GS
D
V
1000
DS
V
= +0.5V
= +25
°
C
DS
T
A
V
GS(th)
100
10
1
V
GS
I
DS(ON)
V
V
= +10V
DS
V
= +5V
DS
= +125
°
C
V
+1
GS(th)
T
A
V
= +0.1V
= +5V
= +1V
DS
DS
DS
V
= +5V
= +25
°
C
DS
V
V
GS(th)
T
A
0.1
V
-1
GS(th)
0.01
1
0.1
10
100
1000
10000
0.1
1
10
100
1000
10000
DRAIN-SOURCE ON CURRENT (
µ
A)
DRAIN-SOURCE ON RESISTANCE (K
Ω
)
OFFSET VOLTAGE vs.
AMBIENT TEMPERATURE
DRAIN-SOURCE ON CURRENT
vs. OUTPUT VOLTAGE
5
4
4
3
2
1
V
= +10V
DS
REPRESENTATIVE UNITS
T
= +25
°
C
A
3
2
1
0
-1
-2
V
= +5V
DS
V
= +1V
DS
-3
-4
0
V
V
+3
GS(th)
-50
-25
0
25
50
75
100
125
V
+1
GS(th)
V
+2
GS(th)
V
+4
GS(th)
V
+5
GS(th)
GS(th)
AMBIENT TEMPERATURE (
°
C)
OUTPUT VOLTAGE (V)
ALD110814/ALD110914, Vers. 2.3
Advanced Linear Devices
6 of 12
TYPICAL PERFORMANCE CHARACTERISTICS (cont.)
GATE SOURCE VOLTAGE vs.
DRAIN-SOURCE ON RESISTANCE
GATE LEAKAGE CURRENT
vs. AMBIENT TEMPERATURE
V
V
+4
+3
+2
+1
GS(th)
10000
1000
0.0V
≤
V
≤
5.0V
DS
+125
°
C
GS(th)
D
V
100
DS
V
GS(th)
10
1
I
DS(ON)
V
GS
S
+25
°
C
I
GSS
V
V
GS(th)
0.1
0.01
GS(th)
-50
-25
0
25
50
75
100
125
0
2
4
6
8
10
AMBIENT TEMPERATURE (
°
C)
DRAIN-SOURCE ON RESISTANCE (K
Ω
)
DRAIN-GATE DIODE CONNECTED VOLTAGE
TEMPCO vs. DRAIN-SOURCE ON CURRENT
TRANSFER CHARACTERISTICS
1.6
1.2
0.8
5
V
= -3.5V
GS(th)
T
DS
= +25
°
C
A
-55
°
C
≤
T
≤
+125
°
C
A
V
= +10V
V
= -1.3V
GS(th)
2.5
0
V
= -0.4V
GS(th)
V
V
= 0.0V
GS(th)
-2.5
-5
0.4
0.0
= +0.2V
= +0.8V
= +1.4V
GS(th)
V
V
GS(th)
GS(th)
100
1
10
1000
2
4
6
10
-4
-2
0
8
DRAIN-SOURCE ON CURRENT (
µ
A)
GATE-SOURCE VOLTAGE (V)
ZERO TEMPERATURE
SUBTHRESHOLD CHARACTERISTICS
COEFFICIENT CHARACTERISTICS
0.6
2.5
2.0
V
= -3.5V
GS(th)
0.5
0.3
0.2
0.0
V
= -1.3V, -0.4V, 0.0V, +0.2V, +0.8V, +1.4V
GS(th)
1.5
V
= +0.4V
GS(th)
= +25
°
C
T
A
1.0
0.5
V
= +0.4V
GS(th)
= +55
°
C
T
A
0.0
V
= +0.2V
GS(th)
= +25
°
C
V
= +0.2V
GS(th)
= +55
°
C
T
A
T
A
-0.5
0.1
0.2
0.5
1.0
2.0
5.0
10000
100000
1000
100
10
1
0.1
DRAIN-SOURCE ON VOLTAGE (V)
DRAIN-SOURCE ON CURRENT (nA)
ALD110814/ALD110914, Vers. 2.3
Advanced Linear Devices
7 of 12
TYPICAL PERFORMANCE CHARACTERISTICS (cont.)
TRANCONDUCTANCE vs.
DRAIN-SOURCE ON CURRENT
THRESHOLD VOLTAGE vs.
AMBIENT TEMPERATURE
4.0
1.2
T
DS
= +25
°
C
A
V
= +10V
I
V
= +1
µ
A
DS
3.0
2.0
1.0
0.0
0.9
0.6
= +0.1V
DS
V =
+1.4V
t
0.3
0.0
V =
0.0V
t
V =
+0.8V
t
V =
+0.2V
t
V =
+0.4V
t
0
2
4
6
8
10
-50
-25
0
25
50
75
100
125
AMBIENT TEMPERATURE (
°
C)
DRAIN-SOURCE ON CURRENT (mA)
NORMALIZED SUBTHRESHOLD
CHARACTERISTICS RELATIVE TO
GATE THRESHOLD VOLTAGE
SUBTHRESHOLD FORWARD
TRANSFER CHARACTERISTICS
2.0
1.0
0.0
0.3
0.2
I
V
= +1
µ
A
DS
= +0.1V
DS
V
DS
= +0.1V
0.1
V
= 0.0V
GS(th)
0
-0.1
-0.2
V
V
= -0.4V
= -1.3V
GS(th)
-1.0
-2.0
GS(th)
+25
°
C
+55
°
C
-3.0
-4.0
-0.3
-0.4
V
= -3.5V
GS(th)
75
AMBIENT TEMPERATURE (
°
C)
125
1
0.1
25
100
10
-25
10000
1000
DRAIN-SOURCE ON CURRENT (nA)
ALD110814/ALD110914, Vers. 2.3
Advanced Linear Devices
8 of 12
SOIC-16 PACKAGE DRAWING
16 Pin Plastic SOIC Package
E
Millimeters
Inches
Dim
A
Min
Max
Min
Max
1.75
0.25
0.45
0.25
10.00
4.05
0.053
0.069
1.35
S (45
°
)
0.004
0.014
0.007
0.385
0.140
0.010
0.018
0.010
0.394
0.160
0.10
0.35
0.18
9.80
3.50
A
1
b
C
D-16
E
D
1.27 BSC
0.050 BSC
0.224
e
6.30
0.937
8
°
0.248
0.037
8
°
5.70
0.60
0
°
H
0.024
0
°
L
A
ø
0.50
0.010
0.020
0.25
S
A
e
1
b
S (45
°
)
C
H
L
ø
ALD110814/ALD110914, Vers. 2.3
Advanced Linear Devices
9 of 12
PDIP-16 PACKAGE DRAWING
16 Pin Plastic DIP Package
E
E
1
Millimeters
Inches
Dim
A
Min
Max
Min
Max
5.08
0.105
0.200
3.81
0.38
1.27
0.89
0.38
0.20
18.93
5.59
7.62
2.29
7.37
2.79
0.38
0
°
1.27
2.03
1.65
0.51
0.30
21.33
7.11
8.26
2.79
7.87
3.81
1.52
15
°
0.015
0.050
0.035
0.015
0.008
0.745
0.220
0.300
0.090
0.290
0.110
0.015
0
°
0.050
0.080
0.065
0.020
0.012
0.840
0.280
0.325
0.110
0.310
0.150
0.060
15
°
A
A
1
2
b
b
1
c
D
D-16
E
S
E
1
A
2
e
A
e
1
L
L
A
1
S-16
ø
e
b
b
1
c
ø
e
1
ALD110814/ALD110914, Vers. 2.3
Advanced Linear Devices
10 of 12
SOIC-8 PACKAGE DRAWING
8 Pin Plastic SOIC Package
E
Millimeters
Inches
Dim
A
Min
Max
Min
Max
1.75
0.25
0.45
0.25
5.00
4.05
0.053
0.069
1.35
S (45
°
)
0.004
0.014
0.007
0.185
0.140
0.010
0.018
0.010
0.196
0.160
0.10
0.35
0.18
4.69
3.50
A
1
b
C
D-8
E
D
1.27 BSC
0.050 BSC
0.224
e
6.30
0.937
8
°
0.248
0.037
8
°
5.70
0.60
0
°
H
0.024
0
°
A
L
ø
S
A
1
e
0.50
0.010
0.020
0.25
b
S (45
°
)
C
H
L
ø
ALD110814/ALD110914, Vers. 2.3
Advanced Linear Devices
11 of 12
PDIP-8 PACKAGE DRAWING
8 Pin Plastic DIP Package
E
E
1
Millimeters
Inches
Dim
A
Min
Max
Min
Max
5.08
0.105
0.200
3.81
0.38
1.27
0.89
0.38
0.20
9.40
5.59
7.62
2.29
7.37
2.79
1.02
0
°
1.27
2.03
1.65
0.51
0.30
11.68
7.11
8.26
2.79
7.87
3.81
2.03
15
°
0.015
0.050
0.035
0.015
0.008
0.370
0.220
0.300
0.090
0.290
0.110
0.040
0
°
0.050
0.080
0.065
0.020
0.012
0.460
0.280
0.325
0.110
0.310
0.150
0.080
15
°
A
A
1
2
b
b
1
D
c
S
D-8
E
A
2
E
1
A
e
L
A
1
e
1
e
b
L
S-8
ø
b
1
c
ø
e
1
ALD110814/ALD110914, Vers. 2.3
Advanced Linear Devices
12 of 12
