Advanced-Linear-Devices-ALD210808PCL

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DVANCED

INEAR

EVICES,

NC.

EPAD

ALD210808A/ALD210808

PRECISION N-CHANNEL EPAD

MOSFET ARRAY

= +0.80V

GS(th)

QUAD HIGH DRIVE MATCHED PAIR

FEATURES & BENEFITS

GENERAL DESCRIPTION

LD210808A/ALD210808 precision enhancement mode N-Channel EPAD

MOSFET array is precision matched at the factory using ALD’s proven EPAD

CMOS technology. These quad monolithic devices are enhanced additions to

the ALD110808A/ALD110808 EPAD

MOSFET Family, with increased forward

transconductance and output conductance, particularly at very low supply volt-

ages.

= +0.80V

0.010V

• Precision V

GS(th)

match) to 2mV/10mV max.

• V

OS GS(th)

• Sub-threshold voltage (nano-power) operation

• < 800mV min. operating voltage

• < 1nA min. operating current

• < 1nW min. operating power

• > 100,000,000:1 operating current ranges

• High transconductance and output conductance

Intended for low voltage, low power small signal applications, th

LD210808A/

ALD210808 features precision threshold voltage, which enables circuit designs

with input/output signals referenced to GND at enhanced operating voltage

ranges. With

these devices, a circuit with multiple cascading stages can be

built to operate at extremely low supply/bias voltage levels. For example, a

nanopower input amplifier stage operating at less than 1.0V supply voltage has

been successfully built with these devices.

• Low R

of 25

Ω

DS(ON)

• Output current > 50mA

• Matched and tracked tempco

• Tight lot-to-lot parametric control

• Positive, zero, and negative V

tempco

GS(th)

• Low input capacitance and leakage currents

ALD210808

PAD MOSFE

eature exceptional matched pair

electrical char-

APPLICATIONS

set precisely at +0.80V

0.01V,

acteristics of Gate Threshold Voltage V

GS(th)

= +10

A @ V

= 0.1

ith a typical offset voltage of only

0.001V (1mV).

• Low overhead current mirrors and current sources

• Zero Power Normally-On circuits

• Energy harvesting detectors

• Very low voltage analog and digital circuits

• Zero power fail-safe circuits

Built on a single monolithic chip, they also exhibit excellent temperature track-

ing characteristics. These precision devices are versatile as design components

for a broad range of analog small signal applications such as basic building

blocks for current mirrors, matching circuits, current sources, differential ampli-

fier input stages, transmission gates, and multiplexers. They also excel in lim-

ited operating voltage applications, such as very low level voltage-clamps and

nano-power normally-on circuits.

• Backup battery circuits & power failure detector

• Extremely low level voltage-clamps

• Extremely low level zero-crossing detectors

• Matched source followers and buffers

• Precision current mirrors and current sources

• Matched capacitive probes and sensor interfaces

• Charge detectors and charge integrators

• High gain differential amplifier input stage

• Matched peak-detectors and level-shifters

• Multiple Channel Sample-and-Hold switches

• Precision Current multipliers

In addition to precision matched-pair electrical characteristics, each individual

EPAD MOSFET also exhibits well controlled manufacturing characteristics, en-

abling the user to depend on tight design limits from different production batches.

These devices are built for minimum offset voltage and differential thermal re-

sponse, and they can be used for switching and amplifying applications in +0.1V

to +10V (

0.05V to

5V) powered systems where low input bias current, low

input capacitance, and fast switching speed are desired. At V

> +0.80V, the

device exhibits enhancement mode characteristics whereas at V

< +0.80V

• Discrete matched analog switches/multiplexers

• Nanopower discrete voltage comparators

the device operates in the subthreshold voltage region and exhibits conven-

tional sub threshold characteristics, with well controlled turn-off and sub-thresh-

old levels that operate the same as standard enhancement mode MOSFE

PIN CONFIGURATION

ALD210808

LD210808A/ALD210808 features high input impedance (2.5 x 10

Ω

) and

high DC current gain (>10

). A sample calculation of the DC current gain at a

drain output current of 30mA and input current of 300pA at 25

C is 30mA/300pA

= 100,000,000, which translates into a dynamic operating current range of about

eight orders of magnitude.

eries of four graphs titled “Forward Transfer Char-

acteristics”, with the 2

and 3

sub-titled “expanded (subthreshold)” and “fur-

ther expanded (subthreshold)”, and the 4

sub-titled “low voltage”, illustrates

the wide dynamic operating range of these devices.

IC*

16 IC*

M 1

M 2

Generally it is recommended that the V+ pin be connected to the most positive

voltage and the V- and IC (internally-connected) pins to the most negative volt-

age in the system. All other pins must have voltages within these voltage limits

at all times. Standard ESD protection facilities and handling procedures for static

sensitive devices are highly recommended when using these devices.

–

M 4

M 3

ORDERING INFORMATION

(“L” suffix

denotes lead-free (RoHS))

Operating

mperature Range *

C to +70

–

16-Pin SOIC Package

16-Pin Plastic Dip Package

ALD210808ASCL

ALD210808SCL

ALD210808APCL

ALD210808PCL

SCL, PCL PACKAGES

*IC pins are internally connected, connect to V-

*Contact factory for industrial temp. range or user-specified threshold voltage values.

www.aldinc.com

1 of 12

ABSOLUTE MAXIMUM RATINGS

Drain-Source voltage, V

10.0V

80mA

Gate-Source voltage, V

Operating Current

Power dissipation

500mW

Operating temperature range SCL, PCL

Storage temperature range

Lead temperature, 10 seconds

C to +70

-65

C to +150

+260

CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.

OPERATING ELECTRICAL CHARACTERISTICS

–

V =

+5V V

= GND

T =

C unless otherwise specified

ALD210808A

ALD210808

Parameter

Symbol

GS(th)

Min

0.78

Typ

Max

Min

Typ

Max

Unit

Test Conditions

Gate Threshold Voltage

0.80

0.82

0.78

0.80

0.82

= 10

A, V

= 0.1V

Offset Voltage

– V

GS(th)M1

GS(th)M3

GS(th)M2

GS(th)M4

or V

Offset Voltage

mpco

mV/

= V

DS1 DS2

VOS

Gate Threshold Voltage

mpco

-1.6

0.0

+1.6

-1.6

0.0

+1.6

= 10

A, V

= 0.1V

VGS(th)

= 380

A, V

= 0.1V

= 700

A, V

= 0.1V

= +4.8V, V

= +0.9V, V

= +5V

Drain Source On Current

Forward Transconductance

DS(ON)

= +0.1V

mmho

= +4.8V

= +5.0V

Transconductance Mismatch

Output Conductance

∆

1.8

1.6

1.8

1.6

mmho

= +4.8V

= +5.0V

Drain Source On Resistance

Ω

= +5.8V

= +0.1V

DS(ON)

2.0

Ω

= +0.8V, V

= +0.9V, V

= +0.1V

Drain Source On Resistance

lerance

∆

1.8

0.6

1.8

0.6

= +5.8V

= +0.1V

DS(ON)

Drain Source On Resistance

Mismatch

∆

DS(ON)

–

Drain Source Breakdown

Voltage

V =

= -0.2V

= 10

DSX

Drain Source Leakage Current

400

= -0.2V, V

= +5V

DS(OFF)

–

V =

-5V

= 125

Gate Leakage Current

200

= +5

, V

= 125

= 0V

GSS

Input Capacitance

ISS

Transfer Reverse Capacitance

RSS

Turn-on Delay Time

Turn-off Delay Time

= 5

, R

Ω

= 5

, R

Ω

off

Crosstalk

f = 100KHz

Notes:

Consists of junction leakage currents

ALD210808A/ALD210808

Advanced Linear Devices

2 of 12

PERFORMANCE CHARACTERISTICS OF EPAD

PRECISION MATCHED PAIR MOSFET ARRAY FAMILY

ALD2108xx/ALD2129xx/ALD2148xx/ALD2169xx high precision

The ALD2148xx/ALD2169xx (quad/dual) features Depletion Mode

EPAD MOSFE

, which are normally-on devices at zero applied

monolithic quad/dual N-Channel MOSFET arrays are enhanced

versions of th

LD1108xx/ALD1109xx EPAD

MOSFET family, with

increased forward transconductance and output conductance, in-

tended for operation at very low power supply voltages. These de-

vices are also capable of sub-threshold operation with less than

1nA of operating supply currents and at the same time delivering

higher output drive currents (typ. > 50mA). They feature precision

gate voltage. The V

is set at a negative voltage level

GS(th)

< V

) at which the EPAD MOSFET turns off. Without a

(V- < V

supply voltage and/or with V

= V- = 0.00V = Ground, the EPAD

MOSFET device is already turned on and exhibits a defined and

controlled on-resistance R

. An EPAD MOSFET may be

DS(ON)

turned off when a negative voltage is applied to V- pin and V

set

. These Depletion Mode EPAD

Gate Offset Voltages, V

, defined as the difference in V

more negative than its V

GS(th)

between MOSFET pairs M1 and M2 or M3 and M4.

MOSFE

re different from most other depletion mode MOSFE

and JFE

n that they do not exhibit high gate leakage currents

and channel/junction leakage currents, while they stay controlled,

modulated and turned off at precise voltages. The same MOSFET

device equations as those for enhancement mode devices apply.

ALD’s Electrically Programmable Analog Device (EPAD

) technol-

ogy provides the industry’s only family of matched MOSFET tran-

sistors with a range of precision gate-threshold voltage values.

All

members of this family are designed and actively programmed for

exceptional matching of device electrical and temperature charac-

KEY APPLICATION ENVIRONMENTS

teristics. Gate Threshold Voltage V

values range from -3.50V

GS(th)

Depletion Mode to +3.50V Enhancement Mode devices, including

standard products with V

specified at -3.50V, -1.30V, -0.40V,

EPAD MOSFE

re ideal for circuits requiring low V

and low

operating currents with tracked differential thermal responses. They

feature low input bias currents (less than 200pA max.), low input

capacitance and fast switching speed. These and other operating

characteristics offer unique solutions in one or more of the follow-

ing operating environments:

GS(th)

+0.00V, +0.20V, +0.40

0.80V, +1.40V, and +3.30V.

ALD can

also provide any customer-desired V

between -3.50V and

GS(th)

+3.50V on a special order basis.

For all these devices ALD EPAD

technology enables excellent well-controlled gate threshold volt-

age, subthreshold voltage, and low leakage characteristics. With

well matched design and precision programming, units from differ-

ent production lots provide the user with exceptional matching and

uniformity characteristics. Built on the same monolithic IC chip, the

units also have excellent temperature tracking characteristics.

* Low supply voltage: 0.1V to 10V (

0.05V to

5V)

* Ultra low supply voltage: <

10mV to

0.1V

* Nanopower operation: voltage x current = nW or

* Precision V

characteristics

* Matching and tracking of multiple MOSFE

This ALD2108xx/ALD2129xx/ALD2148xx/ALD2169xx EPAD

MOSFE

rray product family (EPAD MOSFET) is available in three

separate categories, each providing a distinctly different set of elec-

trical specifications and characteristics. The first category is the

ALD210800A/ALD210800/ALD212900A/ALD212900 Zero-Thresh-

old™ mode EPAD MOSFE

. The second is the ALD2108xx/

ALD2129xx enhancement mode EPAD MOSFE

. The third cat-

egory includes the ALD2148xx/ALD2169xx depletion mode EPAD

MOSFE

. (The suffix “xx” denotes threshold voltage in 0.1V steps,

for example, xx=08 denotes 0.80V). For each device, there is a

zero-tempco bias current and bias voltage point. When a design

utilizes such a feature, then the gate-threshold voltage is tempera-

ture stable, greatly simplifying certain designs where stability of

certain circuit parameters over a temperature range is desired.

* Matching across multiple packages

ELECTRICAL CHARACTERISTICS

The turn-on and turn-off electrical characteristics of the EPAD

MOSFET products are shown in the I

vs. V

and

DS(ON)

versus V

DS(ON)

vs. V

graphs. Each graph shows I

DS(ON)

GS DS(ON)

characteristics as a function of V

in a different operating region

under different bias conditions, while I

at a given gate input

DS(ON)

voltage is controlled and predictable. A series of four graphs titled

“Forward Transfer Characteristics”, with the 2

and 3

sub-titled

“expanded (subthreshold)” and “further expanded (subthreshold)”,

and the 4

sub-titled “low voltage”, illustrates the wide dynamic

operating range of these devices.

Classic MOSFET equations for an N-channel MOSFET also apply

to EPAD MOSFE

LD210800A/ALD210800 are quad Zero Threshold MOSFE

in which the individual gate-threshold voltage of each MOSFET is

set at zero, V

= 0.00V at I

= 10

A @ V

= +0.1V

GS(th)

= 20

A for the dual ALD212900A/ALD212900).

Zero

DS(ON)

The drain current in the linear region (V

given by:

< V

– V

) is

GS(th)

DS(ON)

Threshold MOSFE

perate in the enhancement region when op-

erated above threshold voltage (V

> 0.00V and I

> 10

A) and

subthreshold region when operated at or below threshold voltage

≤

0.00V and I

< 10

A). These devices, along with other

= u . C

. W/L . [V

– V

/2] . V

DS(ON)

GS(th)

DS(ON)

low V

members of the product family, enable ultra low supply

where:

u =

Mobility

GS(th)

= Capacitance / unit area of Gate electrode

= Gate to Source Voltage

voltage analog or digital operation and nanopower circuit designs,

thereby reducing or eliminating the use of very high valued (expen-

sive) resistors in many cases.

= Gate Threshold (Turn-on)Voltage

= Drain to Source On Voltage

GS(th)

DS(ON)

W =

Channel width

L = Channel length

The ALD2108xx/ALD2129xx (quad/dual) product family features

precision matched enhancement mode EPAD MOSFET devices,

which require a positive gate bias voltage V

to turn on. Precision

In this region of operation the I

value is proportional to the

values at +3.30

1.40V, +0.80V, +0.40V and +0.20V are

DS(ON)

value and the device can be used as a gate-voltage con-

GS(th)

offered. No conductive channel exists between the source and drain

at zero applied gate voltage (V

= 0.00V) for +3.30V, +1.40V and

DS(ON)

trolled resistor.

+0.80V versions. The +0.40V and the +0.20V versions have a sub-

threshold current at about 1nA and 100nA for the ALD2108xx (2nA

and 200nA for the ALD2129xx) respectively at zero applied gate

For higher values of V

where V

DS(ON)

≥

– V

, the

DS(ON)

is now given by (approx.):

GS(th)

saturation current I

DS(ON)

voltage. They are also capable of delivering lower R

and

higher output currents greater than 68mA (see specifications).

DS(ON)

= u . C

. W/L . [V

– V

]

GS(th)

DS(ON)

ALD210808A/ALD210808

Advanced Linear Devices

3 of 12

PERFORMANCE CHARACTERISTICS OF EPAD®

PRECISION MATCHED PAIR MOSFET FAMILY (cont.)

SUB-THRESHOLD REGION OF OPERATION

PERFORMANCE CHARACTERISTICS

The gate threshold (turn-on) voltage V

of the EPAD MOSFET

Performance characteristics of the EPAD MOSFET product family

are shown in the following graphs. In general, the gate threshold

voltage shift for each member of the product family causes other

GS(th)

is a voltage below which the MOSFET conduction channel rapidly

turns off. For analog designs, this gate threshold voltage directly

affects the operating signal voltage range and the operating bias

current levels.

affected electrical characteristics to shift linearly with V

bias

GS(th)

voltage. This linear shift in V

causes the subthreshold I-V curves

to shift linearly as well. Accordingly, the subthreshold operating cur-

rent can be determined by calculating the gate source voltage drop

At a voltage below V

, an EPAD MOSFET exhibits a turn-off

GS(th)

characteristic in an operating region called the subthreshold re-

gion. This is when the EPAD MOSFET conduction channel rapidly

turns off as a function of decreasing applied gate voltage. The con-

duction channel, induced by the gate voltage on the gate electrode,

decreases exponentially and causes the drain current to decrease

exponentially as well. However, the conduction channel does not

shut off abruptly with decreasing gate voltage, but rather decreases

at a fixed rate of about 104mV per decade of drain current de-

crease. For example, for the ALD2108xx device, if the gate thresh-

relative to its gate threshold voltage, V

GS(th)

NORMALLY-ON FIXED R

AT V

= GROUND

DS(ON)

Several members of this MOSFET family produce a fixed resis-

tance when their gate is grounded. For ALD210800, the drain cur-

rent at V

= 0.1V is @ 10

t V

= 0.00

hus, just by ground-

DS GS

ing the gate of the ALD210800, a resistor with R

produced (For ALD212900 device, R

DS(ON)

= ~10K

Ω

= ~5K

Ω

). When an

DS(ON)

old voltage is +0.20V, the drain current is 10

A at V

= +0.20V.

= +0.096V, the drain current would decrease to 1

A. Ex-

ALD214804 gate is grounded, the drain current I

= 424

A @

= ~236

Ω

. Similarly,

ALD214813

At V

= 0.1V, producing R

trapolating from this, the drain current is about 0.1

A at

= 0.00

nA at V

= -0.216

nd so forth. This subthresh-

DS(ON)

and ALD214835 produces 1.71mA and 3.33mA for each MOSFE

respectively, at V

= 0.00V, producing R

values of 59

Ω

DS(ON)

old characteristic extends all the way down to current levels below

1nA and is limited by junction leakage currents.

and 30

Ω

, respectively. For example, when all 4 MOSFE

n an

ALD214835 are connected in parallel, an on-resistance of 30/4 =

~7.5

Ω

is measured between the Drain and Source terminals when

At a drain current of “zero current” as defined and selected by the

= V- = 0.00V, producing a fixed on-resistance without any gate

user, the V

voltage at that zero current can now be estimated.

Note that using the above example, with V

= +0.20

bias voltages applied to the device.

GS(th)

drain current still hovers around 100nA when the gate is at ground

voltage. With a device that has V

= +0.40V (part number

MATCHING CHARACTERISTICS

GS(th)

ALD210804), the drain current is about 2nA when the gate is at

ground potential. Thus, in this case an input signal referenced to

ground can operate with a natural drain current of only 2nA internal

bias current, dissipating nano-watts of power.

One of the key performance benefits of using matched-pair EPAD

MOSFE

s to maintain temperature tracking between the differ-

ent devices in the same package. In general, for EPAD MOSFET

matched pair devices, one device of the matched pair has gate

leakage currents, junction temperature effects, and drain current

temperature coefficient as a function of bias voltage that cancel out

similar effects of the other device, resulting in a temperature stable

circuit. As

mentioned earlier, this temperature stability can be fur-

ther enhanced by biasing the matched-pairs at Zero

mpco (ZTC)

point, even though that may require special circuit configurations

and power consumption design considerations.

LOW POWER AND NANOPOWER

When supply voltages decrease, the power consumption of a given

load resistor decreases as the square of the supply voltage. Thus,

one of the benefits in reducing supply voltage is to reduce power

consumption. While decreasing power supply voltages and power

consumption go hand-in-hand with decreasing usefu

C bandwidth

and increased noise effects in the circuit, a circuit designer can

make the necessary tradeoffs and adjustments in any given circuit

design and bias the circuit accordingly for optimal performance.

POWER SUPPLY SEQUENCES AND ESD CONTROL

EPAD MOSFE

re robust and reliable, as demonstrated by more

than a decade of production history supplied to a large installed

base of customers across the world. However, these devices do

require a few design and handling precautions in order for them to

be used successfully.

With EPAD MOSFE

, a circuit that performs any specific function

can be designed so that power consumption of that circuit is mini-

mized. These circuits operate in low power mode where the power

consumed is measure in mW,

W, and nW (nano-watt) region and

still provide a useful and controlled circuit function operation.

EPAD MOSFE

, being a CMOS Integrated Circuit, in addition to

having Drain, Gate and Source pins normally found in a MOSFET

device, have three other types of pins, namely V+, V- and IC pins.

V+ is connected to the substrate, which must always be connected

to the most positive supply in a circuit. V- is the body of the MOSFE

which must be connected to the most negative supply voltage in

the circuit. IC pins are internally connected pins, which must also

be connected to V-. Drain, Gate and Source pins must have volt-

ages between V- and V+ at all times.

ZERO TEMPERATURE COEFFICIENT (ZTC) OPERATION

For an EPAD MOSFET in this product family, operating points exist

where the various factors that cause the current to increase as a

function of temperature balance out those that cause the current to

decrease, thereby canceling each other, and resulting in a net tem-

perature coefficient of near zero. An example of this temperature

stable operating point is obtained by a ZTC voltage bias condition,

which is 0.38V above V

a temperature stable current level of about 380

or th

LD2108xx

and 760

A for the ALD2129xx devices.

when V

= +0.1V,

resulting in

Proper power-up sequencing requires powering up supply voltages

before applying any signals. During the power down cycle, remove

all signals before removing V- and V+. This way internally back

biased diodes are never allowed to become forward biased, possi-

bly causing damage to the device.

Of course, standard ESD con-

trol procedures should also be observed so that static charge does

not degrade the performance of the devices.

GS(th)

DS(ON)

ALD210808A/ALD210808

Advanced Linear Devices

4 of 12

TYPICAL PERFORMANCE CHARACTERISTICS

LOW VOLTAGE OUTPUT

CHARACTERISTICS

OUTPUT CHARACTERISTICS

100

10V

= V

+5V

GS(th)

V- = 0V

= V

+4V

+3V

GS(th)

= V

– V

= 1V

GS(th)

-10

+2V

+1V

GS(th)

-20

-30

= V

GS(th)

-0.4 -0.3

+0.3

-0.2 -0.1 0.0

+0.1 +0.2

+0.4

DRAIN SOURCE ON VOLTAGE – V

DS(ON)

(V)

DRAIN SOURCE ON VOLTAGE – V

(V)

DS(ON)

FORWARD TRANSFER CHARACTERISTICS

EXPANDED (SUBTHRESHOLD)

FORWARD TRANSFER CHARACTERISTICS

1000000.00

100000.00

10000.00

1000.00

100

= + 25

= + 5V

= + 25

= -0.2V

GS(th)

= -0.4V

GS(th)

= -0.8V

GS(th)

100.00

10.00

1.00

= 0.0V

GS(th)

= -1.3V

GS(th)

= +0.2V

= +0.4V

GS(th)

= -3.5V

GS(th)

= +0.8V

= +1.4V

0.10

0.01

GS(th)

-5

-4

-3

-2

-1

(V)

-4

-2

GATE SOURCE VOLTAGE – V

(V)

GATE SOURCE VOLTAGE – V

FORWARD TRANSFER CHARACTERISTICS

LOW VOLTAGE

FORWARD TRANSFER CHARACTERISTICS

FURTHER EXPANDED (SUBTHRESHOLD)

500

1000000.00

100000.00

10000.00

1000.00

= + 0.1V

= + 25

400

300

200

100

100.00

10.00

1.00

0.10

0.01

+0.1

-0.4

+0.2 +0.3

+0.4 +0.5

-0.3 -0.2

-0.1

+0.2

-0.5 -0.4

GATE SOURCE OVERDRIVE VOLTAGE

– V

(V)

-0.3 -0.2

-0.1

0.0

+0.1

GATE SOURCE OVERDRIVE VOLTAGE

– V

(V)

GS(th)

ALD210808A/ALD210808

Advanced Linear Devices

5 of 12

TYPICAL PERFORMANCE CHARACTERISTICS (cont.)

LOW LEVEL OUTPUT CONDUCTANCE

vs. AMBIENT TEMPERATURE

HIGH LEVEL OUTPUT CONDUCTANCE

vs. GATE THRESHOLD VOLTAGE

500

400

2.5

2.0

= + 25

= V

+ 0.5V

GS(th)

= + 5.0V

300

200

1.5

1.0

= V

GS(th)

= + 5.0V

+ 4.0V

0.5

100

-4.0 -3.0

-2.0

-1.0

0.0

+1.0 +2.0 +3.0

-50

-25

+100 +125

+25

+50

+75

GATE THRESHOLD VOLTAGE – V

GS(th)

(V)

AMBIENT TEMPERATURE – T

(

LOW LEVEL OUTPUT CONDUCTANCE

vs. GATE THRESHOLD VOLTAGE

HIGH LEVEL OUTPUT CONDUCTANCE

vs. AMBIENT TEMPERATURE

500

400

300

200

3.0

2.5

= + 25

= V

+ 4.0V

GS(th)

= + 5.0V

2.0

1.5

1.0

0.5

= V

+ 0.5V

GS(th)

= + 5.0V

100

-4.0 -3.0

-2.0 -1.0

+1.0

+2.0 +3.0

(V)

-50

-25

+25

+50

+75

+100 +125

GATE THRESHOLD VOLTAGE – V

AMBIENT TEMPERATURE – T

(

GS(th)

TRANSCONDUCTANCE vs.

GATE THRESHOLD VOLTAGE

TRANSCONDUCTANCE vs.

AMBIENT TEMPERATURE

= V

+ 4.0V

GS(th)

= + 5.0V

= + 25

= V

+ 4.0V

GS(th)

= + 5.0V

= V

+ 1.0V

GS(th)

= + 5.0V

= V

+ 1.0V

GS(th)

= + 5.0V

-50

-25

+25

+50

+75 +100

+125

-4.0 -3.0

-2.0 -1.0

0.0

+1.0

+2.0

(V)

+3.0

AMBIENT TEMPERATURE – T

(

GATE THRESHOLD VOLTAGE – V

GS(th)

ALD210808A/ALD210808

Advanced Linear Devices

6 of 12

TYPICAL PERFORMANCE CHARACTERISTICS (cont.)

OUTPUT CHARACTERISTICS

ZERO TEMPERATURE COEFFICIENT (ZTC)

500

100

= V

+ 4V

= + 0.1V

GS(th)

400

300

200

-55

+125

+25

Zero Temperature

Coefficient (ZTC)

+125

+70

100

– 55

+0.3

GATE SOURCE OVERDRIVE VOLTAGE

+0.1

+0.2

+0.5

+0.4

DRAIN SOURCE ON VOLTAGE – V

DS(ON)

(V)

– V

(V)

GS(th)

DRAIN SOURCE ON CURRENT vs.

GATE SOURCE OVERDRIVE VOLTAGE

vs. DRAIN SOURCE ON CURRENT

100

V+ = V

= + 5V

-55

= + 10V

+125

+25

+70

-55

+70

+25

+125

GATE SOURCE OVERDRIVE VOLTAGE

– V

(V)

DRAIN SOURCE ON CURRENT – I

(mA)

DS(ON)

GS(th)

GATE THRESHOLD VOLTAGE vs.

AMBIENT TEMPERATURE

GATE SOURCE OVERDRIVE VOLTAGE

vs. DRAIN SOURCE ON CURRENT

2.0

1.0

= + 0.1V

= 10

= + 0.2V

+125

= 0.8V

GS(th)

+70

+25

= 0.0V

GS(th)

-1.0

-2.0

– 55

= -1.4V

GS(th)

+25

+50

+75

+100

+125

-25

-50

AMBIENT TEMPERATURE – T

(

DRAIN SOURCE ON CURRENT – I

(mA)

DS(ON)

ALD210808A/ALD210808

Advanced Linear Devices

7 of 12

TYPICAL PERFORMANCE CHARACTERISTICS (cont.)

DRAIN OFF LEAKAGE CURRENT

DS(OFF)

vs. AMBIENT TEMPERATURE

OFFSET VOLTAGE vs.

AMBIENT TEMPERATURE

600

+10

REPRESENTATIVE UNITS

= V

M1 – V

M3 – V

GS(th)

500

400

-2

-4

300

200

100

DS(OFF)

-6

-8

-10

-50

-25

+25

+50

+75 +100

+125

-50

+25

+50

+75

+100 +125

-25

AMBIENT TEMPERATURE – T

(

AMBIENT TEMPERATURE – T

(

ALD210808A/ALD210808

Advanced Linear Devices

8 of 12

TYPICAL APPLICATIONS

CURRENT SOURCE MIRROR

CURRENT SOURCE WITH GATE CONTROL

= +5V

SET

Digital Logic Control

of Current Source

SET

SOURCE

OFF

M1:

1/2 ALD1101,

1/2 ALD1116,

1/2 ALD1109xx,

1/2 ALD2129xx,

1/4 ALD1103,

1/4 ALD1105,

1/4 ALD1106,

1/4 ALD1108xx, or

1/4 ALD2108xx

M1, M2:

ALD1101,

ALD1116,

ALD1109xx,

ALD2129xx,

1/2 ALD1103,

1/2 ALD1105,

1/2 ALD1106,

1/2 ALD1108xx, or

1/2 ALD2108xx

M3, M4:

ALD1102,

ALD1117,

1/2 ALD1103,

1/2 ALD1105,

1/2 ALD1107, or

1/2 ALD3107xx

M3, M4:

ALD1102,

ALD1117,

1/2 ALD1103,

1/2 ALD1105,

– Vt

= I

SET

SOURCE

SET

= V

where Vt = V

– V

GS(th)

1/2 ALD1107, or

1/2 ALD3107xx

M ,

M :

N-Channel MOSFET

: N-Channel MOSFET

: P-Channel MOSFET

M ,

M :

P-Channel MOSFET

CURRENT SOURCE MULTIPLICATION

DIFFERENTIAL AMPLIFIER

= +5V

Package N

Package 1

SET

SOURCE

SET

= I

SET

x N

PMOS PAIR

NMOS PAIR

SOURCE

OUT

SET

–

MSET, M1..MN:

N x ALD1101, N x ALD1116,

N x ALD1109xx, N x ALD2129xx,

N x ALD1103, N x ALD1106,

N x ALD1108xx, or

M1, M2:

ALD1101,

ALD1116,

ALD1109xx,

ALD2129xx,

1/2 ALD1103,

1/2 ALD1105,

1/2 ALD1106,

1/2 ALD1108xx, or

1/2 ALD2108xx

Current

Source

M3, M4:

ALD1102,

ALD1117,

1/2 ALD1103,

1/2 ALD1105,

1/2 ALD1107, or

1/2 ALD3107xx

N x ALD2108xx

All M’s in the set are

from the same part number.

M ,

M :

N-Channel MOSFET

M ,

M :

P-Channel MOSFET

M ..M

: N-Channel MOSFET

SET, 1

ALD210808A/ALD210808

Advanced Linear Devices

9 of 12

TYPICAL APPLICATIONS (cont.)

BASIC CURRENT SOURCES

N-CHANNEL CURRENT SOURCE

P-CHANNEL CURRENT SOURCE

= +5V

SET

SOURCE

SET

SOURCE

M1, M2:

SOURCE

ALD1101,

ALD1116,

M3, M4:

ALD1109xx,

ALD2129xx,

1/2 ALD1103,

1/2 ALD1105,

1/2 ALD1106,

1/2 ALD1108xx, or

1/2 ALD2108xx

– Vt

SET

ALD1102,

ALD1117,

1/2 ALD1103,

1/2 ALD1105,

1/2 ALD1107, or

1/2 ALD3107xx

= I

SET

SOURCE

where Vt = V

– V

GS(th)

= V

M ,

M :

N-Channel MOSFET

M ,

M :

P-Channel MOSFET

CASCODE CURRENT SOURCES

= +5V

SET

SOURCE

SET

SOURCE

SET

SOURCE

M1, M2:

ALD1102,

ALD1117,

1/2 ALD1103,

1/2 ALD1105,

1/2 ALD1107, or

1/2 ALD3107xx

M3, M4:

ALD1102,

ALD1117,

1/2 ALD1103,

1/2 ALD1105,

1/2 ALD1107, or

1/2 ALD3107xx

M1, M2:

ALD1101,

ALD1116,

ALD2129xx,

1/2 ALD1103,

1/2 ALD1105,

1/2 ALD1106, or

1/2 ALD2108xx

M3, M4:

ALD1101,

ALD1116,

1/2 ALD1103,

1/2 ALD1105,

1/2 ALD1106, or

1/2 ALD2108xx

– 2Vt

SET

= I

SET

SOURCE

where Vt = V

– V

= V

GS(th)

M ,

M :

P-Channel MOSFET

M ,

M :

N-Channel MOSFET

where M1 and M2 is a matched pair

and M3 and M4 is a second matched pair.

ALD210808A/ALD210808

Advanced Linear Devices

10 of 12

SOIC-16 PACKAGE DRAWING

16 Pin Plastic SOIC Package

Millimeters

Inches

Dim

Min

Max

Min

Max

1.75

0.25

0.45

0.25

10.00

4.05

0.053

0.069

1.35

S (45

)

0.004

0.014

0.007

0.385

0.140

0.010

0.018

0.010

0.394

0.160

0.10

0.35

0.18

9.80

3.50

D-16

1.27 BSC

0.050 BSC

0.224

6.30

0.937

0.248

0.037

5.70

0.60

0.024

0.50

0.010

0.020

0.25

S (45

)

ALD210808A/ALD210808

Advanced Linear Devices

11 of 12

PDIP-16 PACKAGE DRAWING

16 Pin Plastic DIP Package

Millimeters

Inches

Dim

Min

Max

Min

Max

5.08

0.105

0.200

3.81

0.38

1.27

0.89

0.38

0.20

18.93

5.59

7.62

2.29

7.37

2.79

0.38

1.27

2.03

1.65

0.51

0.30

21.33

7.11

8.26

2.79

7.87

3.81

1.52

0.015

0.050

0.035

0.015

0.008

0.745

0.220

0.300

0.090

0.290

0.110

0.015

0.050

0.080

0.065

0.020

0.012

0.840

0.280

0.325

0.110

0.310

0.150

0.060

D-16

S-16

ALD210808A/ALD210808

Advanced Linear Devices

12 of 12

Advanced-Linear-Devices-ALD210808PCL

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