Advanced-Linear-Devices-ALD910022SALI
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TM
A
DVANCED
L
INEAR
D
EVICES,
I
NC.
®
e
EPAD
A
ALD810022/ALD910022
QUAD/DUAL SUPERCAPACITOR AUTO BALANCING (SAB
™
) MOSFET ARR
A
Y
GENERAL DESCRIPTION
FEATURES & BENEFITS
• Simple and economical to use
• Precision factory trimmed
The ALD810022/ALD910022 are members of the ALD8100xx
(quad) and ALD9100xx (dual) family of Supercapacitor Auto Bal-
ancing MOSFE
T
s
, or SAB™ MOSFE
T
s
.
SAB MOSFE
T
s
a
re built
with production proven EPAD
®
technology and are designed to ad-
dress voltage and leakage-current balancing of supercapacitors
connected in series. Supercapacitors, also known as ultracapacitors
or supercaps, connected in series can be leakage-current balanced
by using a combination of one or more devices connected across
each supercapacitor stack to prevent over-voltages.
• Automatically regulates and balances leakage currents
• Effective for supercapacitor charge-balancing
• Balances up to 4 supercaps with a single IC package
• Balances 2-cell, 3-cell, 4-cell series-connected supercaps
• Scalable to larger supercap stacks and arrays
• Near zero additional leakage currents
• Zero leakage at 0.3V below rated voltages
• Balances series and/or parallel-connected supercaps
• Leakage currents are exponential function of cell voltages
• Active current ranges from <0.3nA to >1000
µ
A
• Always active, always fast response time
The ALD810022 offers a set of unique, precise operating voltage
and current characteristics for each of four SAB MOSFET devices,
as shown in its Operating Electrical Characteristics table.
It can be
used to balance up to four supercapacitors connected in series.
Th
e
A
LD910022 has its own set of unique precision Operating Elec-
trical Characteristics for each of its two SAB MOSFET devices,
suitable for up to two series-connected supercapacitors.
• Minimizes leakage currents and power dissipation
APPLICATIONS
• Series-connected supercapacitor cell leakage balancing
• Energy harvesting
• Long term backup battery with supercapacitor outputs
• Zero-power voltage divider at selected voltages
• Matched current mirrors and current sources
• Zero-power mode maximum voltage limiter
• Scaled supercapacitor stacks and arrays
Each SAB MOSFET features a precision gate threshold voltage in
the V
mode, which is 2.20V when the gate-drain source terminals
t
(V
GS
= V
) are connected together at a drain-source current of
DS
I
= 1
µ
A. In this mode, input voltage
V =
V
IN
= V
Dif-
DS(ON)
GS
DS.
character-
ferent V
produces an Output Current I
= I
DS(ON)
IN OUT
istic and results in an effective variable resistor that varies in value
PIN CONFIGURATIONS
ALD810022
exponentially with V
. This V
, when connected across each
IN IN
supercapacitor in a series, balances each supercapacitor to within
its voltage and current limits.
When V
= 2.20V is applied to an ALD810022/ALD910022, its
IN
16
15
14
13
12
11
1
2
3
IC*
IC*
I
is 1
µ
A. For
a 100mV increase in V
, to 2.30
V
, I
i
ncreases
OUT
IN OUT
M1
M2
by about tenfold. For an additional increase in V
to 2.42V for the
IN
D
N1
D
N2
ALD910022 (2.44V for the ALD810022), I
OUT
increases one hun-
dredfold, to 100
µ
A. Conversely, for a 100mV decrease in V
to
IN
2.10
V
, I
decreases to one tenth of its previous value, to 0.1
µ
A.
OUT
Another 100mV decrease in input voltage would reduce I
G
S
G
S
N1
N2
to
OUT
0.01
µ
A. Hence, when an ALD810022/ALD910022 SAB MOSFET
is connected across a supercapacitor that charges to less than
2.00
V
, it would dissipate essentially no power.
V-
V-
N1
N2
V+
4
5
V-
(Continued on next page)
M3
V-
M4
D
N4
G
N4
S
N4
D
N3
N3
N3
6
7
8
PRODUCT FAMILY SPECIFICATIONS
G
S
10
9
For more information on supercapacitor balancing, how SAB
MOSFE
T
s
a
chieve automatic supercapacitor balancing, the device
characteristics of the SAB MOSFET family, product family product
selection guide, applications, configurations, and package infor-
V-
SCL PACKAGE
“ALD8100xx/ALD9100xx Family of Supercapacitor Auto Balanc-
ing (SAB™) MOSFET ARRAYs”
ALD910022
V-
I
C
*
V+
G
8
7
6
5
1
2
3
4
G
D
N1
N2
ORDERING INFORMATION
(“L” suffix
denotes lead-free (RoHS))
Operating
T
e
mperature Range
D
N2
N1
N1
Package
0
°
C to +70
°
C
-40
°
C to +85
°
C
S
S
N2,
V-
(Commercial)
(Industrial)
16-Pin SOIC
8-Pin SOIC
ALD810022SCL
ALD910022SAL
ALD810022SCLI
ALD910022SALI
SAL PACKAGE
*IC pins are internally connected, connect to V-
©2014 Advanced Linear Devices, Inc., Vers. 2.0
1 of 6
GENERAL DESCRIPTION (CON
T
.
)
APPLYING THE ALD810022/ALD910022:
The voltage dependent characteristic of the ALD810022/
ALD910022 on-resistance is effective in controlling excessive volt-
age rise across a supercapacitor when connected across it. In se-
ries-connected supercapacitor stacks, when one supercapacitor
voltage rises, the voltage of the other supercapacitors drops, with
the ones that have the highest leakage currents having the lowest
supercapacitor voltages.
The SAB MOSFE
T
s
c
onnected across
these supercapacitors would exhibit complementary opposing cur-
rent levels, resulting in little additional leakage currents other than
those caused by the supercapacitors themselves.
1) Select
a maximum supercapacitor leakage current limit for any
supercapacitor used in the stack.
This is the same as output cur-
rent, I
, of th
e
A
LD810022/ALD910022.
T
e
st that each
= I
OUT DS(ON)
supercapacitor leakage current meets this maximum current limit
before use in the stack.
2) Determine
whether the input voltage V
(V
IN GS
= V
) at that
DS
I
is acceptable for the intended application. This voltage is the
OUT
same voltage as the maximum desired operating voltage of the
supercapacitor. For
example, with th
e
A
LD810022, I
= 1000
µ
A
OUT
corresponds to V
= 2.72V.
IN
For technical assistance, please contact ALD technical support at
3) Determine
that the operating voltage margin, due to various
tolerances and/or temperature effects, is adequate for the intended
operating environment of the supercapacitor.
SCHEMATIC DIAGRAM OF A TYPICAL
CONNECTION FOR A FOUR-SUPERCAP STACK
V+
≤
+15.0V
ALD8100XX
I
≤
80mA
DS(ON)
SCHEMATIC DIAGRAM OF A TYPICAL
CONNECTION FOR A TWO-SUPERCAP STACK
2, 12
M1
+
3
C1
4
V+
≤
+15.0V
ALD9100XX
V
1
15
I
≤
80mA
DS(ON)
+
+
+
14
M2
13
C2
C3
C4
3, 8
M1
+
+
2
7
V
2
C1
C2
11
M3
4
10
7
V
1
9
6
V
3
6
M2
M4
1, 5
1, 5, 8, 16
1-16 DENOTES PACKAGE PIN NUMBERS
C1-C4 DENOTES SUPERCAPACITORS
1-8 DENOTES PACKAGE PIN NUMBERS
C1-C2 DENOTES SUPERCAPACITORS
ALD810022/ALD910022
Advanced Linear Devices, Inc.
2 of 6
ABSOLUTE MAXIMUM RATINGS
V+ to V- voltage
Drain-Source voltage, V
Gate-Source voltage, V
Operating Current
Power dissipation
15.0V
10.6V
10.6V
80mA
500mW
DS
GS
Operating temperature range SCL
Operating temperature range SCLI
Storage temperature range
0
°
C to +70
°
C
-40
°
C to +85
°
C
-65
°
C to +150
°
C
+260
°
C
Lead temperature, 10 seconds
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.
OPERATING ELECTRICAL CHARACTERISTICS
+
V
–
= +5V,
V =
GND, T
= 25
°
C, V
= V
IN
=V
I
= I
unless otherwise specified
A
GS
DS, OUT
DS(ON)
ALD810022
Typ
Parameter
Symbol
Min
Max
Unit
Test Conditions
= V
I
DS; DS(ON)
Gate Threshold Voltage
Offset Voltage
V
V
2.18
2.20
5
2.22
20
V
V
GS
= 1
µ
A
= 1
µ
A
t
mV
V
– V
or V
– V
t2 t3
OS
t1
t4
Offset Voltage Tempco
TC
TC
5
µ
V/C
mV/C
V
V
V
– V
or V
– V
VOS
Vt
t1
t2
t3
t4
Gate Threshold Voltage Tempco
-2.2
= V
I
DS; DS(ON)
GS
Output Current
Drain Source On Resistance
I
R
0.0001
18000
µ
A
M
Ω
= 1.80V
= 1.90V
= 2.00V
= 2.10V
= 2.20V
= 2.30V
= 2.44V
= 2.54V
= 2.72V
= 3.02V
= 3.62V
OUT
DS(ON)
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
Output Current
Drain Source On Resistance
I
R
0.001
1900
µ
A
M
Ω
V
V
V
V
V
V
V
V
V
V
OUT
DS(ON)
Output Current
Drain Source On Resistance
I
R
0.01
200
µ
A
M
Ω
OUT
DS(ON)
Output Current
Drain Source On Resistance
I
R
0.1
21
µ
A
M
Ω
OUT
DS(ON)
Output Current
Drain Source On Resistance
I
R
1
µ
A
M
Ω
OUT
DS(ON)
2.2
Output Current
Drain Source On Resistance
I
R
10
µ
A
M
Ω
OUT
DS(ON)
0.23
Output Current
Drain Source On Resistance
I
R
100
µ
A
M
Ω
OUT
DS(ON)
0.024
Output Current
Drain Source On Resistance
I
R
300
µ
A
M
Ω
OUT
DS(ON)
0.008
Output Current
Drain Source On Resistance
I
R
1000
µ
A
M
Ω
OUT
DS(ON)
0.003
Output Current
Drain Source On Resistance
I
R
3000
µ
A
M
Ω
OUT
DS(ON)
0.001
Output Current
Drain Source On Resistance
I
R
10000
µ
A
M
Ω
OUT
DS(ON)
0.0004
Drain Source Breakdown Voltage
Drain Source Leakage Current
1
BV
I
10.6
V
DSX
10
5
400
4
pA
nA
pA
nA
pF
V
V
= V
= V
= +125
°
C
= V
= V
= V
– 1.0
t
DS(OFF)
IN
IN
GS
GS
DS
DS
= V
– 1.0,
t
T
A
Gate Leakage Current
1
I
200
1
V
V
= 5.0V, V
= 0V
= 0V,
GSS
GS
DS
DS
= 5.0V, V
GS
= +125
°
C
T
A
Input Capacitance
Turn-on Delay Time
Turn-off Delay Time
C
15
V
= 0V, V
= 5.0V
DS
ISS
GS
t
t
on
off
10
10
60
ns
ns
dB
Crosstalk
f = 100KHz
ALD810022/ALD910022
Advanced Linear Devices, Inc.
3 of 6
ABSOLUTE MAXIMUM RATINGS
V+ to V- voltage
Drain-Source voltage, V
Gate-Source voltage, V
Operating Current
Power dissipation
15.0V
10.6V
10.6V
80mA
500mW
DS
GS
Operating temperature range SAL
Operating temperature range SALI
Storage temperature range
0
°
C to +70
°
C
-40
°
C to +85
°
C
-65
°
C to +150
°
C
+260
°
C
Lead temperature, 10 seconds
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.
OPERATING ELECTRICAL CHARACTERISTICS
+
V
–
= +5V,
V =
GND, T
= 25
°
C, V
= V
IN
=V
I
= I
unless otherwise specified
A
GS
DS, OUT
DS(ON)
ALD910022
Typ
Parameter
Symbol
Min
Max
Unit
Test Conditions
Gate Threshold Voltage
Offset Voltage
V
V
2.18
2.20
5
2.22
20
V
V
V
V
V
V
= V
I
= 1
µ
A
= 1
µ
A
t
GS
t1
DS; DS(ON)
mV
– V
t2
OS
Offset Voltage Tempco
TC
TC
5
µ
V/C
mV/C
– V
t2
VOS
Vt
t1
Gate Threshold Voltage Tempco
-2.2
= V
I
GS
DS; DS(ON)
Output Current
Drain Source On Resistance
I
R
0.0001
18000
µ
A
M
Ω
= 1.80V
= 1.90V
= 2.00V
= 2.10V
= 2.20V
= 2.30V
= 2.42V
= 2.50V
= 2.64V
= 2.70V
= 3.20V
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
DS(ON)
Output Current
Drain Source On Resistance
I
R
0.001
1900
µ
A
M
Ω
V
V
V
V
V
V
V
V
V
V
OUT
DS(ON)
Output Current
Drain Source On Resistance
I
R
0.01
200
µ
A
M
Ω
OUT
DS(ON)
Output Current
Drain Source On Resistance
I
R
0.1
21
µ
A
M
Ω
OUT
DS(ON)
Output Current
Drain Source On Resistance
I
R
1
µ
A
M
Ω
OUT
DS(ON)
2.2
Output Current
Drain Source On Resistance
I
R
10
µ
A
M
Ω
OUT
DS(ON)
0.23
Output Current
Drain Source On Resistance
I
R
100
µ
A
M
Ω
OUT
DS(ON)
0.024
Output Current
Drain Source On Resistance
I
R
300
µ
A
M
Ω
OUT
DS(ON)
0.008
Output Current
Drain Source On Resistance
I
R
1000
µ
A
M
Ω
OUT
DS(ON)
0.003
Output Current
Drain Source On Resistance
I
R
3000
µ
A
M
Ω
OUT
DS(ON)
0.001
Output Current
Drain Source On Resistance
I
R
10000
µ
A
M
Ω
OUT
DS(ON)
0.0003
Drain Source Breakdown Voltage
Drain Source Leakage Current
1
BV
I
10.6
V
DSX
10
5
400
4
pA
nA
pA
nA
pF
V
V
= V
= V
= +125
°
C
= V
= V
= V
– 1.0
t
DS(OFF)
IN
IN
GS
GS
DS
DS
= V
– 1.0,
t
T
A
Gate Leakage Current
1
I
200
1
V
V
= 5.0V, V
= 0V
= 0V,
GSS
GS
DS
DS
= 5.0V, V
GS
= +125
°
C
T
A
Input Capacitance
Turn-on Delay Time
Turn-off Delay Time
C
30
V
= 0V, V
= 5.0V
DS
ISS
GS
t
t
on
off
10
10
60
ns
ns
dB
Crosstalk
f = 100KHz
ALD810022/ALD910022
Advanced Linear Devices, Inc.
4 of 6
SOIC-16 PACKAGE DRAWING
16 Pin Plastic SOIC Package
E
Millimeters
Inches
Dim
A
Min
Max
Min
Max
1.75
0.25
0.45
0.25
10.00
4.05
0.053
0.069
1.35
S (45
°
)
0.004
0.014
0.007
0.385
0.140
0.010
0.018
0.010
0.394
0.160
0.10
0.35
0.18
9.80
3.50
A
1
b
C
D-16
E
D
1.27 BSC
0.050 BSC
0.224
e
6.30
0.937
8
°
0.248
0.037
8
°
5.70
0.60
0
°
H
0.024
0
°
L
A
ø
0.50
0.010
0.020
0.25
S
A
e
1
b
S (45
°
)
C
H
L
ø
ALD810022/ALD910022
Advanced Linear Devices, Inc.
5 of 6
SOIC-8 PACKAGE DRAWING
8 Pin Plastic SOIC Package
E
Millimeters
Inches
Dim
A
Min
Max
Min
Max
1.75
0.25
0.45
0.25
5.00
4.05
0.053
0.069
1.35
0.004
0.014
0.007
0.185
0.140
0.010
0.018
0.010
0.196
0.160
0.10
0.35
0.18
4.69
3.50
S (45
°
)
A
1
b
C
D-8
E
D
1.27 BSC
0.050 BSC
0.248
e
6.30
0.937
8
°
0.224
0.024
0
°
5.70
0.60
0
°
H
0.037
8
°
A
L
ø
S
A
1
e
0.50
0.010
0.020
0.25
b
S (45
°
)
C
H
L
ø
ALD810022/ALD910022
Advanced Linear Devices, Inc.
6 of 6
