Agertech-ATM3415KPSA
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ATM3415KPSA
P-Channel Enhancement Mode Power Transistor
Drain-Source Voltage:
-20V
Continuous Drain Current:
-4A
Features
Low gate charge
High density cell design for ultra low R
DS(on)
ESD protected(HBM) up t
o
2
KV
Dated: 07/2021
Rev:1.1
AGERTECH M
I
CROELECTRON
I
CS
Subsidiary of Sino-
T
a
lent International Holdings Ltd.
1
/4
ATM3415KPSA
Electrical Characteristics
(Ta=25
℃
unless otherwise specified
)
Parameter
Symbol
Test Condition
Min
Type
Max
Units
Static Characteristics
–
–
–
–
Drain-source breakdown voltage
Zero gate voltage drain current
Gate-body leakage current
-V
(BR)DSS
-I
DSS
V
GS
= 0V, I
D
=-250µA
V
DS
=-20V,V
GS
= 0V
V
GS
=±8V, V
DS
= 0V
V
µA
µA
20
–
1
±10
–
I
GSS
Diode Forward Current
Note1
–
–
-I
S
4
A
Notes:1. Surface Mounted on FR4 Board,t10sec.
2.Pulse Test : Pulse width
≦
300µs, duty cycle
≦
2%.
Dated: 07/2021
Rev:1.1
AGERTECH M
I
CROELECTRON
I
CS
Subsidiary of Sino-
T
a
lent International Holdings Ltd.
2
/4
ATM3415KPSA
Typical Characteristic Curves
Dated: 07/2021
Rev:1.1
AGERTECH M
I
CROELECTRON
I
CS
Subsidiary of Sino-
T
a
lent International Holdings Ltd.
3
/4
ATM3415KPSA
S
u
b
c
0.300
0.080
2.800
0.400
0.115
2.900
0.500
0.150
3.000
D
E
1.200
2.250
1.800
1.300
2.400
1.400
2.550
2.000
H
E
1.900
e
L1
L
0.550REF
0.300
0.500
o
8
o
0
θ
Dated: 07/2021
Rev:1.1
AGERTECH M
I
CROELECTRON
I
CS
Subsidiary of Sino-
T
a
lent International Holdings Ltd.
4
/4
