AGM-Semi-AGM15T05LL

Part #AGM-Semi-AGM15T05LL
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AGM-Semi-AGM15T05LL
AGM15T05LL  
●
General Description  
Product Summary  
The AGM15T05LL combines advanced trench  
MOSFET technology with a low resistance package  
to provide  
extremely low R

DS(ON)  

.
This device is ideal  
switch and battery  
BVDSS  
RDSON  
ID  
for load  
protection applications.  
150V  
5.0mΩ  
180A  
●
Features  
■
Advance high cell density Trench technology  
TOLL-8L Pin Configuration  
■
■
Low R

DS(ON)

to minimize conductive loss  
Low Gate Charge for fast switching  
■
■
■
Low Thermal resistance  
100
%
Avalanche tested  
100% DVDS tested  
D
G
●
Application  
■
MB/VGA Vcore  
nd  
S
P
i
n  
1
D e s c
r
ip t io n  
G a
t
e (G )  
■
SMPS 2
 
Synchronous Rectifier  
■
POL application  
2
,
3 ,4 ,5 ,6 ,7 ,8  
S o u r c e
(
S )  
D r a
i
n (D )  
9
■
BLDC Motor driver  
Package Marking and Ordering Information  
Quantity  
Device Marking  
Device  
Device Package  
Reel Size  
Tape width  
25mm  
AGM15T05LL  
AGM15T05LL  
TOLL-8L  
330mm  
2000  
Tabl
e
1
.  
Absolute Maximum Ratings (TC=25  
)
℃
Symbol  
Parameter  
Drain-Source Voltage (VGS=0V
)
 
Value  
Unit  
VDS  
VGS  
V
V
150  
±20  
180  
108  
720  
250  
100  
150  
Gate-Source Voltage (VDS=0V)  
(Note 1)  
A
A
A
Drain Current-Continuous(Tc=25
℃
)  
I
D
c
Drain Current-Continuous(T
 
=100
℃
)  
(Note 2)  
I
Drain Current-Continuous@ Current-Pulsed  
DM (pluse)  
w
w
Maximum Power Dissipation(Tc=25
℃
)  
Maximum Power Dissipation(Tc=100
℃
)  
P
D
(Note 3)  
EAS  
T ,T  
mJ  
Avalanche energy  
J
STG  
Operating Junction and Storage Temperature Range  
Thermal Characteristic  
Symbol  
℃
-55 To 150  
Tabl
e
2
.  
Typ  
Max  
Unit  
Parameter  
1
—  
—  
60  
R
θJA  
℃
/W  
℃
/W  
Thermal Resistance Junction-ambient (Steady State)  
1
R
0.5  
θJC  
Thermal Resistance Junction-Case  
1
VER2.6  

AGM15T05LL  
Table 3.  
Symbol  
On/Off States  
Electrical Characteristics (T
J
=25 unless
 
otherwise noted)  
℃
Parameter  
Conditions  
Min  
Typ Max  
Unit  
BV  
V
=0V I
 
=250μA  
—  
—  
—  
—  
Drain-Source Breakdown Voltage  
Zero Gate Voltage Drain Current  
Gate-Body Leakage Current  
GS  
D
150  
—  
V
DSS  
DSS  
V
V
=150V,V =0V  
GS  
1
μA  
nA  
DS  
I
I
=±20V,V =0V  
DS  
—  
GS  
±
GSS  
100  
V
V
=V ,I
 
=250μA  
Gate Threshold Voltage  
DS GS
 
D  
GS(th)  
2.0  
—  
2.8  
18  
5.0  
4.0  
—  
V
S
g
FS  
V
=5V,I =20A  
D
Forward Transconductance  
Drain-Source On-State Resistance  
DS  
V
GS  
=10V, I
 
=20A  
R
D
—  
DS(on)  
mΩ  
6.0  
Dynamic Characteristics  
—  
—  
—  
—  
—  
—  
5025  
410  
10  
C
C
C
Input Capacitance  
iss  
pF  
pF  
pF  
VDS=75V,VGS=0V,  
F=1MHZ  
Output Capacitance  
oss  
rss  
Reverse Transfer Capacitance  
=0V,  
=0V,f=1.0MHz  
VGS  
VDS  
Rg  
Gate resistance  
—  
—  
—  
Ω
Switching Times  
Turn-on Delay Time  
—  
—  
—  
—  
—  
—  
—  
—  
—  
—  
—  
—  
—  
—  
t
nS  
nS  
nS  
nS  
nC  
nC  
nC  
d(on)  
25  
31  
60  
20  
19  
t
t
Turn-on Rise Time  
Turn-Off Delay Time  
Turn-Off Fall Time  
Total Gate Charge  
Gate-Source Charge  
Gate-Drain Charge  
r
VGS=10V,VDS=75V,  
ID=80A,RGEN=6Ω  
d(off)  
t
f
Q
g
VGS=10V, VDS=75V,  
ID=80A  
Q
gs  
gd  
11  
12  
Q
Source-Drain Diode Characteristics  
Source-Drain Current(Body Diode)  
—  
—  
—  
I
180  
1.2  
A
SD  
Forward on Voltage  
VGS=0V,IS=10A  
V
SD  
—  
45  
12  
V
ns  
t
rr  
Reverse Recovery Time  
Reverse Recovery Charge  
—  
—  
—  
—  
IF=10A , dI/dt=100A/µs ,  
nc  
TJ=25
℃
 
Q
rr  
Notes 1.The maximum current rating is package limited.  
Notes 2.Repetitive Rating: Pulse width limited by maximum junction temperature  
Notes 3.EAS condition: T
 
=25
℃  
J
2
VER2.6  

AGM15T05LL  
Diagram 1: Power dissipation  
Diagram 2: Max. transient thermal impedance  
10

0  

320  
280  
240  
200  
160  
120  
80  
0.5  
0.3  
-1  
10  
0.1  
0.05  
-2  
10  
0.02  
0.01  
single pulse  
40  
-3  
0
10  
-6  
-5  
10  
-4  
10  
-3  
10  
-2  
10  
-1  
10  
10

0  

10

1  

0
20 40 60 80
 
100 120 140 160 180  
10  
O
T
c
[
C
]  
t
p  
[s]  
P

tot

=f(
T

C

)  
Z

thJC

=f(
t

p

); parameter: D=
t

p

/T  
Diagram 3: Safe operating area  
Diagram 4: Typ. output characteristics  
10

3  

120  
10V  
8V  
5V  
6V  
100  
80  
R
D
S(ON)
limited  
10

2  

10

1  

10

0  

10µs  
100µs  
60  
1ms  
40  
10ms  
DC  
4.5V  
20  
-1  
0
10  
-1  
10

0  

10

1  

10

2  

10

3  

0.0  
0.5  
1.0  
1.5  
DS
[V]  
2.0  
2.5  
3.0  
10  
V

DS

[V]  
V
I

D

=f(
V

DS

);
T
j=25°C; D=0; parameter:
t

p  

I

D

=f(
V

DS

);
T
j=25°C; parameter:
V

GS  

3
VER2.6  

AGM15T05LL  
Diagram 6: Gate threshold voltage vs.  
Junction temperature  
Diagram 5: Typ. transfer characteristics  
18  
16  
14  
12  
1.3  
1.2  
1.1  
1.0  
0.9  
125

o

C  
25

o

C  
10  
8
typ  
0.8  
6
0.7  
0.6  
0.5  
0.4  
4
2
0
1
2
3
4
5
6
-60 -40 -20
 
0 20
 
40 60 80
 
100 120 140 160 180  
O
V
G
S
[V]  
T
[
C
]  
j
V

th

=f(
T

j

); I

D

=250
μ
A  
I

D

=f(
V

GS

);
V

DS

=5V; parameter:
T

j  

Diagram 7: On-state resistance vs. Drain  
current  
Diagram 8: On-state resistance vs. Junction  
temperature  
12  
14  
13  
12  
11  
10  
9
10  
8
6V  
10V  
6
8
typ  
7
6
5
4
3
4
2
0
2
-60 -40 -20
 
0 20
 
40 60 80
 
100 120 140 160 180  
0
3
6
9
12  
O
T
j  
[
C
]  
I
D  
[A]  
R

DS

(on)=f(
I

D

);
T
j=25°C; parameter:
V

GS  

R

DS

(on)=f(
T

j

);
I

D

=20A;
V

GS

=10V  
4
VER2.6  

AGM15T05LL  
Diagram 9: Forward characteristics of reverse
 
Diagram 10: On-state resistance vs. Vgs  
diode  
characteristics  
10

2  

16  
14  
12  
10  
8
125

o

C  
10

1  

10

0  

125

o

C  
25

o

C  
25

o

C  
6
-1  
4
10  
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
2
4
6
8
10 12 14 16 18 20  
gs
[V]  
V

S
D

[V]  
V
I

F

=f(
V

SD

); parameter:
T

j  

R

DS

(on)=f(V

gs

);
I

D

=20A; parameter:
T

j  

Diagram 11: Breakdown Voltage Variation vs.  
Temperature  
Diagram 12: Maximum Drain Current  
180  
160  
140  
120  
100  
80  
200  
190  
180  
170  
160  
150  
60  
40  
20  
140  
0
-60 -40 -20
 
0 20
 
40 60 80
 
100 120 140 160 180  
0
25  
50  
75  
T
[
C
]  
100  
125  
150  
175  
O
O
T
j
[
C
]  
C
V

BR(DSS)

=
f(
T

j

)
; I

D

=
250μA  
I

D

= f(
T

c

); V

GS

=10V  
5
VER2.6  

AGM15T05LL  
Diagram 13: Typ. capacitances  
10

4  

Diagram 14: Typ. gate charge  
10  
9
8
7
6
5
4
3
2
1
0
Ciss  
75V  
10

3  

Coss  
10

2  

10

1  

Crss  
10

0  

0
20  
40  
60  
80  
100  
0
20  
40  
60  
80  
100  
V

D
S

[V]  
Q
gate
[nC]  
C
=f(
V

DS

);
V

GS

=0V; f=1MHz  
V

GS

=f(
Q

gate

);
I

D

=20A pulsed;
V

DS

=75V  
6
VER2.6  

AGM15T05LL  
Table 7. Diode characteristics  
Test circuit for diode characteristics  
Diode recovery waveform  
Switching times waveform  
Unclamped inductive waveform  
Table 8. Switching times  
Switching times test circuit for inductive load  
Table 9. Unclamped inductive load  
Unclamped inductive load test circuit  
7
VER2.6  

AGM15T05LL  
TOLL-8L Package  
D
D2(2
x
)  
MILLIMETER  
NOM.  
SYMBOL  
MIN.  
2.200  
1.700  
0.600  
9.700  
0.650  
1.100  
0.400  
10.300  
11.000  
3.200  
4.470  
9.800  
8.000  
0.500  
MAX.  
2.400  
1.900  
0.800  
9.900  
0.850  
1.300  
0.600  
10.500  
11.200  
3.400  
4.670  
10.000  
8.200  
0.700  
A
A1  
b
2.300  
1.800  
0.700  
9.800  
0.750  
1.200  
0.500  
10.400  
11.100  
3.300  
b1  
b2  
b3  
c
L2  
D4  
L1  
D
H
D1  
D2  
©
D4  
E
4.570  
9.900  
i
E1  
E2  
e
8.100  
0.600  
1.200 BSC  
1.225 BSC  
11.700  
e1  
H
L
H1  
H2  
11.600  
11.800  
L3  
H1  
H2  
i
6.950 BSC  
5.900 BSC  
0.100 REF.  
0.350 REF.  
3.100 REF.  
j
K
L
1.550  
0.600  
0.500  
0.400  
1.650  
0.700  
0.600  
1.750  
0.800  
0.700  
0.600  
L1  
L2  
L3  
Q
0.500  
7.950 REF.  
3.100  
ꢀꢁe5()ꢂ  
R
©
3.000  
3.200  
K
D1  
8
VER2.6  

AGM15T05LL  
Disclaimer:  
The information provided in this document is believed to be accurate and reliable.  
however,Shenzhen Core Control Electronics Technology Co., Ltd. does not assume  
any responsibility for the following consequences.Do not consider the use of  
such information or use beyond its
 
scope.  
The information mentioned in this document may be changed at any time without  
notice.  
The products and information provided in this document do not infringe patents.  
Shenzhen Core Control Electronics Technology Co., Ltd. assumes no responsibility  
for any infringement of any other rights of third parties.The result of using such  
products and information.  
This document is the third version issued on August 20th, 2023. This document  
replaces and Replace all previously provided information.  
It is a registered trademark of Shenzhen Core Control Electronics  
Technology Co., Ltd.  
Copyright © 2017 Shenzhen Core Control Electronics Technology Co., Ltd. all rights  
reserved.  
9
VER2.6