Alpha—Omega-Semicon-AO7401
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AO7401
30V P-Channel
MOSFET
General Description
Product Summary
V
DS
The AO7401 uses advanced trench technology to
provide excellent R
DS(ON)
, low gate charge, and
operation with gate voltages as low as 2.5V, in the
small SOT363 footprint. It can be used for a wide
variety of applications, including load switching, low
current inverters and low current DC-DC converters.
-30V
I
D
(at V
GS
=-10V)
R
DS(ON)
(at V
GS
=-10V)
R
DS(ON)
(at V
GS
=-4.5V)
R
DS(ON)
(at V
GS
=-2.5V)
-1.4A
< 115m
Ω
< 140m
Ω
< 200m
Ω
SC-70
(SOT-323)
D
Top View
D
Bottom View
D
G
S
G
S
S
G
Absolute Maximum Ratings
T
A
=25
°
C
u
nless otherwise noted
Parameter
Symbol
V
DS
Maximum
-30
Units
Drain-Source Voltage
Gate-Source Voltage
V
V
V
GS
±12
T
A
=25
°
C
T
A
=70
°
C
-1.4
Continuous Drain
Current
I
D
A
-1.0
Pulsed Drain Current
C
I
DM
P
D
-10
T
A
=25
°
C
T
A
=70
°
C
0.35
W
°C
Power Dissipation
B
0.22
Junction and Storage Temperature Range
T
J
, T
STG
-55 to 150
Thermal Characteristics
Parameter
Symbol
Typ
300
340
280
Max
360
425
320
Units
°
C
/W
°
C
/W
°
C
/W
Maximum Junction-to-Ambient
A
Maximum Junction-to-Ambient
A D
Maximum Junction-to-Lead
t
≤
10s
R
θ
JA
Steady-State
Steady-State
R
θ
JL
Rev 6: June 2011
Page 1 of 5
AO7401
Electrical Characteristics (T
J
=25
°
C
u
nless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max Units
STATIC PARAMETERS
I
D
=-250
µ
A, V
GS
=0V
BV
DSS
Drain-Source Breakdown Voltage
-30
V
V
DS
=-30V, V
GS
=0V
-1
µ
A
-5
I
DSS
Zero Gate Voltage Drain Current
T
J
=55
°
C
V
DS
=0V, V
GS
= ±12V
V
DS
=V
GS
I
D
=-250
µ
A
V
GS
=-10V, V
DS
=-5V
V
GS
=-10V, I
D
=-1.4A
I
GSS
Gate-Body leakage current
Gate Threshold Voltage
On state drain current
±100
-1.4
nA
V
V
GS(th)
I
D(ON)
-0.6
-10
-1
A
92.5
130
110
150
6
115
160
140
200
m
Ω
T
J
=125
°
C
R
DS(ON)
Static Drain-Source On-Resistance
V
GS
=-4.5V, I
D
=-1.2A
m
Ω
m
Ω
S
V
GS
=-2.5V, I
D
=-1A
V
DS
=-5V, I
D
=-1.4A
I
S
=-1A,V
GS
=0V
g
FS
V
SD
I
S
Forward Transconductance
Diode Forward Voltage
-0.78
-1
V
Maximum Body-Diode Continuous Current
-0.5
A
DYNAMIC PARAMETERS
C
iss
C
oss
C
rss
R
g
Input Capacitance
260
37
20
8
315
12
pF
pF
pF
Ω
V
GS
=0V, V
DS
=-15V, f=1MHz
Output Capacitance
Reverse Transfer Capacitance
Gate resistance
V
GS
=0V, V
DS
=0V, f=1MHz
4
SWITCHING PARAMETERS
Q
g
(10V) Total
Gate Charge
5.9
2.8
0.7
1
7.2
3.5
nC
nC
nC
nC
ns
Q
g
(4.5V) Total
Gate Charge
V
GS
=-10V, V
DS
=-15V, I
D
=-1.4A
Q
gs
Q
gd
t
D(on)
t
r
Gate Source Charge
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
6
V
GS
=-10V, V
DS
=-15V, R
L
=10
Ω
,
R
GEN
=3
Ω
3.5
20
5
ns
t
D(off)
t
f
ns
ns
t
rr
I
F
=-1.4A, dI/dt=100A/
µ
s
I
F
=-1.4A, dI/dt=100A/
µ
s
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
11.5
4.5
15
ns
Q
rr
nC
A. The value of R
θ
JA
is measured with the device mounted on 1in
2
FR-4 board with 2oz. Copper, in a still air environment with T
A
=25
°
C
. The
value in any given application depends on the user’s specific board design.
B. The power dissipation P
D
is based on T
J(MAX)
=150
°
C
, using
≤
10s junction-to-ambient thermal resistance.
C. Repetitive
rating, pulse width limited by junction temperature T
J(MAX)
=150
°
C
. Ratings are based on low frequency and duty
cycles to keep
initialT
J
=25
°
C
.
D. The R
θ
JA
is the sum of the thermal impedance from junction to lead R
θ
JL
and lead to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300
µ
s pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-ambient thermal impedance which is measured with the device mounted on 1in
2
FR-4 board with
2oz. Copper, assuming a maximum junction temperature of T
J(MAX)
=150
°
C
. The SOA curve provides a single pulse ratin g.
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS.
AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev 6: June 2011
Page 2 of 5
AO7401
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
15
12
9
10
8
-10V
-6V
-4.5V
V
DS
=-5V
-3V
6
-2.5V
4
6
125
°
C
V
GS
=-2V
2
25
°
C
2.5
3
0
0
0
0.5
1
1.5
2
3
3.5
4
0
1
2
3
4
5
-V
GS
(Volts)
-V
DS
(Volts)
Figure 2: Transfer Characteristics (Note E)
Fig 1: On-Region Characteristics (Note E)
210
190
170
150
130
110
90
1.6
1.4
1.2
1
V
GS
=-2.5V
V
GS
=-10V
I
D
=-1.4A
V
GS
=-4.5V
V
GS
=-10V
V
GS
=-4.5V
I
D
=-1.2A
V
GS
=-2.5V
70
I
D
=-1A
0.8
50
0
25
50
75
100
125
150
175
0
1
2
3
4
5
6
-I
D
(A)
Temperature (
°
C
)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage (Note E)
Figure 4: On-Resistance vs. Junction Te
m
p
erature
(Note E)
250
200
150
100
50
1.0E+02
1.0E+01
I
D
=-1.4A
1.0E+00
125
°
C
1.0E-01
1.0E-02
1.0E-03
1.0E-04
1.0E-05
125
°
C
25
°
C
25
°
C
0.0
0.2
0.4
-V
SD
(Volts)
Figure 6: Body-Diode Characteristics (Note E)
0.6
0.8
1.0
1.2
0
2
4
6
8
10
-V
GS
(Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Rev 6: June 2011
Page 3 of 5
AO7401
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
10
400
300
200
100
0
V
DS
=-15V
I
D
=-1.4A
8
C
iss
6
4
C
oss
2
C
rss
0
0
1
2
3
4
5
6
0
5
10
15
-V
DS
(Volts)
20
25
30
Q
g
(nC)
Figure 7: Gate-Charge Characteristics
Figure 8: Capacitance Characteristics
20
15
10
5
100.0
10.0
1.0
T
A
=25
°
C
10
µ
s
R
DS(ON)
limited
100
µ
s
1ms
10ms
0.1
T
J(Max)
=150
°
C
T
A
=25
°
C
DC
10s
0.0
0
0.01
0.1
1
10
100
0.00001
0.001
0.1
10
1000
-V
DS
(Volts)
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-to-
Ambient (Note F)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
10
D=T
on
/T
J,PK
=T
A
+P
DM
.Z
θ
JA
.R
θ
JA
θ
JA
=425
°
C
/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
T
R
1
0.1
P
D
0.01
0.001
Single Pulse
0.001
T
on
T
0.00001
0.0001
0.01
0.1
Pulse Width (s)
1
10
100
1000
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Rev 6: June 2011
Page 4 of 5
AO7401
Gate Charge Test Circuit & Waveform
Vgs
Qg
–
-10V
–
VDC
Qgs
Qgd
+
Vds
VDC
+
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
t
off
t
on
t
t
d(off)
t
d(on)
t
r
f
Vgs
–
90%
10%
DUT
Vdd
Vgs
VDC
+
Rg
Vgs
Vds
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
E
AR
= 1/2 LI
A
2
R
L
Vds
Id
Vgs
Vds
–
BV
DSS
Vgs
Vdd
VDC
+
Id
Rg
I
AR
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q
rr
= –
Idt
Vds +
Vds –
Ig
DUT
Vgs
t
rr
L
-Isd
-I
F
Isd
Vgs
dI/dt
-I
RM
+
Vdd
VDC
Vdd
–
-Vds
Rev 6: June 2011
Page 5 of 5
