Alpha—Omega-Semicon-AOD7N65

Part #Alpha—Omega-Semicon-AOD7N65
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Alpha—Omega-Semicon-AOD7N65
AOD7N65/AOI7N65  
650V,7A N-Channel MOSFET  
General Description  
Product Summary  
The AOD7N65 & AOI7N65 have been fabricated using an  
advanced high voltage MOSFET process that is designed  
to deliver high levels of performance and robustness in  
popular AC-DC applications.  
By providing low R

DS(on)

, C

iss

and C

rss

along with  
guaranteed avalanche capability these parts can be  
adopted quickly into new and existing offline power supply  
designs.  
V

DS  

750V@150
℃
 
7A  
I

D

(at V

GS

=10V)  
R

DS(ON)

(at V

GS

=10V)  
< 1.56
Ω
 
100% UIS Tested!  
100% R

g

Tested!  
TO252  
DPAK  
TO251A  
IPAK  
D
Top View  
Bottom View  
Top View  
Bottom View  
D
D
G
G
G
S
S
D
D
S
G
S
S
G
AOD7N65  
AOI7N65  
Absolute Maximum Ratings
 
T

A

=25°C unless otherwise noted  
Parameter  
Symbol  
Maximum  
Units  
Drain-Source Voltage  
V

DS  

650  
V
Gate-Source Voltage  
V

GS  

±30  
7
V
A
T

C

=25°C  
Continuous Drain  
Current

B  

I

D  

T

C

=100°C  
4.3  
Pulsed Drain Current

C  

I

DM  

23  
3.1  
Avalanche Current

C  

I

AR  

A
Repetitive avalanche energy

C  

E

AR  

E

AS  

dv/dt  
144  
mJ  
Single pulsed avalanche energy

H  

Peak diode recovery dv/dt  
T

C

=25°C  
288  
mJ  
V/ns  
W
W/

o

C  
5
178  
P

D  

Power Dissipation

B  

Derate above 25

o

C  
1.4  
Junction and Storage Temperature Range  
T

J

, T

STG  

-50 to 150  
°C  
Maximum lead temperature for soldering  
purpose, 1/8″ from case for 5 seconds  
T

L  

300  
°C  
Thermal Characteristics  
Parameter  
Symbol  
R

θ
JA  

Typical  
Maximum  
Units  
°C/W  
°C/W  
°C/W  
Maximum Junction-to-Ambient

A,G  

45  
–
55  
0.5  
0.7  
Maximum Case-to-sink

A  

Maximum Junction-to-Case

D,F  

R

θ
CS  

R

θ
JC  

0.5  
Rev.1.0: October 2014  
Page 1 of 6  

AOD7N65/AOI7N65  
Electrical Characteristics (T

J

=25°C unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max Units  
STATIC PARAMETERS  
I

D

=250µA, V

GS

=0V, T

J

=25°C  
I

D

=250µA, V

GS

=0V, T

J

=150°C  
650  
BV

DSS  

Drain-Source Breakdown Voltage  
750  
V
BV

DSS  

/∆TJ  
Breakdown Voltage Temperature  
Coefficient  
V/

o

C  
I

D

=250µA, V

GS

=0V  
0.67  
V

DS

=650V, V

GS

=0V  
V

DS

=520V, T

J

=125°C  
V

DS

=0V, V

GS

=±30V  
V

DS

=5V, I

D

=250
µ
A  
V

GS

=10V, I

D

=3.5A  
V

DS

=40V, I

D

=3.5A  
I

S

=1A,V

GS

=0V  
1
I

DSS  

Zero Gate Voltage Drain Current  
µ
A  
10  
I

GSS  

V

GS(th)  

R

DS(ON)  

g

FS  

Gate-Body leakage current  
Gate Threshold Voltage  
±100  
4.5  
n
Α  
V
3.3  
3.9  
1.2  
7
Static Drain-Source On-Resistance  
Forward Transconductance  
Diode Forward Voltage  
1.56  
Ω
S
V

SD  

0.72  
1
7
V
I

S  

Maximum Body-Diode Continuous Current  
Maximum Body-Diode Pulsed Current  
A
I

SM  

23  
A
DYNAMIC PARAMETERS  
C

iss  

C

oss  

C

rss  

R

g  

Input Capacitance  
780  
60  
4
982  
86  
7
1180  
115  
10  
pF  
pF  
pF  
Ω
V

GS

=0V, V

DS

=25V, f=1MHz  

GS

=0V, V

DS

=0V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
V
1.5  
3.2  
5
SWITCHING PARAMETERS  
Q

g  

Q

gs  

Q

gd  

t

D(on)  

t

r  

Total Gate Charge  
15  
19.6  
4.6  
8.2  
26  
24  
nC  
nC  
nC  
ns  
ns  
ns  
ns  
V

GS

=10V, V

DS

=520V, I

D

=7A  
Gate Source Charge  
Gate Drain Charge  
Turn-On DelayTime  
V

GS

=10V, V

DS

=325V, I

D

=7A,  
Turn-On Rise Time  
43  
R

G

=25
Ω  
t

D(off)  

t

f  

Turn-Off DelayTime  
53  
Turn-Off Fall Time  
32  
t

rr  

I

F

=7A,dI/dt=100A/
µ
s,V

DS

=100V  
I

F

=7A,dI/dt=100A/
µ
s,V

DS

=100V  
290  
3.4  
365  
4.3  
440  
5.4  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
ns  
Q

rr  

µ
C  
A. The value of R

θ
JA

is measured with the device in a still air environment with T

A

=25
°
C.  
B. The power dissipation P

D

is based on T

J(MAX)

=150
°
C in
 
a TO252 package, using junction-to-case thermal resistance, and is more useful in  
setting the upper dissipation limit for cases where additional heatsinking is used.  
C. Repetitive rating, pulse width limited by junction temperature T

J(MAX)

=150
°
C.  
D. The R

θ
JA

is the sum of the thermal impedance from junction to case R

θ
JC

and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300
µ
s pulses, duty cycle 0.5% max.  
F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming a  
maximum junction temperature of T

J(MAX)

=150
°
C.  
G.These tests are performed with the device mounted on 1 in

2

FR-4 board with 2oz. Copper, in a still air environment with T

A

=25
°
C.  
H. L=60mH, I

AS

=3.1A, V

DD

=150V, R

G

=10
Ω
, Starting T

J

=25
°
C  
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING  
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS.
 
AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,  
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.  
Rev.1.0: October 2014  
Page 2 of 6  

AOD7N65/AOI7N65  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
12  
10  
8
100  
10  
1
10V  
V

DS

=40V  
-55
°
C  
6.5V  
6V  
125
°
C  
6
4
5.5V  
25
°
C  
2
V

GS

=5V  
0
0.1  
0
5
10  
15  
20  
25  
30  
2
4
6
8
10  
V

GS

(Volts)  
V

DS

(Volts)  
Figure 2: Transfer Characteristics  
Fig 1: On-Region Characteristics  
2.4  
2.1  
1.8  
1.5  
1.2  
0.9  
0.6  
3
2.5  
2
V

GS

=10V  
I

D

=3.5A  
V

GS

=10V  
1.5  
1
0.5  
0
-100  
-50  
0
50  
100  
150  
200  
0
3
6
9
12  
15  
Temperature (°C)  
I

D

(A)  
Figure 4: On-Resistance vs. Junction Temperature  
Figure 3: On-Resistance vs. Drain Current and Gate  
Voltage  
1.2  
1.1  
1
1E+02  

1E+01  
1E+00  
1E-01  
1E-02  
1E-03  
1E-04  
125
°
C  
25
°
C  
0.9  
0.8  
-100  
-50  
0
50  
100  
150  
200  
0
0.2  
0.4  
0.6  
0.8  
1
T

J

(

o

C)  
V

SD

(Volts)  
Figure 6: Body-Diode Characteristics  
Figure 5: Break Down vs. Junction Temperature  
Rev.1.0: October 2014  
Page 3 of 6  

AOD7N65/AOI7N65  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
10000  
15  
12  
9
V

DS

=520V  
I

D

=3.5A  
C

iss  

1000  
100  
10  
C

oss  

6
C

rss  

3
1
0
0.1  
1
10  
100  
0
5
10  
15  
20  
25  
30  
V

DS

(Volts)  
Figure 8: Capacitance Characteristics  
Q

g

(nC)  
Figure 7: Gate-Charge Characteristics  
1000  
800  
600  
400  
200  
0
100  
10  
T

J(Max)

=150
°
C  
T

C

=25
°
C  
10
µ
s  
R

DS(ON)  

limited  
100
µ
s  
1
1ms  
DC  
10ms  
0.1  
0.01  
T

J(Max)

=150
°
C  
T

C

=25
°
C  
0.0001  
0.001  
0.01  
0.1  
1
10  
1
10  
100  
1000  
V

DS

(Volts)  
Pulse Width (s)  
Figure 9: Maximum Forward Biased Safe  
Operating Area
 
(Note F)  
Figure 10: Single Pulse Power Rating Junction-to-  
Case (Note F)  
10  
1
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
D=T

on

/T  
T

J,PK

=T

C

+P

DM

.Z

θ
JC

.R

θ
JC  

θ
JC

=0.7
°
C/W  
R
0.1  
0.01  
P

D  

Single Pulse  
T

on  

T
1E-05  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
Pulse Width (s)  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
Rev.1.0: October 2014  
Page 4 of 6  

AOD7N65/AOI7N65  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
200  
160  
120  
80  
8
6
4
2
0
40  
0
0
25  
50  
75  
100  
125  
150  
0
25  
50  
75  
100  
125  
150  
T

CASE

(°C)  
Figure 12: Power De-rating (Note B)  
T

CASE

(°C)  
Figure 13: Current De-rating (Note B)  
400  
T

J(Max)

=150
°
C  
T

A

=25
°
C  
300  
200  
100  
0
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
Pulse Width (s)  
Figure 14: Single Pulse Power Rating Junction-to-Ambient (Note G)  
10  
1
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
D=T

on

/T  
T

J,PK

=T

A

+P

DM

.Z

θ
JA

.R

θ
JA  

R

θ
JA

=55
°
C/W  
0.1  
P

D  

0.01  
T

on  

Single Pulse  
0.001  
T
0.001  
1E-05  
0.0001  
0.01  
0.1  
1
10  
100  
1000  
Pulse Width (s)  
Figure 15: Normalized Maximum Transient Thermal Impedance (Note G)  
Rev.1.0: October 2014  
Page 5 of 6  

AOD7N65/AOI7N65  
Gate Char
g
e
T
e
s
t
C
ircuit
&
W
av
e
f
orm  
Vgs  
Qg  
10V  
+
V
D
C  
+
Qgs  
Q
g
d  
Vds  
VDC  
–
–
DUT  
Vgs  
Vds  
Ig  
Cha
r
ge  
Re
s
i
sti
v
e
S
witching Test Circuit &
W
avef
o
rms  
RL  
Vds  
90%  
10%  
+
D
U
T  
Vdd  
Vgs  
V
D
C  
Rg  
–
Vgs  
Vgs  
t

d(
o
n
)  

t
r
t

d(
o
f
f)  

t
f
t

o
n  

t

o
f
f  

Unclamped Inductive Switching (UIS) Test Circuit & Wa
v
e
f
o
rms  
L
2
E

A
R

=
1
/
2 LI  
AR  
BV

DSS  

Vds  
Id  
Vds  
+
Vgs  
Vdd  
I

AR  

Vgs  
VDC  
Id  
Rg  
–
DUT  
Vgs  
Vgs  
Diode Recover
y
T
e
s
t
C
ircuit
&
W
ave
f
orms  
Q

r
r

=
–
I
dt  
Vds +  
V
d
s –  
Ig  
DUT  
Vgs  
I
s
d  
t

r
r  

L
I

F  

Isd  
dI/dt  
+
I

RM  

Vdd  
Vgs  
V
D
C  
Vdd  
–
Vds  
Rev.1.0: October 2014  
Page 6 of 6