Alpha—Omega-Semicon-AON6360

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Alpha—Omega-Semicon-AON6360
AON6360  
30V N-Channel AlphaMOS  
General Description  
Product Summary  
V

DS  

• Trench Power AlphaMOS (enhanced αMOS LV) technology  
• Low RDS

(ON)  

30V  
85A  
I

D

(at V

GS

=10V)  
R

DS(ON)

(at V

GS

=10V)  
R

DS(ON)

(at V

GS

=4.5V)  
• Low Gate Charge  
• High Current Capability  
• RoHS and Halogen-Free Compliant  
< 3mΩ  
< 5mΩ  
Applications  
100% UIS Tested  
100% Rg
 
Tested  
• DC/DC Converters in Computing  
• Isolated DC/DC Converters in Telecom and Industrial  
DFN5X6  
D
Top View  
Top View  
Bottom View  
1
8
2
3
7
6
5
4
G
PIN1  
PIN1  
S
Orderable Part Number  
Package Type  
Form  
Tape & Reel  
Minimum Order Quantity  
AON6360  
DFN 5×6  
3000  
Absolute Maximum Ratings
 
T

A

=25°C unless otherwise noted  
Parameter  
Symbol  
V

DS  

Maximum  
Units  
Drain-Source Voltage  
Gate-Source Voltage  
30  
±20  
85  
V
V
V

GS  

T

C

=25°C  
Continuous Drain  
Current

G  

Pulsed Drain Current

C  

I

D  

T

C

=100°C  
59  
A
I

DM  

180  
36  
T

A

=25°C  
T

A

=70°C  
Continuous Drain  
Current  
I

DSM  

A
29  
Avalanche Current

C  

Avalanche energy  
V

DS

Spike  
I

AS  

40  
A
mJ  
V
C
L=0.05mH  
E

AS  

40  
10µs  
V

SPIKE  

36  
T

C

=25°C  
T

C

=100°C  
T

A

=25°C  
T

A

=70°C  
42  
P

D  

W
Power Dissipation

B  

Power Dissipation

A  

17  
6.2  
4
P

DSM  

W
Junction and Storage Temperature Range  
T

J

, T

STG  

-55 to 150  
°C  
Thermal Characteristics  
Parameter  
Symbol  
Typ  
15  
Max  
20  
50  
3
Units  
°C/W  
°C/W  
°C/W  
Maximum Junction-to-Ambient

A  

Maximum Junction-to-Ambient

A D  

Maximum Junction-to-Case  
t
≤ 10s  
R

θ
JA  

Steady-State  
Steady-State  
40  
R

θ
JC  

2.4  
Rev. 1.0: September 2014  
Page 1 of 6  

Electrical Characteristics (T

J

=25°C unless otherwise noted)  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
Units  
STATIC PARAMETERS  
BV

DSS  

Drain-Source Breakdown Voltage  
ID=250µA, VGS=0V  
V

DS

=30V, V

GS

=0V  
30  
V
1
5
I

DSS  

Zero Gate Voltage Drain Current  
µA  
T

J

=55°C  
V

DS

=0V, V

GS

=±20V  
V

DS

=V

GS,

I

D

=250
µ
A  
V

GS

=10V, I

D

=20A  
I

GSS  

Gate-Body leakage current  
Gate Threshold Voltage  
±100  
2.2  
3
nA  
V
V

GS(th)  

1.4  
1.8  
2.5  
3.7  
4
mΩ  
R

DS(ON)  

Static Drain-Source On-Resistance  
T

J

=125°C  
4.5  
5
V

GS

=4.5V, I

D

=20A  
V

DS

=5V, I

D

=20A  
I

S

=1A,V

GS

=0V  
mΩ  
S
g

FS  

V

SD  

I

S  

Forward Transconductance  
Diode Forward Voltage  
100  
0.7  
1
V
Maximum Body-Diode Continuous Current  
50  
A
DYNAMIC PARAMETERS  
C

iss  

C

oss  

C

rss  

R

g  

Input Capacitance  
1590  
660  
80  
pF  
pF  
pF  
Ω
V

GS

=0V, V

DS

=15V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
f=1MHz  
0.8  
1.7  
2.6  
SWITCHING PARAMETERS  
Q

g

(10V) Total
 
Gate Charge  
Q

g

(4.5V) Total
 
Gate Charge  
24  
11.5  
4
nC  
nC  
nC  
nC  
nC  
nC  
ns  
V

GS

=10V, V

DS

=15V, I

D

=20A  
Q

gs  

Q

gd  

Q

gs  

Q

gd  

t

D(on)  

t

r  

Gate Source Charge  
Gate Drain Charge  
5.8  
4
Gate Source Charge  
V

GS

=4.5V, V

DS

=15V, I

D

=20A  
Gate Drain Charge  
5.8  
8
Turn-On DelayTime  
Turn-On Rise Time  
V

GS

=10V, V

DS

=15V, R

L

=0.75
Ω
,  
R

GEN

=3
Ω  
4
ns  
t

D(off)  

t

f  

Turn-Off DelayTime  
24  
5
ns  
Turn-Off Fall Time  
ns  
t

rr  

I

F

=20A, dI/dt=500A/
µ
s  
I

F

=20A, dI/dt=500A/
µ
s  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
14.5  
31  
ns  
Q

rr  

nC  
A. The value of R

θ
JA

is measured with the device mounted on 1in

2

FR-4 board with 2oz. Copper, in a still air environment with T

A

=25
°
C. The Power  
dissipation P

DSM

is based on R

θ
JA

t≤ 10s and the maximum allowed junction temperature of 150
°
C. The value in any given application depends on  
the user’s specific board design.  
B. The power dissipation P

D

is based on T

J(MAX)

=150
°
C, using junction-to-case thermal resistance, and is more useful in setting the upper  
dissipation limit for cases where additional heatsinking is used.  
C. Single pulse width limited by junction temperature T

J(MAX)

=150
°
C.  
D. The R

θ
JA

is the sum of the thermal impedance from junction to case R

θ
JC

and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300
µ
s pulses, duty cycle 0.5% max.  
F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming a  
maximum junction temperature of T

J(MAX)

=150
°
C. The SOA curve provides a single pulse rating.  
G. The maximum current rating is package limited.  
H. These tests are performed with the device mounted on 1 in

2

FR-4 board with 2oz. Copper, in a still air environment with T

A

=25
°
C.  
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING  
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS.
 
AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,  
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.  
Rev. 1.0: September 2014  
Page 2 of 6  

TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
100  
10V  
100  
80  
60  
40  
20  
0
V

DS

=5V  
4.5V  
4V  
80  
60  
40  
20  
0
3.5V  
125
°
C  
25
°
C  
V

GS

=3V  
0
1
2
3
4
5
6
0
1
2
3
4
5
V

GS

(Volts)  
V

DS

(Volts)  
Figure 2: Transfer Characteristics (Note E)  
Figure 1: On-Region Characteristics (Note E)  
6
1.8  
1.6  
1.4  
1.2  
1
5
4
3
2
1
0
V

GS

=10V  
I

D

=20A  
V

GS

=4.5V  
V

GS

=4.5V  
I

D

=20A  
V

GS

=10V  
0.8  
0
25  
50  
75  
100  
125  
150  
175  
0
5
10  
15  
I

D

(A)  
20  
25  
30  
Temperature (°C)  
Figure 3: On-Resistance vs. Drain Current and Gate  
Voltage (Note E)  
Figure 4: On-Resistance vs. Junction Temperature  
(Note E)  
10  
8
1.00E+02  
1.00E+01  
1.00E+00  
1.00E-01  
1.00E-02  
1.00E-03  
1.00E-04  
1.00E-05  
I

D

=20A  
125
°
C  
6
125
°
C  
25
°
C  
4
2
25
°
C  
0
2
4
6
8
10  
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
V

GS

(Volts)  
V

SD

(Volts)  
Figure 6: Body-Diode Characteristics (Note E)  
Figure 5: On-Resistance vs. Gate-Source Voltage  
(Note E)  
Rev. 1.0: September 2014  
Page 3 of 6  

TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
10  
2500  
V

DS

=15V  
I

D

=20A  
8
2000  
1500  
1000  
500  
0
C

iss  

6
4
C

oss  

2
C

rss  

0
0
5
10  
15  
20  
25  
30  
0
5
10  
15  
20  
25  
30  
Q

g

(nC)  
V

DS

(Volts)  
Figure 7: Gate-Charge Characteristics  
Figure 8: Capacitance Characteristics  
1000.0  
100.0  
10.0  
1.0  
500  
400  
300  
200  
100  
0
T

J(Max)

=150
°
C  
T

C

=25
°
C  
R

DS(ON)  

limited  
10
µ
s  
100
µ
s  
DC  
1ms  
10ms  
0.1  
T

J(Max)

=150
°
C  
T

C

=25
°
C  
0.0  
0.01  
1E-05 0.0001 0.001
 
0.01  
0.1  
1
10  
0.1  
1
10  
100  
V

DS

(Volts)  
Pulse Width (s)  
Figure 10: Single Pulse Power Rating Junction-to-  
Case (Note F)  
V

GS

> or equal to 4.5V  
Figure 9: Maximum Forward Biased Safe  
Operating Area (Note F)  
10  
D=T

on

/T  
T

J,PK

=T

C

+P

DM

.Z

θ
JC

.R

θ
JC  

θ
JC

=3
°
C/W  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
R
1
0.1  
Single Pulse  
P

D  

T

on  

T
0.01  
0.00001  
0.0001  
0.001  
0.01  
Pulse Width (s)  
0.1  
1
10  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
Rev. 1.0: September 2014  
Page 4 of 6  

TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
50  
40  
30  
20  
10  
0
100  
80  
60  
40  
20  
0
0
25  
50  
75  
100  
125  
150  
0
25  
50  
75  
100  
125  
150  
T

CASE

(
°
C)  
T

CASE

(
°
C)  
Figure 12: Power De-rating (Note F)  
Figure 13: Current De-rating (Note F)  
10000  
1000  
100  
10  
T

A

=25
°
C  
1
1E-05  
0.001  
0.1  
Pulse Width (s)  
10  
1000  
Figure 14: Single Pulse Power Rating Junction-to-Ambient (Note H)  
10  
1
D=T

on

/T  
T

J,PK

=T

A

+P

DM

.Z

θ
JA

.R

θ
JA  

θ
JA

=50
°
C/W  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
R
0.1  
P

D  

0.01  
0.001  
Single Pulse  
0.01  
T

on  

T
0.0001  
0.001  
0.1  
1
10  
100  
1000  
Pulse Width (s)  
Figure 15: Normalized Maximum Transient Thermal Impedance (Note H)  
Rev. 1.0: September 2014  
Page 5 of 6  

Gate Charge Test Circuit & Waveform  
Vgs  
Qg  
10V  
+
VDC  
+
Qgs  
Qgd  
Vds  
VDC  
–
–
DUT  
Vgs  
Ig  
Charge  
Resistive Switching Test Circuit & Waveforms  
RL  
Vds  
Vds  
90%  
10%  
+
DUT  
Vdd  
Vgs  
VDC  
Rg  
–
Vgs  
Vgs  
t

d(on)  

t
r
t

d(off)  

t
f
t

on  

t

off  

Unclamped Inductive Switching (UIS) Test Circuit & Waveforms  
L
E

AR

= 1/2 L
I

A

2

R  

BV

DSS  

Vds  
Id  
Vgs  
Vds  
+
Vgs  
Vdd  
I

AR  

VDC  
Id  
Rg  
–
DUT  
Vgs  
Vgs  
Diode Recovery Test Circuit & Waveforms  
Q

rr

= –
 
Idt  
Vds +  
Vds –  
Ig  
DUT  
Vgs  
t

rr  

L
Isd  
I

F  

Isd  
Vgs  
dI/dt  
I

RM  

+
Vdd  
VDC  
Vdd  
–
Vds  
Rev. 1.0: September 2014  
Page 6 of 6