Alpha—Omega-Semicon-AON6578

Part #Alpha—Omega-Semicon-AON6578
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Alpha—Omega-Semicon-AON6578
AON6578  
30V N-Channel
 
AlphaMOS  
General Description  
Product Summary  
V

DS  

30V  
• Latest Trench Power AlphaMOS (
α
MOS LV) technology  
• Very Low RDS(on) at 4.5V

GS  

• Low Gate Charge  
• High Current Capability  
• RoHS and Halogen-Free Compliant  
I

D

(at V

GS

=10V)  
R

DS(ON)

(at V

GS

=10V)  
R

DS(ON)

(at V

GS

= 4.5V)  
70A  
< 4.4m
Ω
 
< 7.8m
Ω  
Application  
• DC/DC Converters in Computing, Servers, and POL  
100% UIS Tested  
100% R

g

Tested  
• Isolated DC/DC Converters in Telecom and Industrial  
D
DFN5X6  
Top View  
Top View  
Bottom View  
1
8
2
3
7
6
4
5
G
S
PIN1  
Absolute Maximum Ratings
 
T

A

=25
°
C
u
nless otherwise noted  
Parameter  
Symbol  
Maximum  
Units  
Drain-Source Voltage  
V

DS  

30  
V
Gate-Source Voltage  
V

GS  

±20  
70  
V
A
T

C

=25
°
C  
Continuous Drain  
Current  
I

D  

T

C

=100
°
C  
45  
Pulsed Drain Current

C  

I

DM  

180  
28  
T

A

=25
°
C  
T

A

=70
°
C  
Continuous Drain  
Current  
Avalanche Current

C  

Avalanche energy L=0.05mH

C  

I

DSM  

A
23  
I

AS  

34  
A
mJ  
V
E

AS  

29  
V

DS

Spike  
100ns  
V

SPIKE  

36  
T

C

=25
°
C  
T

C

=100
°
C  
T

A

=25
°
C  
T

A

=70
°
C  
35  
P

D  

W
Power Dissipation

B  

Power Dissipation

A  

14  
5.6  
P

DSM  

W
°C  
3.6  
Junction and Storage Temperature Range  
T

J

, T

STG  

-55 to 150  
Thermal Characteristics  
Parameter  
Symbol  
Typ  
18  
Max  
Units  
°
C
/W  
°
C
/W  
°
C
/W  
Maximum Junction-to-Ambient

A  

Maximum Junction-to-Ambient

A D  

Maximum Junction-to-Case  
t
≤
10s  
22  
55  
R

θ
JA  

Steady-State  
Steady-State  
40  
R

θ
JC  

2.75  
3.5  
Rev.1.0: August 2013  
Page 1 of 6  

AON6578  
Electrical Characteristics (T

J

=25
°
C
u
nless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max Units  
STATIC PARAMETERS  
I

D

=250
µ
A, V

GS

=0V  
BV

DSS  

Drain-Source Breakdown Voltage  
30  
V
V

DS

=30V, V

GS

=0V  
1
I

DSS  

Zero Gate Voltage Drain Current  
µ
A  
5
T

J

=55
°
C  
V

DS

=0V, V

GS

=±20V  
V

DS

=V

GS,

I

D

=250
µ
A  
V

GS

=10V, I

D

=20A  
I

GSS  

Gate-Body leakage current  
Gate Threshold Voltage  
±100  
2.4  
4.4  
6
nA  
V
V

GS(th)  

1.6  
2
3.6  
5
m
Ω  
R

DS(ON)  

Static Drain-Source On-Resistance  
T

J

=125
°
C  
V

GS

=4.5V, I

D

=20A  
V

DS

=5V, I

D

=20A  
I

S

=1A,V

GS

=0V  
6.2  
68  
0.7  
7.8  
m
Ω  
S
g

FS  

V

SD  

I

S  

Forward Transconductance  
Diode Forward Voltage  
1
V
Maximum Body-Diode Continuous Current  
40  
A
DYNAMIC PARAMETERS  
C

iss  

C

oss  

C

rss  

R

g  

Input Capacitance  
1340  
570  
90  
pF  
pF  
pF  
Ω
V

GS

=0V, V

DS

=15V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
f=1MHz  
0.8  
1.6  
2.4  
SWITCHING PARAMETERS  
Q

g

(10V) Total
 
Gate Charge  
19.5  
9
30  
15  
nC  
nC  
nC  
nC  
ns  
Q

g

(4.5V) Total
 
Gate Charge  
V

GS

=10V, V

DS

=15V, I

D

=20A  
Q

gs  

Q

gd  

t

D(on)  

t

r  

Gate Source Charge  
Gate Drain Charge  
Turn-On DelayTime  
Turn-On Rise Time  
Turn-Off DelayTime  
Turn-Off Fall Time  
4.2  
4
7
V

GS

=10V, V

DS

=15V, R

L

=0.75
Ω
,  
R

GEN

=3
Ω  
7
ns  
t

D(off)  

t

f  

21.5  
5.5  
ns  
ns  
t

rr  

I

F

=20A, dI/dt=500A/
µ
s  
I

F

=20A, dI/dt=500A/
µ
s  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
14  
ns  
Q

rr  

nC  
20.5  
A. The value of R

θ
JA

is measured with the device mounted on 1in

2

FR-4 board with 2oz. Copper, in a still air environment with T

A

=25
°
C. The  
Power dissipation P

DSM

is based on R

θ
JA

t
≤
10s and the maximum allowed junction temperature of 150
°
C. The value in any given application  
depends on the user’s specific board design.  
B. The power dissipation P

D

is based on T

J(MAX)

=150
°
C, using junction-to-case thermal resistance, and is more useful in setting the upper  
dissipation limit for cases where additional heatsinking is used.  
C. Single
 
pulse width limited by junction temperature T

J(MAX)

=150
°
C.  
D. The R

θ
JA

is the sum of the thermal impedance from junction to case R

θ
JC

and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300
µ
s pulses, duty cycle 0.5% max.  
F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming  
a maximum junction temperature of T

J(MAX)

=150
°
C. The SOA curve provides a single pulse rating.  
G. The maximum current rating is package limited.  
H. These tests are performed with the device mounted on 1 in

2

FR-4 board with 2oz. Copper, in a still air environment with T

A

=25
°
C.  
35  
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING  
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS.
 
AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,  
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.  
Rev.1.0: August 2013  
Page 2 of 6  

AON6578  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
40  
30  
20  
10  
0
40  
30  
20  
10  
0
4V  
6V  
V

DS

=5V  
3.5V  
10V  
125
°
C  
25
°
C  
V

GS

=3V  
0
1
2
3
4
5
0
1
2
3
4
5
6
V

DS

(Volts)  
V

GS

(Volts)  
Fig 1: On-Region Characteristics (Note E)  
Figure 2: Transfer Characteristics (Note E)  
10  
8
1.6  
V

GS

=10V  
I

D

=20A  
1.4  
1.2  
1
V

GS

=4.5V  
6
4
V

GS

=4.5V  
I

D

=20A  
V

GS

=10V  
2
0
0.8  
0
5
10  
15  
I

D

(A)  
20  
25  
30  
0
25  
50  
75  
100  
125  
150  
175  
Temperature (
°
C
)  
Figure 3: On-Resistance vs. Drain Current and Gate  
Voltage (Note E)  

Figure 4: On-Resistance vs. Juncti
o

n

Temperature  

(Note E)  
9
1.0E+02  
I

D

=20A  
7.5  
6
1.0E+01  
1.0E+00  
125
°
C  
125
°
C  
1.0E-01  
4.5  
3
1.0E-02  
25
°
C  
1.0E-03  
1.0E-04  
1.0E-05  
25
°
C  
1.5  
0
2
4
6
8
10  
0.0  
0.2  
0.4  
V

SD

(Volts)  
Figure 6: Body-Diode Characteristics (Note E)  
0.6  
0.8  
1.0  
1.2  
V

GS

(Volts)  
Figure 5: On-Resistance vs. Gate-Source Voltage  
(Note E)  
Rev.1.0: August 2013  
Page 3 of 6  

AON6578  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
10  
2000  
V

DS

=15V  
I

D

=20A  
8
1600  
1200  
800  
400  
0
C

iss  

6
C

oss  

4
2
C

rss  

0
0
5
10  
Q

g

(nC)  
15  
20  
25  
0
5
10  
15  
20  
25  
30  
V

DS

(Volts)  
Figure 7: Gate-Charge Characteristics  
Figure 8: Capacitance Characteristics  
200  
160  
120  
80  
1000.0  
100.0  
10.0  
1.0  
T

J(Max)

=150
°
C  
T

C

=25
°
C  
R

DS(ON)  

limited  
10
µ
s  
100
µ
s  
1ms  
10ms  
DC  
0.1  
40  
T

J(Max)

=150
°
C  
T

C

=25
°
C  
0.0  
0
0.01  
0.1  
1
10  
100  
0.0001  
0.001  
0.01  
0.1  
1
10  
V

DS

(Volts)  
Pulse Width (s)  
VGS> or equal to 4.5V  
Figure 9: Maximum Forward Biased Safe  
Operating Area (Note F)  
Figure 10: Single Pulse Power Rating Junction-to-Case  
(Note F)  
10  
1
D=T

on

/T  
T

J,PK

=T

C

+P

DM

.Z

θ
JC

.R

θ
JC  

In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
R

θ
JC

=3.5
°
C/W  
P

D  

0.1  
Single Pulse  
T

on  

T
0.01  
1E-05  
0.0001  
0.001  
0.01  
Pulse Width (s)  
0.1  
1
10  
100  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
Rev.1.0: August 2013  
Page 4 of 6  

AON6578  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
80  
60  
40  
20  
0
50  
40  
30  
20  
10  
0
0
25  
50  
75  
100  
125  
150  
0
25  
50  
T

CASE

(
°
C)  
Figure 13: Current De-rating (Note F)  
75  
100  
125  
150  
T

CASE

(
°
C)  
Figure 12: Power De-rating (Note F)  
10000  
1000  
100  
10  
T

A

=25
°
C  
1
1E-05  
0.001  
0.1  
Pulse Width (s)  
10  
1000  
Figure 14: Single Pulse Power Rating Junction-to-Ambient (Note H)  
10  
1
D=T

on

/T  
T

J,PK

=T

A

+P

DM

.Z

θ
JA

.R

θ
JA  

In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
R

θ
JA

=55
°
C/W  
0.1  
P

D  

Single Pulse  
0.01  
T

on  

T
0.001  
1E-05  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
Pulse Width (s)  
Figure 15: Normalized Maximum Transient Thermal Impedance (Note H)  
Rev.1.0: August 2013  
Page 5 of 6  

AON6578  
Gate Charge Test Circuit & Waveform  
Vgs  
Qg  
10V  
+
VDC  
+
Qgs  
Qgd  
Vds  
VDC  
–
–
DUT  
Vgs  
Ig  
Charge  
Resistive Switching Test Circuit & Waveforms  
RL  
Vds  
Vds  
90%  
10%  
+
DUT  
Vdd  
Vgs  
VDC  
Rg  
–
Vgs  
Vgs  
t

d(on)  

t
r
t

d(off)  

t
f
t

on  

t

off  

Unclamped Inductive Switching (UIS) Test Circuit & Waveforms  
L
E

AR

= 1/2 L
I

A

2

R  

B
V

DSS  

Vds  
Id  
Vgs  
Vds  
+
Vgs  
Vdd  
I

AR  

VDC  
Id  
Rg  
–
DUT  
Vgs  
Vgs  
Diode Recovery Test Circuit & Waveforms  
Q

rr

= –
 
Idt  
Vds +  
Vds –  
Ig  
DUT  
Vgs  
t

rr  

L
Isd  
I

F  

Isd  
Vgs  
dI/dt  
I

RM  

+
Vdd  
VDC  
Vdd  
–
Vds  
Rev.1.0: August 2013  
Page 6 of 6