Alpha—Omega-Semicon-AONS21321

Part #Alpha—Omega-Semicon-AONS21321
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Alpha—Omega-Semicon-AONS21321
AONS21321  
30V P-Channel MOSFET  
General Description  
Product Summary  
V

DS  

• Latest Advanced Trench Technology  
• Low R

DS(ON)  

• High Current Capability  
-30V  
I

D

(at V

GS

=-10V)  
R

DS(ON)

(at V

GS

=-10V)  
-24A  
< 16.5mΩ  
< 29.5mΩ  
• RoHS and Halogen-Free Compliant  
R

DS(ON)

(at V

GS

=-4.5V)  
Applications  
100% UIS Tested  
100% Rg
 
Tested  
• Notebook AC-in Load Switch  
• Battery Protection Charge/Discharge  
DFN5X6  
Top View  
Bottom View  
Top View  
D
1
8
2
3
7
6
4
5
G
PIN1  
PIN1  
S
Orderable Part Number  
Package Type  
Form  
Tape & Reel  
Minimum Order Quantity  
AONS21321  
DFN 5×6  
3000  
Absolute Maximum Ratings
 
T

A

=25°C unless otherwise noted  
Parameter  
Symbol  
V

DS  

Maximum  
-30  
Units  
Drain-Source Voltage  
Gate-Source Voltage  
V
V
V

GS  

±25  
-24  
T

C

=25°C  
Continuous Drain  
Current

G  

Pulsed Drain Current

C  

I

D  

T

C

=100°C  
A
-20  
I

DM  

-66  
T

A

=25°C  
T

A

=70°C  
-14  
Continuous Drain  
Current  
I

DSM  

A
-11  
Avalanche Current

C  

I

AS  

25  
A
C
Avalanche energy  
L=0.1mH  
T

C

=25°C  
T

C

=100°C  
T

A

=25°C  
T

A

=70°C  
E

AS  

31  
mJ  
24.5  
9.8  
P

D  

W
Power Dissipation

B  

Power Dissipation

A  

5
P

DSM  

W
3.2  
Junction and Storage Temperature Range  
T

J

, T

STG  

-55 to 150  
°C  
Thermal Characteristics  
Parameter  
Symbol  
Typ  
20  
Max  
Units  
°C/W  
°C/W  
°C/W  
Maximum Junction-to-Ambient

A  

t ≤
 
10s  
25  
55  
R

θ
JA  

Maximum Junction-to-Ambient

A D  

Maximum Junction-to-Case  
Steady-State  
Steady-State  
45  
R

θ
JC  

4.1  
5.1  
Rev.1.0: November 2017  
Page 1 of 6  

AONS21321  
Electrical Characteristics (T

J

=25°C unless otherwise noted)  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
Units  
STATIC PARAMETERS  
I

D

=-250
µ
A, V

GS

=0V  
BV

DSS  

Drain-Source Breakdown Voltage  
-30  
V
V

DS

=-30V, V

GS

=0V  
-1  
I

DSS  

Zero Gate Voltage Drain Current  
µA  
T

J

=55°C  
-5  
V

DS

=0V, V

GS

=±25V  
I

GSS  

Gate-Body leakage current  
Gate Threshold Voltage  
±100  
-2.3  
16.5  
23.5  
29.5  
nA  
V
V

GS(th)  

V

DS

=V

GS,

I

D

=-250
µ
A  
-1.3  
-1.8  
13.5  
19.5  
23  
V

GS

=-10V, I

D

=-20A  
mΩ  
R

DS(ON)  

Static Drain-Source On-Resistance  
T

J

=125°C  
V

GS

=-4.5V, I

D

=-10A  
V

DS

=-5V, I

D

=-20A  
I

S

=-1A, V

GS

=0V  
mΩ  
S
g

FS  

V

SD  

I

S  

Forward Transconductance  
Diode Forward Voltage  
30  
-0.72  
-1  
V
Maximum Body-Diode Continuous Current

G  

-24  
A
DYNAMIC PARAMETERS  
C

iss  

C

oss  

C

rss  

R

g  

Input Capacitance  
1180  
185  
155  
5
pF  
pF  
pF  
Ω
V

GS

=0V, V

DS

=-15V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
f=1MHz  
10  
SWITCHING PARAMETERS  
Q

g

(10V)  
Q

g

(4.5V)  
Q

gs  

Q

gd  

t

D(on)  

t

r  

Total Gate Charge  
21  
11  
6
34  
18  
nC  
nC  
nC  
nC  
ns  
Total Gate Charge  
V

GS

=-10V, V

DS

=-15V, I

D

=-20A  
Gate Source Charge  
Gate Drain Charge  
3
Turn-On DelayTime  
10.5  
8.5  
30  
11.5  
13  
23  
V

GS

=-10V, V

DS

=-15V,  
Turn-On Rise Time  
ns  
R

L

=0.75
Ω
, R

GEN

=3
Ω  
t

D(off)  

t

f  

Turn-Off DelayTime  
ns  
Turn-Off Fall Time  
ns  
t

rr  

I

F

=-20A, di/dt=500A/
µ
s  
I

F

=-20A, di/dt=500A/
µ
s  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
ns  
Q

rr  

nC  
A. The value of R

θ
JA

is measured with the device mounted on 1in

2

FR-4 board with 2oz. Copper, in a still air environment with T

A

=25
°
C. The Power  
dissipation P

DSM

is based on R

θ
JA

t≤ 10s and the maximum allowed junction temperature of 150
°
C. The value in any given application depends on  
the user’s specific board design.  
B. The power dissipation P

D

is based on T

J(MAX)

=150
°
C, using junction-to-case thermal resistance, and is more useful in setting the upper  
dissipation limit for cases where additional heatsinking is used.  
C. Single pulse width limited by junction temperature T

J(MAX)

=150
°
C.  
D. The R

θ
JA

is the sum of the thermal impedance from junction to case R

θ
JC

and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300
µ
s pulses, duty cycle 0.5% max.  
F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming a  
maximum junction temperature of T

J(MAX)

=150
°
C. The SOA curve provides a single pulse rating.  
G. The maximum current rating is package limited.  
H. These tests are performed with the device mounted on 1 in

2

FR-4 board with 2oz. Copper, in a still air environment with T

A

=25
°
C.  
APPLICATIONS OR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT  
ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS.
 
AOS RESERVES THE RIGHT TO IMPROVE  
PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE.  
Rev.1.0: November 2017  
Page 2 of 6  

AONS21321  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
60  
60  
45  
30  
15  
0
-10V  
V

DS

=-5V  
-4.5V  
45  
-4V  
30  
125
°
C  
-3.5V  
15  
25
°
C  
V

GS

=-3V  
0
0
1
2
3
4
5
6
0
1
2
3
4
5
-V

GS

(Volts)  
-V

DS

(Volts)  
Figure 2: Transfer Characteristics (Note E)  
Figure 1: On-Region Characteristics (Note E)  
40  
30  
20  
10  
0
1.6  
1.4  
1.2  
1
V

GS

=-10V  
I

D

=-20A  
V

GS

=-4.5V  
V

GS

=-4.5V  
I

D

=-10A  
V

GS

=-10V  
0.8  
0
25  
50  
75  
100  
125  
150  
175  
0
5
10  
15  
-I

D

(A)  
20  
25  
30  
Temperature (°C)  
Figure 4: On-Resistance vs. Junction Temperature  
(Note E)  
Figure 3: On-Resistance vs. Drain Current and Gate  
Voltage (Note E)  
70  
60  
50  
40  
30  
20  
10  
0
1.0E+01  
1.0E+00  
1.0E-01  
1.0E-02  
1.0E-03  
1.0E-04  
1.0E-05  
I

D

=-20A  
125
°
C  
125
°
C  
25
°
C  
25
°
C  
2
4
6
8
10  
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
-V

SD

(Volts)  
Figure 6: Body-Diode Characteristics  
(Note E)  
-V

GS

(Volts)  
Figure 5: On-Resistance vs. Gate-Source Voltage  
(Note E)  
Rev.1.0: November 2017  
Page 3 of 6  

AONS21321  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
10  
2000  
V

DS

=-15V  
I

D

=-20A  
8
1500  
1000  
500  
0
C

iss  

6
4
2
C

oss  

C

rss  

0
0
5
10  
Q

g

(nC)  
15  
20  
25  
0
5
10  
15  
20  
25  
30  
-V

DS

(Volts)  
Figure 8: Capacitance Characteristics  
Figure 7: Gate-Charge Characteristics  
500  
100.0  
10.0  
1.0  
T

J(Max)

=150
°
C  
T

C

=25
°
C  
10
µ
s  
400  
300  
200  
100  
0
R

DS(ON)  

limited  
100
µ
s  
DC  
1ms  
10ms  
0.1  
T

J(Max)

=150
°
C  
T

C

=25
°
C  
0.0  
1E-05 0.0001 0.001
 
0.01  
0.1  
1
10  
100  
0.01  
0.1  
1
10  
100  
Pulse Width (s)  
Figure 10: Single Pulse Power Rating Junction-to-  
Case (Note F)  
-V

DS

(Volts)  
-V

GS

> or equal to -4.5V  
Figure 9: Maximum Forward Biased Safe  
Operating Area (Note F)  
10  
1
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
D=T

on

/T  
T

J,PK

=T

C

+P

DM

.Z

θ
JC

.R

θ
JC  

θ
JC

=5.1
°
C/W  
R
Single Pulse  
P

DM  

0.1  
0.01  
T

on  

T
1E-05  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
Pulse Width (s)  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
Rev.1.0: November 2017  
Page 4 of 6  

AONS21321  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
30  
30  
24  
18  
12  
6
24  
18  
12  
6
0
0
0
25  
50  
75  
100  
125  
150  
0
25  
50  
75  
100  
125  
150  
T

CASE

(
°
C)  
T

CASE

(
°
C)  
Figure 12: Power De-rating (Note F)  
Figure 13: Current De-rating (Note F)  
10000  
1000  
100  
10  
T

A

=25
°
C  
1
1E-05  
0.001  
0.1  
Pulse Width (s)  
10  
1000  
Figure 14: Single Pulse Power Rating Junction-to-Ambient (Note H)  
10  
1
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
D=T

on

/T  
T

J,PK

=T

A

+P

DM

.Z

θ
JA

.R

θ
JA  

θ
JA

=55
°
C/W  
R
0.1  
P

DM  

0.01  
0.001  
Single Pulse  
0.01  
T

on  

T
0.0001  
0.001  
0.1  
1
10  
100  
1000  
Pulse Width (s)  
Figure 15: Normalized Maximum Transient Thermal Impedance (Note H)  
Rev.1.0: November 2017  
Page 5 of 6  

AONS21321  
Gate Charge Test Circuit & Waveform  
Vgs  
Qg  
–
-10V  
–
VDC  
Qgs  
Qgd  
+
Vds  
VDC  
+
DUT  
Vgs  
Ig  
Charge  
Resistive Switching Test Circuit & Waveforms  
RL  
Vds  
t

off  

t

on  

t
t

d(off)  

t

d(on)  

t
r
f
Vgs  
–
90%  
10%  
DUT  
Vdd  
Vgs  
VDC  
+
Rg  
Vgs  
Vds  
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms  
E

AR

= 1/2 LI

A

2

R  

L
Vds  
Id  
Vds  
–
BV

DSS  

Vgs  
Vdd  
Vgs  
VDC  
+
Id  
Rg  
I

AR  

DUT  
Vgs  
Vgs  
Diode Recovery Test Circuit & Waveforms  
Q

rr

= –
 
Idt  
Vds +  
Vds –  
Ig  
DUT  
Vgs  
t

rr  

L
-Isd  
-I

F  

Isd  
Vgs  
dI/dt  
-I

RM  

+
Vdd  
VDC  
Vdd  
–
-Vds  
Rev.1.0: November 2017  
Page 6 of 6