Alpha—Omega-Semicon-AOW482
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AOW482
80V N-Channel
MOSFET
SDMOS
TM
General Description
Product Summary
The AOW482 is fabricated with SDMOS
TM
trench
technology that combines excellent R
DS(ON)
with low gate
charge and low Q
rr
.The result is outstanding efficiency
with controlled switching behavior. This universal
technology is well suited for PWM, load switching and
general purpose applications.
V
DS
80V
I
D
(at V
GS
=10V)
R
DS(ON)
(at V
GS
=10V)
R
DS(ON)
(at V
GS
= 7V)
105A
< 7.2m
Ω
< 9m
Ω
100% UIS Tested
100% R
g
Tested
TO-262
D
Top View
Bottom View
G
G
S
D
D
S
G
S
Absolute Maximum Ratings
T
A
=25
°
C
u
nless otherwise noted
Parameter
Symbol
V
DS
Maximum
Units
Drain-Source Voltage
Gate-Source Voltage
80
±25
105
82
V
V
V
GS
T
C
=25
°
C
Continuous Drain
Current
G
Pulsed Drain Current
C
I
D
T
C
=100
°
C
A
A
I
DM
330
11
T
A
=25
°
C
T
A
=70
°
C
Continuous Drain
Current
Avalanche Current
C
Avalanche energy L=0.1mH
C
I
DSM
9
I
AS
, I
AR
82
A
E
AS
, E
AR
336
333
167
2.1
mJ
T
C
=25
°
C
P
D
W
Power Dissipation
B
T
C
=100
°
C
T
A
=25
°
C
P
DSM
W
°C
Power Dissipation
A
1.3
T
A
=70
°
C
Junction and Storage Temperature Range
T
J
, T
STG
-55 to 175
Thermal Characteristics
Parameter
Symbol
Typ
11
Max
Units
°
C
/W
°
C
/W
°
C
/W
Maximum Junction-to-Ambient
A
Maximum Junction-to-Ambient
A D
Maximum Junction-to-Case
t
≤
10s
15
60
R
θ
JA
Steady-State
Steady-State
47
R
θ
JC
0.36
0.45
Rev0: June 2010
Page 1 of 7
AOW482
Electrical Characteristics (T
J
=25
°
C
u
nless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
STATIC PARAMETERS
I
D
=250
µ
A, V
GS
=0V
BV
DSS
Drain-Source Breakdown Voltage
80
V
V
DS
=80V, V
GS
=0V
10
50
I
DSS
Zero Gate Voltage Drain Current
µ
A
T
J
=55
°
C
V
DS
=0V, V
GS
= ±25V
V
DS
=V
GS
I
D
=250
µ
A
V
GS
=10V, V
DS
=5V
V
GS
=10V, I
D
=20A
I
GSS
Gate-Body leakage current
Gate Threshold Voltage
On state drain current
100
3.7
nA
V
V
GS(th)
I
D(ON)
2.5
3.1
330
A
5.9
11
7.2
13
m
Ω
T
J
=125
°
C
R
DS(ON)
Static Drain-Source On-Resistance
V
GS
=7V, I
D
=20A
6.8
50
9
m
Ω
V
DS
=5V, I
D
=20A
I
S
=1A,V
GS
=0V
Maximum Body-Diode Continuous Current
G
g
FS
V
SD
I
S
Forward Transconductance
Diode Forward Voltage
S
0.64
1
V
A
105
DYNAMIC PARAMETERS
C
iss
C
oss
C
rss
R
g
Input Capacitance
3240
320
95
4054
458
4870
600
225
0.7
pF
pF
pF
Ω
V
GS
=0V, V
DS
=40V, f=1MHz
Output Capacitance
Reverse Transfer Capacitance
Gate resistance
160
V
GS
=0V, V
DS
=0V, f=1MHz
V
GS
=10V, V
DS
=40V, I
D
=20A
0.2
0.45
SWITCHING PARAMETERS
Q
g
(10V) Total
Gate Charge
53
16
12
66.8
20.8
20.2
26
81
25
30
nC
nC
nC
ns
ns
ns
ns
Q
gs
Q
gd
t
D(on)
t
r
Gate Source Charge
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
V
GS
=10V, V
DS
=40V, R
L
=2
Ω
,
R
GEN
=3
Ω
18
t
D(off)
t
f
48
21
t
rr
I
F
=20A, dI/dt=500A/
µ
s
I
F
=20A, dI/dt=500A/
µ
s
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
18
75
26
34
ns
Q
rr
nC
108
140
A. The value of R
θ
JA
is measured with the device mounted on 1in
2
FR-4 board with 2oz. Copper, in a still air environment with T
A
=25
°
C
. The Power
dissipation P
DSM
is based on R
θ
JA
and the maximum allowed junction temperature of 150
°
C
. The value in any given application depends on
the
user’s specific board design, and the maximum temperature of 175
°
C
m
ay be used if the PCB allows it.
B. The power dissipation P
D
is based on T
J(MAX)
=175
°
C
, using junction-to-case thermal resistance,
and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature T
J(MAX)
=175
°
C
. Ratings are based on low frequency and duty
cycles to keep initial
T
J
=25
°
C
.
D. The R
θ
JA
is the sum of the thermal impedence from junction to case R
θ
JC
and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300
µ
s pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a
maximum junction temperature of T
J(MAX)
=175
°
C
. The SOA curve provides a single pulse ratin g.
G. The maximum current rating is package limited.
H. These tests are performed with the device mounted on 1 in
2
FR-4 board with 2oz. Copper, in a still air environment with T
A
=25
°
C
.
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS.
AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev0: June 2010
Page 2 of 7
AOW482
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
100
80
60
40
20
0
100
80
60
40
20
0
10V
V
DS
=5V
7V
6V
5.5V
125
°
C
V
GS
=5V
25
°
C
3
4
5
6
7
0
1
2
3
4
5
V
GS
(Volts)
V
DS
(Volts)
Figure 2: Transfer Characteristics (Note E)
Fig 1: On-Region Characteristics (Note E)
12
10
8
2.4
2.2
2
V
GS
=10V
I
D
=20A
V
GS
=7V
1.8
1.6
1.4
1.2
1
6
V
GS
=10V
V
GS
=7V
I
D
=20A
4
0.8
2
0
25
50
75
100 125 150 175 200
0
5
10
15
20
25
30
I
D
(A)
Temperature (
°
C
)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
16
14
12
10
8
1.0E+02
1.0E+01
I
D
=20A
125
°
C
125
°
C
1.0E+00
1.0E-01
1.0E-02
1.0E-03
1.0E-04
25
°
C
25
°
C
6
4
5
6
7
8
9
10
0.0
0.2
0.4
SD
(Volts)
Figure 6: Body-Diode Characteristics (Note E)
0.6
0.8
1.0
V
GS
(Volts)
V
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Rev0: June 2010
Page 3 of 7
AOW482
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
6000
10
V
DS
=40V
I
D
=20A
5000
4000
3000
2000
1000
0
8
C
iss
6
4
C
oss
2
C
rss
30
0
0
10
20
30
40
50
60
70
0
10
20
40
DS
(Volts)
50
60
70
80
Q
g
(nC)
V
Figure 7: Gate-Charge Characteristics
Figure 8: Capacitance Characteristics
5000
4000
3000
2000
1000
0
1000.0
100.0
10.0
1.0
10
µ
s
R
DS(ON)
limited
T
J(Max)
=175
°
C
T
C
=25
°
C
100
µ
s
1ms
DC
10ms
T
J(Max)
=175
°
C
T
C
=25
°
C
0.1
0.0
0.01
0.1
1
10
100
1000
1E-05 0.0001 0.001
0.01
0.1
1
10
V
DS
(Volts)
Pulse Width (s)
Figure 10: Single Pulse Power Rating Ju
n
c
tion-to-Case
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
(Note F)
10
1
D=T
on
/T
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
T
J,PK
=T
C
+P
DM
.Z
θ
JC
.R
θ
JC
R
θ
JC
=0.45
°
C
/W
0.1
P
D
0.01
T
on
T
Single Pulse
0.00001 0.0001
0.001
0.000001
0.001
0.01
0.1
1
10
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Rev0: June 2010
Page 4 of 7
AOW482
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
1000
350
300
T
A
=25
°
C
T
A
=100
°
C
250
100
200
T
A
=150
°
C
150
T
A
=125
°
C
10
100
50
1
0
1
10
100
1000
0
25
50
75
100
125
150
175
Time in avalanche, t
A
(
µ
s)
T
CASE
(
°
C
)
Figure 12: Single Pulse Avalanche capability (Note
C)
Figure 13: Power De-rating (Note F)
1000
100
10
120
100
80
60
40
20
0
T
A
=25
°
C
1
0.01
1
100
0
25
50
75
T
CASE
(
°
C
)
Figure 14: Current De-rating (Note F)
100
125
150
175
Pulse Width (s)
Figure 15: Single Pulse Power Rating Junction-to-
Ambient (Note H)
10
1
D=T
on
/T
T
J,PK
=T
A
+P
DM
.Z
θ
JA
.R
θ
JA
θ
JA
=60
°
C
/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
R
0.1
P
D
0.01
0.001
Single Pulse
T
on
T
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)
Rev0: June 2010
Page 5 of 7
AOW482
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
240
200
160
120
80
50
45
40
35
30
25
20
15
10
5
35
30
25
20
15
10
5
3
di/dt=800A/
µ
s
125ºC
di/dt=800A/
µ
s
2.5
2
125ºC
25ºC
t
rr
Q
rr
25ºC
1.5
1
125ºC
25ºC
S
I
rm
40
25ºC
0.5
125º
20
0
0
0
0
0
5
10
15
20
25
30
0
5
10
15
25
30
I
S
(A)
I
S
(A)
Figure 17: Diode Reverse Recovery Charge and Peak
Current vs. Conduction Current
Figure 18: Diode Reverse Recovery Time and
Softness Factor vs. Conduction Current
250
50
40
30
20
10
0
50
40
30
20
10
0
2.5
2
I
s
=20A
I
s
=20A
200
150
100
50
125ºC
125ºC
1.5
1
t
rr
25ºC
125ºC
25ºC
Q
rr
25ºC
S
0.5
I
rm
25ºC
125ºC
0
0
0
200
400
600
800
1000
0
200
400
600
800
1000
di/dt (A/
µ
s)
di/dt (A/
µ
s)
Figure 19: Diode Reverse Recovery Charge and
Peak Current vs. di/dt
Figure 20: Diode Reverse Recovery Time and
Softness Factor vs. di/dt
Rev0: June 2010
Page 6 of 7
AOW482
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
VDC
+
Qgs
Qgd
Vds
VDC
–
–
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
90%
10%
+
DUT
Vdd
Vgs
VDC
Rg
–
Vgs
Vgs
t
d(on)
t
r
t
d(off)
t
f
t
on
t
off
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
E
AR
= 1/2 L
I
A
2
R
BV
DSS
Vds
Id
Vgs
Vds
+
Vgs
Vdd
I
AR
VDC
Id
Rg
–
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q
rr
= –
Idt
Vds +
Vds –
Ig
DUT
Vgs
t
rr
L
Isd
I
F
Isd
Vgs
dI/dt
I
RM
+
Vdd
VDC
Vdd
–
Vds
Rev0: June 2010
Page 7 of 7
