amsem-2N7002KDW

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amsem-2N7002KDW
2N7002KDW  
60V N-Channel Enhancement Mode MOSFET – ESD Protected  
SOT-363  
Unit: inch (mm)  
FEATURES  
• R

DS(ON)

, V

GS

@10V,I

DS

@500mA=3
Ω
 
• R

DS(ON)

, V

GS

@4.5V,I

DS

@200mA=4
Ω  
0.054(1.35)  
0.045(1.15)  
• Advanced Trench Process
T
echnology  
• High Density Cell Design For Ultra Low On-Resistance  
• Very Low Leakage Current In Off Condition  
• Specially Designed for Battery Operated Systems, Solid-State Relays  
Drivers : Relays, Displays, Lamps, Solenoids, Memories, etc.  
• ESD Protected 2KV HBM  
0.040(1.00)  
0.031(0.80)  
• In compliance with EU RoHS 2002/95/EC directives  
0.10 MAX.  
0.018(0.45)  
0.006(0.15)  
MECHANICALDATA  
0.087(2.20)  
0.078(2.00)  
• Case: SOT-363 Package  
6
1
5
2
4
3
•
T
e
rminals : Solderable per MIL-STD-750,Method 2026  
• Marking : K27  
Maximum RATINGS
 
and Thermal Characteristics
 
(T

A

=25

O

C unless
 
otherwise noted )  
PARAMETER  
Drain-Source Voltage  
Symbol  
V

D
S  

Limit  
60  
Units  
V
Gate-Source Voltage  
V

G
S  

I

D  

+20  
115  
800  
V
Continuous Drain Current  
mA  
mA  
1)  
Pulsed Drain Current  
I

D
M  

T

A

=
25

O

C  
T

A

=
75

O

C  
200  
120  
Maximum Power Dissipation  
P

D  

T

J

,
T

S
TG  

R

θ
J
A  

mW  

O

C  
Operating Junction and Storage  
T
e
mperature Range  
-55 to + 150  
625  
Junction-to Ambient Thermal  
Resistance(PCB mounted)

2  

O

C
/W  
Note: 1. Maximum DC current limited by the package  
2. Surface mounted on FR4 board, t
 
< 5 sec  
Document Number:810525  
Revision:18-Oct-19  
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1

2N7002KDW  
60V N-Channel Enhancement Mode MOSFET – ESD Protected  
ELECTRICALCHARACTERISTICS  
Parameter  
S
y
mbol  
T
e
st Condition  
Min.  
Ty
p
.  
Max.  
Units  
Static  
Drain-Source Breakdown  
Voltage  
BV

D
SS  

V

G
S(th)  

R

D
S(on)  

R

D
S(on)  

I

D
SS  

V

G
S

=
0V, I

D

=
10uA  
V

D
S

=
V

G
S

, I

D

=
250uA  
V

GS

=4.5V, I

D

=200mA  
V

GS

=10V, I

D

=500mA  
V

DS

=60V, V

GS

=0V  
60  
–
–
–
–
–
–
–
–
2.5  
4.0  
3.0  
1
V
V
Gate Threshold Voltage  
1
Drain-Source On-State  
Resistance  
–
Ω
Drain-Source On-State  
Resistance  
–
Zero Gate Voltage Drain  
C
u
rrent  
–
–
uA  
uA  
Gate Body Leakage  
Forward
T
ransconductance  
D
y
namic  
I

G
SS  

V

G
S

=
+20V, V

D
S

=
0V  
V

D
S

=
15V, I

D

=
250mA  
+10  
–
g

fS  

100  
mS  
V

D
S

=
15V, I

D

=
200mA  
V

GS

=4.5V  
T
o
tal Gate Charge  
Q

g  

–
–
0.8  
nC  
ns  
Turn-On Delay Time  
Turn-Off Delay Time  
Input Capacitance  
Output Capacitance  
t

o
n  

t

o
ff  

–
–
–
–
–
–
–
–
–
–
20  
40  
35  
10  
5
V

DD

=30V , R

L

=150
Ω  
I

D

=200mA , V

GEN

=10V  
R

G

=10
Ω  
C

i
ss  

C

o
ss  

C

r
ss  

V

D
S

=
25V, V

G
S

=
0V  
f=1.0MH

Z  

pF  
Reverse Transfer  
Capacitance  
Source-Drain Diode  
Diode Forward Voltage  
V

S
D  

I

s  

I

S

=
200mA , V

G
S

=
0V  
–
–
–
0.82  
1.3  
115  
800  
V
Continuous Diode Forward  
C
u
rrent  
–
–
–
–
mA  
mA  
Pulsed Diode Forward  
C
u
rrent  
I

s
M  

V
DD  
V
DD  
Switching  
Gate Charge  
Test Circuit  
Test Circuit  
R
L  
R
L  
V
IN  
V
GS  
V
OUT  
1mA  
R
G  
R
G  
Document Number:810525  
Revision:18-Oct-19  
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有限公司  
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2

2N7002KDW  
60V N-Channel Enhancement Mode MOSFET – ESD Protected  
Typical
C
C
h
h
a
a
r
r
a
a
c
c
t
t
e
e
r
r
i
i
s
s
t
t
i
i
c
c
s
s Curves (T

A

=25

O

C,unless otherwise noted)  
1.2  
1
1.2  
1
V
DS
=10V  
= 10V ~ 6.0V  

G

S

5.0V  
4.0V  
0.8  
0.6  
0.4  
0.2  
0
0.8  
0.6  
0.4  
0.2  
0
4.0V  
T
J
=25
℃
 
3.0V  
3.0V  
0
1
2
3
4
5
6
0
1
2
3
4
5
V

GS

– Gate-to-Source Voltage (V)  
V

DS

– Drain-to-Source Voltage (V)  

F

I

G

.
1

–

O

u

t
p

u

t

Characteristic  
FIG.2- Transfer Characteristic  
5
4
3
2
1
0
5
4
3
2
1
0
V

GS

= 4.5V  
I

D

=500
m
A  

I
D
=200mA  
V
GS
=10V  
2
3
4
5
6
7
8
9
10  
0
0.2  
0.4  
0.6  
0.8  
1
V

GS

– Gate-to-Source Voltage (V)  
I

D

– Drain Current (A)  
FIG.3- On
 
Resistance vs Drain Current  
FIG.4- On
 
Resistance vs Gate to Source Voltage  
1.8  
V

GS

=10V  
I

D

=500mA  
1.6  
1.4  
1.2  
1
0.8  
0.6  
-50 -25  
0
25  
50  
75 100
 
125 150  
T

J

– Junction Temperature (

o

C)  
FIG.5- On
 
Resistance vs Junction
T
e
mperature  
Document Number:810525  
Revision:18-Oct-19  
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3

2N7002KDW  
60V N-Channel Enhancement Mode MOSFET – ESD Protected  
10  
V
DS
=10V  
Vgs  
I
D
=250mA  
Qg  
8
6
4
2
0
Qsw  
Vgs(th)  
Qg(th)  
0
0.2  
0.4  
0.6  
0.8  
1
Q

g

– Gate Charge (nC)  
Qgs  
Qgd  
Qg  
Fig.6 – Gate Charge Waveform  
Fig.7 – Gate Charge  
1.2  
88  
86  
84  
82  
80  
78  
76  
74  
72  
I

D

=250
m
A  
ID = 250uA  
1.1  
1
0.9  
0.8  
0.7  
-50 -25  
0
25  
50  
75 100
 
125 150  
-50 -25  
0
25  
50  
75 100
 
125 150  
T

J

– Junction Temperature (

o

C)  
T

J

– Junction Temperature (

o

C)  
Fig.8 – Threshold Voltage vs
T
e
mperature  
Fig.9 –
 
Breakdown Voltage vs Junction
T
e
mperature  
10  
V
GS
=0V  
1
25  
℃
0.1  
T
J
=125
℃
 
-55
℃  
0.01  
0.2  
0.4  
0.6  
0.8  
1
1.2  
1.4  
1.6  
V

SD

– Source-to-Drain Voltage (V)  
Fig.10 – Source-Drain Diode Forward Voltage  
Document Number:810525  
Revision:18-Oct-19  
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4

2N7002KDW  
60V N-Channel Enhancement Mode MOSFET – ESD Protected  
MOUNTING PAD LAYOUT  
ORDER INFORMATION  
• Packing
 
information  
T/R – 10K per 13″ plastic Reel  
T/R – 3K per 7” plastic Reel  
Document Number:810525  
Revision:18-Oct-19  
安徽安
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有限公司  
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5