Analog-Devices-AD6190ARSRL
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a
900
M
Hz RF T
r
anscei
v
e
r
AD
6
190
T he
receiver section includes a Low
N
oise Amplifier (L
N
A
).
T he
LNA
’
s output drives an image-reject mixer; the mixer’s
output optimized for 10.7 MHz is filtered and processed by the
li
m
i
ting IF amplifier.
FEATURES
C
o
m p
l
e
te
900 MHz RF Transceiver
L
N
A
R
e
ce
i
ve Mixer
Transm it
Mixer
Driver Am
plifier
VCO
Prescaler
Lim i
t
er
A
m
p
l
ifi
e
r
w
i
t
h
R
S
SI
On-Chip
L
o
w
D
ropout Regulator
I
n
dependent S
l
e
ep Modes
f
o
r
T
X, RX
28-
L
e
ad SSOP Package
T he
transmit section accepts a modulated 10.7 MHz IF input,
and uses an image-reject upconve
ter to mix the signal up to the
902 MH
z
–928
M
Hz RF carrie
equency while suppressing the
unwanted image and LO co
onents
T he
RF output is raised
to a nominal 0.5 milliwatt
dBm
output level. T
his output
can be used directly or
an dr
n extern
power amplifier to
higher levels.
T he
on-chip VC
op
tes at 2
×
th
ocal oscillator frequency.
T his
reduces oscillator p
ing due to strong interferers in-band
or transmi
r leakage. An
chip 64/65 prescaler allows the
V
C
O to
e controlled by a low cost 15 M
H
z
CMOS
s
ynthesizer.
APP
L
ICATIONS
902 MHz–928 MHz
I
S
M
B
a
nd
C
o
rd
l
e
ss
T
e
l
e
phones
902 MHz–928 MHz
I
S
M
B
a
nd W
i
reless Data System
s
An on
ip l
dropout regulator minimizes VCO pushing. T
he
transmit
on, rec
e section, or both, can be placed in a low
current SLE
m
e when not in use. T
he AD6190 900 MHz
RF transceiver
packaged in a 28-lead SSOP package.
GENERAL D
ESCRIP TIO N
T he
A
D
6190 900 MHz
RF T
ransceiver provides a complete
RF/IF section for systems operating in the 902 M
H
z
–928
M
Hz
license-free ISM band.
T
he h
i
gh level of integration allows several
dozen discrete components to be replaced. It is ideally suited
for use in cordless telephone and wireless data applicat
he A
D
61
900 MHz RF T
ransceiver is part of the Analog
D
ices/
log “A-to-Z
Phone” Spread-Spectrum System for
cord
telephone and data communications applications. Con-
tact Zilog directly at (408) 370-8000 for more information on
he Z87000 series baseband controller chips.
F
C
TIO NAL
BLO CK
D IAGRAM
10.7
10.7
RSSI
0
90
FIL
LIMOUT
VREG
AD6190
TXON
RXON
VCO
POWER
Z87L00
SPREAD-
SPECTRUM
CONTROLLER
MANAGEMENT
AND
CONTROL
/2
VCOON
PA
I
Q
VBATT
64/65
VOLTAGE
REGULATOR
VREG
0
90
10.7
15MHz SYNTHESIZER
REV. 0
I
n
f
o
rm ation
furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assum ed by Analog Devices for its
use, nor
f
o
r any
i
n
f
ri
n
gem
ents of patents or other r
i
g
hts of th
i
rd parties
wh
i
ch m
ay result from its use. No license is granted by im
plication or
otherw
i
s
e under any patent or patent r
i
g
hts of
A
n
a
l
o
g
D
e
vices.
One Technology Way, P.O. Box 9106, Norw ood, MA 02062-9106,
U.S.A.
T
e
l
: 781/ 329-4700
F
a
x: 781/ 326-8703
World Wide Web Site: http:/
/ w w w .analog.com
© A
n
a
l
o
g
D
e
vices,
I
n
c., 1998
(@ T
=
+
2
5
؇
C
, V
=
+
3
.3
V
, F
=
1
0.7
M
H
z
, F
R
F
= 902
M
H
z
–928
M
H
z
,
T
X
I
F Input
A
CC
IF
level 137 mV
p-p, unless
other
w
i
se noted)
AD
6
190–SP
E
C
I
FI
C
A
T
I
O
NS
P
a
ram eter
Conditions
Min
Typ
Max
Units
RECEIVE RF SECT
ION
(LNA to Mixer Output)
Power Gain
Source Z = 50
Ω
, IF Load Z = 330
Ω
24
dB
dB
dBm
dBm
dBc
Noise Figure
1 dB Compression (Input)
Input IP3
Image Rejection
4.2
–30
–17
33
F
RF
= 915 MH
z
,
F
LO
= 904.3 MHz
28
35
T RA
N
SMIT
UPCON
V
ERT ER
Image Rejection
LO Feedthrough
F
IF
= 10.7 MHz, F
LO
= 904.3 MHz
F
IF
= 10.7 MHz, F
LO
= 904.3 MHz
48
–33
dBc
dBm
DRIVER AMPLIFIER
Nominal Output Power
1 dB Compression
For IF Input Level = 137 mV p-p
–3
+4.
dBm
dBm
0
V
C
O
Operating Frequency
(LO Frequency
×
2)
1783
1835
MHz
PRESCALER
D
i
vision Ratio
PREMOD = “1”
PREMOD = “0”
Output Level
6
1.0
R
L
= 2.2 k, C
L
< 10 pF
0.55
V p-p
IF LIMIT
ER AMPLIFIER
F
i
rst Stage Gain
24
dB
Second Stage Gain
AC
O
utput Level
DC Le
v
el
70
dB
mV p-p
V
Ω
R
L
> 30 k
Ω
,
C
L
< 30 pF
450
1.76
330
IF Port Impedance
F
IF
= 10.7 MHz
RSSI OUT
PUT
Slope
Output Voltage
With 10
Ω
in Ser
@ –100 dBm RF
@ –30 dBm RF I
22
m
V
/dB
V
V
0.90
2.40
70
Linear Range
(With Re
t to R
el)
dB
RSSI Log Conformance Error
±
2
dB
SUPPLY CURRENT
T ransmit
Mode
Receive
M
ode
(V
C
3.
T XON,
V
C
OON
1; RXON = 0
O
N,
V
C
OON
1; T
XON = 0
O
N,
V
C
N
, RXON = 0
93
59
270
mA
mA
µ
A
Sleep
M
ode
SUPPLY VOLT
AGE
Other Supplies
V
C
CIF,
V
C
CLNA
3.0
3.0
4.6
3.6
V
V
3.3
V
C
O REGULAT
OR
t Voltage, 3.0 < VBAT
T < 4.6 V
2.65
–20
2.85
+85
V
T EMPERAT URE
R
Specifications subject to ch
°
C
–2–
REV. 0
AD
6
190
ABSO LUTE
MAXIMUM RATINGS
1
Supply Voltage
NOT ES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. T his is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
VBAT T ,
V
C
CIF, LN
A
V
C
C,
V
C
CT
X to GND
. . . . +5.5 V
Maximum RF Input Level Without Damage
. . . . . . . +20 dBm
Internal Power Dissipation
2
. .
. . . . . . . . . . . . . . . . . .
500 mW
Operating T
emperature Range
. . . . . . . . . . .
–25
°
C to +85
°
C
Storage T
emperature Range
. . . . . . . . . . . .
–65
°
C to +150
°
C
Lead T
emperature Range
2
T hermal Characteristics: 28-lead SSOP package
θ
JA
= 122
°
C
/
W.
(Soldering, 60 sec)
. . . . . . . . . . . . . . . . . . . . . . . . . . +300
°
C
O
R
D ERING
GUID E
Model
P
a
ckage
D escription
P
a
ckage
O ption
A
D
6190ARS
28-Lead Shrink Small Outline
RS-28
A
D
6190ARSRL
28-Lead Shrink Small Outline, Supplied on Reels, 1500 Units per Reel
M
i
nimum order quantity 25,000 units.
CAUTIO N
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4
0 V readily
accumulate on the human body and test equipment and can discharge wi
out de
ection.
Although the AD
6190 features proprietary ESD protection circuitry, p
m
anen
d
amage
m
a
y
occur on devices subjected to high energy electrostatic dischar
h
erefo
proper ESD precautions are recommended to avoid performance degradatio
or lo
of
f
u
nctionality.
WA
R
N
I
N
G!
ESD SENSITIVE DEVICE
MODULUS CONTROL
TXON
82pF
VCOON
1nF
1.96k
⍀
VCCTX
(3.3VDC)
PRESCALER
82pF
1
10nF
82pF
82pF
OUT
R3
51.1
⍀
2pF
VCC DRIVER
(3.3VDC)
82pF
10nF
VBATT
(3.0-4.5VDC)
3
R
8.2nH
0.1
F
220
⍀
TRANSMIT
RF OUT
4
Q1
2.2pF
IN
nH
L1
1
5
1
10
⍀
TUNE
VOLTAGE IN
6
،
2
LIMITER OUT
82pF
82pF
L2
7
82pF
VCCLNA
(3.3VDC)
8
220
⍀
100nF
82pF
RSSI OUT
10nF
82pF
9
15nH
2.75 VDC
LNA IN
10
11
12
13
14
2.2pF
82pF
TRANSMIT
82pF
IF
IN
VCC MIXER
39
⍀
(3.3VDC)
301
⍀
54.9
⍀
10
⍀
100nF
82pF
6.8pF
RSSI
6.8
H
(TDK2012)
1k
⍀
F1
RXON
27pF
F1
U1
82pF
VCCIF
(3.3VDC)
10nF
100nF
10
⍀
82pF
Fi
g
ure 1.
Test Circuit
REV. 0
–3–
AD
6
190
P IN
FUNCTIO N
D ESCRIP TIO NS
Function
/
D escription
No.
P in
Nam e
Type
1
PREOUT
Output
Prescaler Output. Usually connected to input of external low frequency
CMOS
s
ynthesizer (Fujitsu
M
B
87006A, Siemens PMB2307, or similar).
Logic “1” turns on power to VCO, and divider/prescalers.
VBAT T
connection for regulator.
N
ormally connected to 3.3 V dc or battery.
Base connection to external regulator pass transistor (
M
M
B
T
3906 or similar).
Connection for VCO tank circuit (LC network).
Substrate ground connection.
Connection for VCO tank circuit (LC network).
Received Signal Strength Indicator output signal.
Accepts modulated transmit signal at 10.7 MHz I
Regulated VCC for LO from external pass tran
stor.
Logic “1” turns on power to LNA and receiv
ixer
ges.
Input to limiting amplifier.
2
3
4
5
6
7
8
9
10
11
12
13
14
V
C
OON
VBAT T
VBASE
T A
N
K–
GND
T A
N
K+
RSSI
T XIF
VREG
RXON
LIMIN
IFAMPCOM
IFAMPOUT
Control
Power
Power
Input
Power
Input
Output
Input
Power
Control
Input
Input
Output
Input signal common for limiting amp
er.
Output of first stage of IF amplifier
ally connec
through 10.7 MHz
filter to Pin 12 (LIMIN).
15
16
17
IFAMPIN
V
C
CIF
RXMIXOUT
Input
Power
Output
Input to first stage of IF ampl
er.
Local VCC connection for
amp/limiter stage
10.7 MHz IF Output. N
m
ally
nected through 10.7 MHz filter to IF
amplifier input (Pin 15).
18
19
20
21
22
23
24
25
26
27
28
LN
A
G
ND
GND
RFIN
V
C
CLNA
GND
LIMOUT
PAGND
RFOUT
V
C
CT X
T XON
Power
Power
Input
Local ground for LNA.
Substrate ground connection.
LNA Input. N
m
ally driven sing
-ended from 50
Ω
source impedance.
V
C
C
f
or L
N
A
.
Substra
ound c
ecti
Power
Power
Output
Power
Output
Power
Control
Input
10.7
r outp
Lo
A stage emitter. Degeneration may be added.
T r
tput signal at 0 dBm level.
Loc
ction for T
X stages.
Logic “
on power to transmit mixer, buffers, and PA stages.
P
caler
M
odulus control (HIGH = divide-by-64;
LOW = divide-by-65).
PREMOD
P IN
CO NFIGURATIO N
PREMOD
TXON
1
2
PREOUT
VCOON
VBATT
VBASE
TANK
؊
GND
28
27
26
3
VCCTX
4
25
RFOUT
24
PAGND
23
LIMOUT
22
GND
5
6
AD6190
TOP VIEW
7
TANK+
(Not to Scale)
8
21
20
19
18
17
16
15
RSSI
TXIF
VCCLNA
RFIN
9
10
11
VREG
RXON
LNAGND
LNAGND
RXMIXOUT
VCCIF
LIMIN
12
13
14
IFAMPCOM
IFAMPOUT
IFAMPIN
–4–
REV. 0
AD
6
190
1000
900
800
700
600
500
400
300
200
100
0
2.5
2.25
2.0
1.75
1.5
3.3V
+25
؇
C
915MHz
3.3V
–25
؇
C
915MHz
1.25
1.0
3.3V
+85
؇
C
915MHz
0.75
0.5
0.25
0
–25 –15
–5
5
15
25
35
5
55
65
75 85
–115 –105
–95 –85
–75 –65
–55 –45 –35 –25 –15
TE
AT
–
؇
C
PIN – dBm
Fi
g
ure 2. RSSI
V
o
l
tage vs.
I
n
put Power
Fi
g
ure 5.
L
im
it
e
r
tput
L
e
ve
s
.
T
p
erature @ 3.3 V
and 915 MHz
MKR 915.0 MHz
#A
dB
0.0 dBm
2.5
2.25
2.0
RKER
5.0 MHz
0 dBm
1.75
1.5
3.0V
+25
؇
C
915MHz
L.O.
3.3V
+25
؇
C
915MHz
1.25
1.0
IMAGE
3.5V
+25
؇
C
915MHz
0.75
0.5
0.25
0
–115 –105
–95 –85
–75 –65 –55
5 –35 –25 –15
CENTER 915.0 MHz
#RES BW 10 kHz
VBW 10 kHz
SPAN 150.0 MHz
SWP 4.50 sec
PIN – dBm
Fi
g
ure 3. RSSI
V
o
l
tage vs.
I
n
put Power
Fi
g
ure 6. Frequency Spectrum
Tek Run: 4.00GS/s ET Average
[
]
T
5.0
V: 72.0ns
@: –41.5ns
C1 Freq
13.899MHz
C1 +Duty
60.1%
4.0
3.0
2.0
1.0
0
–1.0
–2.0
–3.0
–4.0
–5.0
–115 –105
–95 –85
–75 –65 –55 –45 –35 –25 –15
Ch1 10.0mV
M 12.5ns Ch1
0V
PIN – dBm
Fi
g
ure 7. Prescaler Output
Fi
g
ure 4. RSSI
Error vs.
I
n
put Power
REV. 0
–5–
AD
6
190
P
R
O D UCT
D ESCRIP TIO N
T he
A
D
6190 is a complete RF/IF transceiver for operation in
the 902 MH
z–928 MH
z Industrial, Scientific and Medical
(“ISM”) frequency band. T
ogether with a suitable spread-
spectrum controller, the AD6190 can be used to design
a spread-spectrum system compliant with FCC “Part 15”
(47CFR15.247) regulations. T
he AD6190 is a fully compatible
companion chip to the Zilog Z87L00 “ZPhone” frequency-
hopping spread-spectrum controller.
LO
IF
OUT
RF
IN
AD6190
90
؇
90
؇
T he
A
D
6190 includes a receive path of LNA, image-reject
m
i
xer, IF amplifier and limiter amplifier with RSSI. T
he trans-
m
i
t path accepts a 10.7 MHz IF input signal, and uses image-
reject upconversion to the 902 M
H
z
–928
M
Hz band. Frequency
control is achieved using an on-chip VCO and dual-modulus
prescaler connected to an inexpensive low frequency PLL for
channel selection and frequency hopping.
Fi
g
ure 9.
I
m
a
ge
–
R
e
j
e
ct Mixer
T he
RF signal, containing both the
sired signal at (F
LO
+
F
IF
)
and another possible signal at the i
age frequency of (F
LO
– F
IF
) is
applied to two mixers in parall
hese
ixers are driven by
local oscillator signals in qu
dratu
he mixer
utputs at the
two mixer IF ports cont
both th
esire
ignal and the
i
m
age signal. H
oweve
e outputs o
two mixers are in
quadrature (shifted
0
d
e
s relative to each other). T
he
outputs of the tw
m
i
xers are
n shifted another 90 degrees
relative to eac
other in a phase-
ft
n
etwork. T
he two mixer
outputs th
contain
he desired signal and the image signal
exactly 180
gre
out of phase. By adding (or subtracting) the
two signals, th
ndesire
m
age signals cancel, the desired
signal componen
ad
and image-rejection occurs. Local oscil-
or leakage is supp
sed by the use of doubly-balanced mixers.
Additionally, an on-chip voltage regulator stabilizes the VCO to
prevent LO pushing due to power supply variations.
AP P LYING
TH E
AD 6190
Receive Signal P
ath
T he
A
D
6190 Low
Noise Amplifier (LNA) and image-reject
m
i
xer together provide downconverter with a total gain of 24 dB
and a typical Noise Figure (NF) of 4.2 dB.
T he
LNA input port exhibits an impedance of 320-j61 at
915 MH
z. In order to provide an optimum match to a 50
Ω
source, the network shown in Figure 8 should be used.
T h
uality of t
i
m
age rejection is a function of the phase and
ampli
e
m
ching of the quadrature branches of the LO and
phase
ft
n
etworks. In the AD6190, image-rejection is
ally 33 dB.
m
i
xer output that drives the input side of the first
7
M
Hz
f
ilter should also be connected through a parallel
RLC network of 6.8 pF, 1 k
Ω
, and 7 pF to the power supply to
match the 330
Ω
filter impedance.
82pF
50
⍀
RF IN
15nH
2.2pF
T he
10.7 MH
z IF signal is then filtered and amplified by a
24 dB fixed gain. T
he output of this stage is further filtered, and
applied to a 6-stage limiting amplifier. T
he limiter output signal
is typically 450 mV p-p into a 30 k
Ω
, 30 pF load, with a dc
offset level of approximately 1.76 V dc.
AD6190
Fi
g
ure 8.
L
N
A
I
n
put M
u
i
t
All 10.7 MHz IF filters are assumed to be standard 330
Ω
i
m
ped-
ance ceramic types.
T
he
A
D
6190 RX IF signal chain and
T
X
I
F
input includes internal matching resistors for this impedance.
T he
frequency plan of
provi
he lowest possible
RF implementation c
version design is used with
a 10.7 MHz IF to tak
e very low cost filters
available.
H
owever, sin
H
z
–928
M
Hz band
i
s wider
than twice the IF, it is pos
t undesired in-band signals
will be mixed down to the IF. T
hese images could cause inter-
ference to the desired signal. It is thus necessary to provide
tunable filtering before the receive mixer, or
some other ap-
proach to eliminate interference from image signals.
When used with the Zilog Z87L00 Spread-Spectrum Controller
IC, the 10.7 MHz IF signal contains the received data encoded in
FSK modulation with approximately a
±
33 k
H
z de
v
iation.
T
he
Z87L00 performs the FSK demodulation in the digital domain.
T he
RSSI (Received Signal Strength Indicator) signal represents
the strength of the received signal, linear in dB, and scales with
supply voltage. With a 3.3 V supply (through a 10
Ω
resistor on
the VCCIF pin), an RF signal level of –100 dBm at the LNA
input will produce an RSSI voltage of approximately 900 mV.
T he
RSSI voltage will increase with increasing RF input level,
at approximately 22 mV/dB to approximately 2.4 V at
–30 dBm input. T
he RSSI output voltage remains above 2.4 V
for input levels up to +15 dBm.
In the AD6190, a technique known as “image-reject” (or SSB)
m
i
xing is used. T
his technique suppresses image interference by
using a pair of mixers with quadrature local oscillators. See
F
i
gure 9.
–6–
REV. 0
AD
6
190
Tr ansm it
Signal P
ath
other words, the Pin 5 and Pin 7 pads are simply extended to
form L1 and L2. Equivalent
H
i
-Q chip inductors in the 2.2 nH
to 4.7 nH range may be substituted.
T he
A
D
6190 transmit chain is designed to accept an input
signal generated by the Z87L00 device. T
he Z87L00 provides
a digitally-generated FSK signal at 2.508 M
H
z
, sampled at
8.192 MSPS. This sampling process produces a signal with com-
ponents at 2.508
M
H
z
, 5.684 MHz, 10.7 MHz, 16.386 MH
z
,
and other higher-order image products at frequencies of (N
×
8.192 MHz
±
2.508) MHz. T
his signal is filtered to select the
10.7 MHz image, which is used as the transmit IF signal for the
A
D
6190.
T he
single tuning varactor, D1, (e.g., Alpha Industries SMV-
1233-011) and a fixed capacitor C1 (or a common anode dual
diode) are located on the ends of the lines. Note that this is a
positive supply (VREG) referenced “pump-down” tank, mean-
ing that as the T
UNE voltage is increased toward VREG, the
frequency goes down. T
he loop filter return should also be
referenced to VREG (not ground) in order to minimize com-
mon-mode noise pickup and frequency pushing. T
he designer is
cautioned to develop a tank with only as much kVCO as re-
quired to allow easy coverage o
he band with respect to com-
ponent tolerance and produ
on issu
, in order to minimize
phase noise and frequency
lling.
An i
m
age-reject transmit up-converts the 10.7 MHz IF signal to
the 902
MHz–928 MHz RF band, with image and spurious
outputs typically 45 dB below the desired signal, and LO leak-
age typically –33 dBc.
T he
on-chip driver can provide at least 1 mW (0 dBm) into a
50
Ω
load.
H
owever, when driving an external Power Amplifier
(PA) with a gain of 15 dB or more, we recommend a nominal
driver output power no higher than –3 dBm (137 mV p-p T
X IF
input level) to avoid spurious PA output products in excess of
FCC allowances.
T
he RFOUT p
i
n is normally connected through
an 8.2 nH dc feed inductor, and ac-coupled to the power amplifier.
15n
39
⍀
C1
D1
L2
L1
VTUNE (F
OM
LOOP F
ER)
TANK–
L
FILTER
RETUR
GND
+3.3V
15nH
TANK+
1
F
AD6190
8.2nH
VCLO
82pF
(FROM REGULATOR
PASS TRANSISTOR)
2.2pF
AD6190
TXOUT
TO 50
⍀
L
Fi
g
ure 11. Typical
V
CO T
a
nk
C
ircuit
An on-chip dual-modulus (64/65) prescaler allows the frequency
control to be done with a low-cost low-frequency PLL synthe-
sizer chip, such as the Fujitsu MB87006A, Siemens PMB2307,
or similar.
Fi
g
ure 10. TXOUT
Match
Circ
Fr equency
Contr ol
T he
A
D
6190 includes an on-chi
ge controlled
cillator
for LO generation. An externa
tuned tank circuit con-
trols the frequency. T
his VC
ce the required
LO frequency for several reaso
T he
prescaler output should be connected to ground through a
2.2 k
Ω
pull-down resistor. T
he output signal (typically 1 V p-p)
is sufficient to drive most low cost PLLs, and is usually ac-
coupled through a 1 nF capacitor to the PLL input.
Layout, Gr
ounding and D
ecoupling
T he
A
D
6190 is a complex device with high bandwidth and high
gain on-chip. Proper layout, grounding and decoupling, tech-
niques are essential to realizing the full performance of the sys-
tem. Each of the power supply pins should be decoupled to
ground at the chip using a 82 pF chip capacitor in parallel with
a 10 nF chip capacitor. T
he VCCIF pin requires a 10
Ω
series
resistor in addition to the 82 pF shunt capacitor.
F
i
rst, it is a simple m
gener
and Q LO compo-
nents needed for
t
m
i
x
s by starting with a LO
at twice the desir
he divide-by-two process can
easily provide coa
signals. Any
remaining phase
error is further redu
n-chip connection network.
Second, by keeping the oscillator operating at a frequency far
removed from the RF carrier frequency, parasitic feedback from
either the transmit signal or
strong received signals is minimized.
T his
reduces VCO “pulling” effects.
Voltage Regulator
T he
A
D
6190 includes an on-chip voltage regulator to stabilize
the supply voltage for the local oscillator, isolating it from any
variations or noise on the main power supply voltage in the
system. T
his regulator is nominally set for 2.75 V output. An
external PNP pass transistor provides the needed output current
for the VCO.
A typical series resonant VCO tank circuit is shown in Figure
11. T
he oscillator actually operates at twice the required LO
frequency band. T
he tank inductors (L1, L2) may be imple-
mented as printed traces on the PC board or as lumped circuit chip
components.
T
he printed lines are implemented in nonmicrostrip
to produce higher Q. At least two foil layers should be removed
i
m
mediately under the tank area. A suitable tank structure can
be formed from two parallel lines, each approximately 7 mm
long by 0.3 mm wide, continuing out from the device pads. In
T his
regulator is intended to stabilize the voltage for the LO
only, and should not be used for other circuitry. VBAT
T may
be connected to a 3.3 V dc preregulator or to the precondi-
tioned three-cell battery system.
REV. 0
–7–
AD
6
190
Mode Contr
ols
O
U
TLINE
D IMENSIO NS
D i
m
ensions
shown in inches and (mm).
T he
A
D
6190 is designed as a time-division-duplex (T
DD)
radio. T
his means that the transmitter and receiver operate at
different times. T
he A
D
6190 includes control pins to shut down
unused portions of the circuit when not needed, saving power,
as shown in the table below. For any mode except “Sleep,”
power must be applied to VBAT
T Pin 3 and to all VCC Pins
(16, 21 and 26) to ensure proper operation.
28
–
Lead Shrink Sm
all O
utline
(RS-28)
0.407 (10.34)
0.397 (10.08)
NOT E:
Do not enable both the transmit and receive paths
simultaneously.
28
15
1
Table I.
1
Mode
RXO N
TXO N
V
C
O O N
Notes
Receive
T ransmit
“Sleep”
1
0
0
0
0
1
0
0
1
1
0
0
)
0.078 (1.98)
PIN 1
0.06
7)
0.068 (1.73)
V
C
O On
l
y
1
Allows V
C
O
/
PLL
0.03 (0.762)
8
°
0
°
to settle prior to
transmit time slot.
0.0256
(0.65)
BS
0.015 (0.38)
0.010 (0.25)
0.022 (0.558)
0.008 (0.203)
0.002 (0.050)
SE
G
PL
0.009 (0.229)
.005 (0.127)
–8–
REV. 0
