Analog-Devices-ADRF5040BCPZ-R7
| Part # | Analog-Devices-ADRF5040BCPZ-R7 |
Download  | Analog-Devices-ADRF5040BCPZ-R7 |
High Isolation, Silicon SP4T,
Nonreflective Switch, 9 kHz to 12.0 GHz
Data Sheet
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Nonreflective 50 Ω design
Positive control range: 0 V to 3.3 V
Low insertion loss: 0.8 dB at 8.0 GHz
High isolation: 34 dB at 8.0 GHz
High power handling
33 dBm through path
27 dBm termination path
GND 1
GND 2
RFC 3
GND 4
GND 5
GND 6
GND
18
ADRF5040
17 V
16 V
15 V
14 V
DD
1
50
Ω
50
Ω
High linearity
2
1 dB compression (P1dB): 37 dBm typical
Input third-order intercept (IIP3): 58 dBm typical at 8.0 GHz
ESD rating: 4 kV human body model (HBM)
4 mm × 4 mm, 24-lead LFCSP package
No low frequency spurious
SS
50
Ω
50
Ω
13 GND
PACKAGE
BASE
RF settling time (0.05 dB margin of final RF
OUT
): 9 µs
GND
APPLICATIONS
Figure 1.
Test instrumentation
Microwave radios and very small aperture terminals (VSATs)
Military radios, radars, and electronic counter measures (ECMs)
Fiber optics and broadband telecommunications
GENERAL DESCRIPTION
nonreflective single-pole, quad-throw (SP4T) switch in an LFCSP
surface-mount package. Covering the 9 kHz to 12.0 GHz range,
the switch offers high isolation and low insertion loss. The
switch features 34 dB isolation and 0.8 dB insertion loss up to
8.0 GHz, and a 9 µs settling time of 0.05 dB margin of the final
radio frequency output (RF
OUT
). The switch operates using
positive control voltage of 3.3 V and 0 V and requires +3.3 V and
surface-mount LFCSP package.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
right
s
o
f third parties that may result fro
m
i
ts use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks an
d
r
egistere
d
t
rademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2016–2017 Analog Devices, Inc. All rights reserved.
ADRF5040
Data Sheet
TABLE OF CONTENTS
REVISION HISTORY
7/2017—Rev. A to Rev. B
Changes to Figure 2, Figure 3, and Figure 4……………………………. 5
2/2017—Rev. 0 to Rev. A
Changes to Ordering Guide …………………………………………………. 14
7/2016—Revision 0: Initial Version
Rev. B | Page 2 of 14
Data Sheet
ADRF5040
SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
V
DD
= 3.3
V
,
V
SS
= −3.3
V
,
V
1
and V
2
= 0 V or V
DD
, T
A
= 25°C, 50 Ω system, unless otherwise noted.
Table 1.
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
INSERTION LOSS
9 kHz to 4.0 GHz
9 kHz to 8.0 GHz
9 kHz to 10.0 GHz
9 kHz to 12.0 GHz
0.7
0.8
1.1
2
dB
dB
dB
dB
ISOLATION, RFC TO RF1 TO RF4 (WORST CASE)
9 kHz to 4.0 GHz
9 kHz to 8.0 GHz
9 kHz to 10.0 GHz
9 kHz to 12.0 GHz
44
34
29.2
20
dB
dB
dB
dB
RETURN LOSS
On State
9 kHz to 4.0 GHz
9 kHz to 8.0 GHz
9 kHz to 10.0 GHz
9 kHz to 12.0 GHz
9 kHz to 4.0 GHz
9 kHz to 8.0 GHz
9 kHz to 10.0 GHz
9 kHz to 12.0 GHz
21
19
13.5
8
25
18.6
15.5
14.5
dB
dB
dB
dB
dB
dB
dB
dB
Off State
RADIO FREQUENCY (RF) SETTLING TIME
50% V
1
/V
2
to 0.05 dB margin of final RF
OUT
50% V
1
/V
2
to 0.1 dB margin of final RF
OUT
9
7
µs
µs
SWITCHING SPEED
t
RISE
/t
F
A
LL
t
ON
/t
OFF
10% to 90% RF
OUT
50% V
1
/V
2
to 90%/10% RF
9 kHz to 12.0 GHz
1.3
3.5
µs
µs
INPUT POWER
1 dB Compression (P1dB)
0.1 dB Compression (P0.1dB)
INPUT THIRD-ORDER INTERCEPT (IIP3)
37
34
dBm
dBm
Two-tone input power = 14 dBm at each tone
1 MHz to 2.0 GHz
1 MHz to 8.0 GHz
62
58
53
dBm
dBm
dBm
1 MHz to 12.0 GHz
RECOMMENDED OPERATING CONDITIONS
Positive Supply Voltage (V
DD
)
Negative Supply Voltage (V
SS
)
Control Voltage (V
1
, V
2
) Range
RF Input Power
3.0
−3.6
0
3.6
−3.0
V
DD
V
V
V
V
DD
= 3.3 V, V
SS
= −3.3 V, T
A
= 85°C, frequency = 2 GHz
V
DD
= 3.3 V, T
A
= 85°C, frequency = 2 GHz
Through Path
Termination Path
Hot Switch Power Level
33
27
27
+85
dBm
dBm
dBm
°C
Case Temperature Range (T
CASE
)
−40
Rev. B | Page 3 of 14
ADRF5040
Data Sheet
DIGITAL CONTROL VOLTAGE SPECIFICATIONS
V
DD
= 3.3 V
10%, V
SS
= −3.3 V
10%, T
CASE
= −40°C to +85°C, unless otherwise noted.
Table 2.
Parameter
Symbol
Min
Typ
Max
Unit
Test Condition/Comments
<1 µA typical
INPUT CONTROL VOLTAGE (V
1
, V
2
)
Low
High
V
IL
V
IH
0
1.4
0.8
V
DD
+ 0.3
V
V
BIAS AND SUPPLY CURRENT SPECIFICATIONS
T
CASE
= −40°C to +85°C, unless otherwise noted.
Table 3.
Parameter
Symbol
Min
Typ
Max
Unit
SUPPLY CURRENT
V
DD
= 3.3 V
V
SS
= −3.3 V
I
DD
I
SS
20
20
100
100
µA
µA
Rev. B | Page 4 of 14
Data Sheet
ADRF5040
ABSOLUTE MAXIMUM RATINGS
5
0
Table 4.
Parameter
Rating
Positive Supply Voltage (V
DD
) Range
Negative Supply Voltage (V
SS
) Range
Control Voltage (V
1
, V
2
) Range
−0.3 V to +3.7 V
−3.7 V to +0.3 V
−0.3 V to V
DD
+ 0.3 V
–5
RF Input Power
1
(V
DD
, V
1
, V
2
= 3.3 V, V
SS
=
−3.3 V, T
A
= 85°C, Frequency = 2 GHz)
Through Path
Termination Path
Hot Switch Power Level (V
DD
= 3.3 V,
T
A
= 85°C, Frequency = 2 GHz)
–10
–15
–20
34 dBm
28 dBm
30 dBm
Storage Temperature Range
Channel Temperature
−65°C to +150°C
135°C
0.01
0.1
1
10
100
1k
10k
FREQUENCY (MHz)
Thermal Resistance (Channel to Package
Bottom)
Figure 3. Power Derating for Terminated Path
Through Path
Terminated Path
MSL Rating
83°C/W
100°C/W
MSL3
5
0
ESD Sensitivity
Human Body Model (HBM)
Charged Device Model (CDM)
4 kV (Class 3)
1.25 kV
–5
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
–10
–15
–20
0.01
0.1
1
10
100
1k
FREQUENCY (MHz)
Figure 4. Power Derating for Hot Switching Power
5
0
ESD CAUTION
–5
–10
–15
–20
–25
0.01
0.1
1
10
100
1k
10k
FREQUENCY (MHz)
Figure 2. Power Derating for Through Path
Rev. B | Page 5 of 14
ADRF5040
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
2
3
18
17
16
15
14
13
GND
GND
RFC
GND
V
V
V
V
DD
1
ADRF5040
TOP VIEW
GND 4
2
(Not to Scale)
5
6
GND
GND
SS
GND
PACKAGE
BASE
GND
NOTES
1. EXPOSED PAD. THE EXPOSED PAD MUST BE
CONNECTED TO THE RF/DC GROUND OF THE
PRINTED CIRCUIT BOARD (PCB).
Figure 5. Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic
Description
1, 2, 4 to 7, 9, 10, 12, 13,
GND
18, 19, 21, 22, 24
Ground. The package bottom has an exposed metal pad that must connect to the printed circuit
3
RFC
RF4
RF3
RF Common Port. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required
if the RF line potential is not equal to 0 V dc.
RF4 Port. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required if the RF
line potential is not equal to 0 V dc.
RF3 Port. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required if the RF
line potential is not equal to 0 V dc.
8
11
14
15
16
17
20
V
SS
V
2
V
1
V
DD
RF2
Negative Supply Voltage Pin.
Positive Supply Voltage.
RF2 Port. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required if the RF
line potential is not equal to 0 V dc.
23
RF1
RF1 Port. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required if the RF
line potential is not equal to 0 V dc.
EPAD
Exposed Pad. The exposed pad must be connected to the RF/dc ground of the PCB.
Table 6. Truth Table
Digital Control Inputs
V
1
V
2
Signal Path State
RFC to RF1
RFC to RF2
RFC to RF3
RFC to RF4
Low
High
Low
High
Low
Low
High
High
Rev. B | Page 6 of 14
Data Sheet
ADRF5040
INTERFACE SCHEMATICS
V
DD
GND
V
1
Figure 6. GND Interface Schematic
Figure 8. V
1
Interface Schematic
V
DD
V
2
Figure 7. V
2
Interface Schematic
Rev. B | Page 7 of 14
ADRF5040
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
INSERTION LOSS, RETURN LOSS, AND ISOLATION
V
DD
= 3.3
V
, V
SS
= −3.3
V
,
T
CASE
= 25°C, unless otherwise specified.
0
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
–0.5
–1.0
RFC TO RF1
RFC TO RF2
RFC TO RF3
RFC TO RF4
–1.5
–2.0
–2.5
T
T
T
T
= +105°C
= +85°C
= +25°C
= –40°C
CASE
CASE
CASE
CASE
0
2
4
6
8
10
12
0
2
4
6
8
10
12
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 9. Insertion Loss vs. Frequency
Figure 12. Insertion Loss vs. Frequency, RFC to RF1 On or RFC to RF4 On
0
–0.5
–1.0
–1.5
–2.0
–2.5
0
–20
–40
–60
RFC TO RF2
RFC TO RF3
–80
RFC TO RF4
T
T
T
T
= +105°C
= +85°C
= +25°C
= –40°C
CASE
CASE
CASE
CASE
–100
–120
0
2
4
6
8
10
12
0
2
4
6
8
10
12
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 10. Insertion Loss vs. Frequency, RFC to RF2 On or RFC to RF3 On
Figure 13. Isolation vs. Frequency, RFC to RF1 On
0
–20
–40
0
–20
–40
–60
–60
RFC TO RF1
RFC TO RF3
RFC TO RF4
–80
–80
RFC TO RF1
RFC TO RF2
RFC TO RF4
–100
–100
–120
–120
0
2
4
6
8
10
12
0
2
4
6
8
10
12
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 11. Isolation vs. Frequency, RFC to RF2 On
Figure 14. Isolation vs. Frequency, RFC to RF3 On
Rev. B | Page 8 of 14
Data Sheet
ADRF5040
V
DD
= 3.3
V
,
V
SS
= −3.3
V
,
T
CASE
= 25°C, unless otherwise specified.
0
0
–20
–20
–40
–60
–40
–60
–80
–80
RF2 TO RF3
RFC TO RF1
RFC TO RF2
RFC TO RF3
–100
–120
–140
RF2 TO RF4
RF3 TO RF4
RF1 TO RF2
RF1 TO RF3
RF1 TO RF4
–100
–120
0
2
4
6
8
10
12
0
2
4
6
8
10
12
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 15. Isolation vs. Frequency, RFC to RF4 On
Figure 17. Channel to Channel Isolation vs. Frequency, RFC to RF1 On
0
–5
0
–5
–10
–15
–20
–25
–10
–15
–20
–25
–30
–35
–40
–30
RFC
CH1, CH2, CH3 AND CH4 (OFF)
CH1, CH2, CH3 AND CH4 (ON)
–35
–40
–45
0
2
4
6
8
10
12
0
2
4
6
8
10
12
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 16. Return Loss vs. Frequency, RFC to RF4 On
Figure 18. Return Loss vs. Frequency, RFC to RF4 On
Rev. B | Page 9 of 14
ADRF5040
Data Sheet
INPUT POWER COMPRESSION AND INPUT THIRD-ORDER INTERCEPT
V
DD
= 3.3
V
,
V
SS
= −3.3
V
,
T
CASE
= 25°C, unless otherwise specified.
44
42
40
38
36
34
32
30
28
26
24
44
42
40
38
36
34
32
30
28
26
24
3.6V
3.3V
3V
+85°C
+25°C
–40°C
0
1
2
3
4
5
6
7
8
9
10 11 12
0
1
2
3
4
5
6
7
8
9
10 11 12
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 19. 0.1 dB Compression Point vs. Frequency over Temperature,
DD
= 3.3 V, V
SS
= −3.3 V
Figure 22. 0.1 dB Compression Point vs. Frequency over Voltage,
CASE
= 25°C
V
T
44
42
40
38
36
34
32
30
28
26
24
44
42
40
38
36
34
32
30
28
26
24
3.6V
3.3V
3V
+85°C
+25°C
–40°C
0
1
2
3
4
5
6
7
8
9
10 11 12
0
1
2
3
4
5
6
7
8
9
10 11 12
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 20. 1 dB Compression Point vs. Frequency over Temperature,
DD
= 3.3 V, V
SS
= −3.3 V
Figure 23. 1 dB Compression Point vs. Frequency over Voltage,
V
T
CASE
= 25°C
65
60
55
50
45
65
60
55
50
45
3.6V
3.3V
3V
T
T
T
= +85°C
= +25°C
= –40°C
CASE
CASE
CASE
0
2
4
6
8
10
12
0
2
4
6
8
10
12
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 21. Input Third-Order Intercept (IIP3) vs. Frequency over
Temperature, V
DD
= 3.3 V, V
SS
= −3.3 V
Figure 24. Input Third-Order Intercept (IIP3) vs. Frequency over Voltage,
CASE
= 25°C
T
Rev. B | Page 10 of 14
Data Sheet
ADRF5040
INPUT POWER COMPRESSION AND INPUT THIRD-ORDER INTERCEPT, 10 kHz TO 1 GHz
V
DD
= 3.3
V
,
V
SS
= −3.3 V at T
CASE
= 25°C.
45
40
35
30
25
20
15
10
5
70
65
60
55
50
45
40
35
30
25
20
0.1dB COMPRESSION POINT
1dB COMPRESSION POINT
0
0.01
0.1
1
10
100
1k
0.01
0.1
1
10
100
1k
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 25. Input Compression Point vs. Frequency
Figure 26. Input Third-Order Intercept (IIP3) vs. Frequency
Rev. B | Page 11 of 14
ADRF5040
Data Sheet
THEORY OF OPERATION
RF1 through RF4 pins are dc-coupled, and dc blocking capacitors
are required on the RF paths. The design is bidirectional; the
input and outputs are interchangeable.
V
DD
pin and a negative voltage supply applied to the V
SS
pin.
Bypassing capacitors are recommended on the supply lines to
minimize RF coupling.
and the relative order to power up the V
DD
and V
SS
supplies is not
important. The V
1
and V
2
control signals can be applied only
after V
DD
is powered up; this sequence avoids forward biasing
and causing damage to the internal ESD protection circuits.
T
u
rn on the RF signal after the device supply settles to a steady
state.
applied to the V
1
pin and the V
2
pin. A small value bypassing
capacitor is recommended on these digital signal lines to
improve the RF signal isolation.
port (RFC) and the RF output ports (RF1, RF2, RF3, and RF4);
therefore, no external matching components are required. The
Rev. B | Page 12 of 14
Data Sheet
ADRF5040
APPLICATIONS INFORMATION
leads and backside ground slug must be connected directly to
the ground plane. The evaluation board is available from Analog
Devices, Inc. upon request.
EVALUATION BOARD
designed using proper RF circuit design techniques. Signal lines
at the RF port have 50 Ω impedance, and the package ground
J4
J5
VDD
V1
RF1
RF2
J1
U1
GND
V2
RFC
RF4
RF3
VSS
J2
J3
Figure 27. Evaluation PCB
Item
Description
J1 to J5
TP1 to TP5
C1, C6
U1
PC mount SMA RF connectors
Through hole mount test points
100 pF capacitors, 0402 package
ADRF5040
SP4T switch
PCB
600-00598-00-3 evaluation PCB, Rogers 4350 circuit board material
Rev. B | Page 13 of 14
ADRF5040
Data Sheet
OUTLINE DIMENSIONS
DETAIL A
(JEDEC 95)
4.10
4.00 SQ
3.90
0.30
0.25
0.18
PIN 1
INDICATOR
PIN 1
INDIC ATOR
AREA OPTIONS
(SEE DETAIL A)
24
19
18
1
0.50
BSC
2.85
2.70 SQ
2.55
EXPOSED
PAD
13
12
6
7
0.50
0.40
0.30
0.20 MIN
TOP VIEW
BOTTOM VIEW
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
0.90
0.85
0.80
0.05 MAX
0.02 NOM
COPLANARITY
0.08
SECTION OF THIS DATA SHEET.
SEATING
PLANE
0.20 REF
COMPLIANT
TO
JEDEC STANDARDS MO-220-VGGD-8.
Figure 28. 24-Lead Lead Frame Chip Scale Package [LFCSP]
4 mm × 4 mm Body and 0.85 mm Package Height
(CP-24-16)
Dimensions shown in millimeters
ORDERING GUIDE
Package
Option
Model
1
Temperature Range
MSL Rating
2
Package Description
Branding
3
ADRF
ADRF5040BCPZ
−40°C to +85°C
MSL3
24-Lead Lead Frame Chip Scale Package [LFCSP]
CP-24-16
5040
#
X
XXXX
ADRF
ADRF5040BCPZ-R7 −40°C
to +85°C
ADRF5040-EVALZ
MSL3
24-Lead Lead Frame Chip Scale Package [LFCSP]
Evaluation Board
CP-24-16
5040
#
X
XXXX
1
These models are RoHS Compliant Parts.
3
XXXXX is the 5-digit lot number.
©2016–2017 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D14290-0-7/17(B)
Rev. B | Page 14 of 14
