Analog-Devices-Inc–Maxim-Integrated-MAX2369EGM-TDG069

Part #	Analog-Devices-Inc–Maxim-Integrated-MAX2369EGM-TDG069
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19-1924; Rev 1; 10/01

Complete Dual-Band

Quadrature Transmitter

General Description

Features

The MAX2369 is a dual-band, triple-mode complete

transmitter for cellular phones. The device takes a differ-

ential I/Q baseband input and mixes it up to IF through a

quadrature modulator and IF variable-gain amplifier

(VGA). The signal is then routed to an external bandpass

filter and upconverted to RF through an SSB mixer and

RF VGA. The signal is further amplified with an on-board

PA driver.

ꢀ

Dual-Band, Triple-Mode Operation

ꢀ

+7dBm Output Power with -34dBc ACPR

(NADC Modulation)

ꢀ

100dB Power Control Range

ꢀ

Supply Current Drops as Output Power Is Reduced

ꢀ

On-Chip IF VCO and IF PLL

The MAX2369 is designed for dual-band operation and

supports TDMA for the PCS band as well as TDMA and

AMPS for the cellular band. The desired mode of

operation is selected by loading data on the SPI™/

MICROWIRE™-compatible 3-wire serial bus. The

MAX2369 then routes the signals to the appropriate ports

depending on which band is selected. The MAX2369

includes two RF LO input ports and two PA driver ports,

eliminating the need for external switching circuitry.

ꢀ

QSPI/SPI/MICROWIRE-Compatible 3-Wire Bus

ꢀ

Digitally Controlled Operational Modes

ꢀ

+2.7V to +5.5V Operation

ꢀ

Single Sideband Upconverter Eliminates SAW

Filters

ꢀ

Power Control Distributed at IF and RF for

Optimum Dynamic Range

The MAX2369 takes advantage of the serial bus to set

modes such as charge-pump current, high or low side-

band injection, and IF/RF gain balancing. It is packaged

in a small (7mm

7mm) 48-pin QFN package with

Ordering Information

exposed paddle.

PART

TEMP. RANGE

PIN-PACKAGE

MAX2369EGM

-40

C to +85

48 QFN-EP*

*Exposed paddle

Applications

Dual-Band TDMA/Amps Handsets

Functional Diagram

GAIT Handsets

Triple-Mode, Dual-Mode, or Single-Mode

Mobile Phones

Satellite Phones

Wireless Data Links (WAN/LAN)

Wireless Local Area Networks (LANs)

High-Speed Data Modems

High-Speed Digital Cordless Phones

Wireless Local Loop (WLL)

RFL

RFH

REF

IFPLL

N.C.

LOCK

N.C.

MAX2369

N.C.

TANK+

TANK-

TXGATE

IFIN+

+45

-45

IFLO

IFIN-

N.C.

SHDN

I-

Pin Configuration appears at end of data sheet.

Selector Guide appears at end of data sheet.

BIAS

I+

SPI and QSPI are trademarks of Motorola, Inc.

MICROWIRE is a trademark of National Semiconductor Corp.

________________________________________________________________

Maxim Integrated Products

For price, delivery, and to place orders, please contact Maxim Distribution at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

Complete Dual-Band

Quadrature Transmitter

ABSOLUTE MAXIMUM RATINGS

to GN

………………………………………………….-0.3V to +3.6V

Continuous Power Dissipation (T

= +70

RFL, RFH…………………………………………………………………..+5.5V

48-Pin QFN-EP (derate 27mW/

C above +70

C) …………..2.5W

Operating Temperature Range ………………………-40

C to +85

Junction Temperatur

……………………………………………..+150

Storage Temperature Rang

……………………….-65

C to +160

Lead Temperature (soldering, 10s) ……………………………+300

DI, CLK,

, VGC,

SHDN

TXGATE

LOCK……………………………………………..-0.3V to (V

AC Input Pins (IFIN, Q, I, TANK, REF,

+ 0.3V)

LOL, LOH

)

……………………………………………………..1.0V peak

Digital Input Current (

SHDN

TXGATE

CLK, DI,

) ……………………………………………………….

10mA

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional

operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to

absolute maximum rating conditions for extended periods may affect device reliability.

DC ELECTRICAL CHARACTERISTICS

(

MAX2369 Test Fixture:

= V

= +2.75V,

SHDN

TXGATE

= +2.0V, VGC = +2.5V, R

= 16k

Ω

, T

= -40

C to +85

BIAS A

BATT

unless otherwise noted. Typical values are at T

= +25

C, and operating modes are defined in Table 6.)

PARAMETER

CONDITIONS

MIN

TYP

MAX

3.0

UNITS

Operating Supply Voltage

2.7

VGC = 0.5V

VGC = 2.0V

VGC = 2.5V

VGC = 0.5V

VGC = 2.0V

VGC = 2.5V

VGC = 0.5V

VGC = 2.0V

VGC = 2.5V

106

112

150

107

113

155

101

105

133

PCS mode

120

Cellular

digital mode

(Note 1)

123

Operating Supply Current

FM mode

105

6.5

Addition for IFLO buffer

TXGATE

= 0.6V

SHDN

= 0.6V, sleep mode

0.5

µA

Logic High

2.0

Logic Low

0.6

Logic Input Current

VGC Input Current

VGC Input Resistance During Shutdown

Lock Indicator High

Lock Indicator Low

-5

µA

Ω

-12

200

+12

SHDN

= 0.6V

280

50k

Ω

pullup load

50k

Ω

pullup load

– 0.4

0.4

_______________________________________________________________________________________

Complete Dual-Band

Quadrature Transmitter

AC ELECTRICAL CHARACTERISTICS

(

MAX2369 Evaluation Kit:

Ω

system, operating modes as defined in Table 6, input voltage at I and Q = 200mV

differential,

RMS

common mode = V

/2, 300kHz quadrature CW tones, IF synthesizer locked with passive lead-lag second-order loop filter, REF =

200mVp-p at 19.44MHz, V

SHDN

TXGATE

= +2.75V, V

= +2.75V, IF output load = 400

Ω

, LOH, LOL input power =

BAT

-7dBm, f

= 1017.26MHz, f

= 2061.26MHz, IFIN = 125mV

at 181.26MHz, IS-136 TDMA modulation, f

= 1880MHz, f

LOL

LOH

RMS

RFH RFL

= 836MHz, T

= +25

C, unless otherwise noted.)

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

MODULATOR, QUADRATURE MODES

(Digital Cellular, Digital PCS, FM IQ)

IF Frequency Range

120

–

235

/ 2

MHz

I/Q Common-Mode Input

1.25

–

= 2.7V to 3.0V (Notes 2, 3, 4)

1.35

Voltage

IF Gain Control Range

IF Output Power, Digital Mode

Gain Variation Over Temperature

VGC = 0.5V to 2.5V, IFG = 100

VGC = 2.5V, IFG = 100

dBm

-10

0.8

Relative to +25

C, T

= -40

C to +85

C (Note 4)

VGC = 2.5V, IFG = 100, F

= 181.26MHz, noise

RX Band Noise Power

-145

dBm/Hz

measured at F

20MHz

Carrier Suppression

VGC = 2.5V, IFG = 100

Sideband Suppression

MODULATOR, FM MODE

IF Gain Control Range

VGC = 0.5V to 2.5V, IFG = 100

VGC = 2.5V, IFG = 111, I/Q modulation

VGC = 2.5V, IFG = 111, direct VCO modulation

-8.5

-5.5

Output Power

dBm

UPCONVERTER AND PREDRIVER

IF Frequency Range

120

–

235

800

–

1000

1700

–

2000

800

–

1150

1400

–

2300

MHz

Low-Band Frequency Range

High-Band Frequency Range

LOL Frequency Range

RFL port

RFH port

LOH Frequency Range

VGC = 2.5V, NADC modulation, ACPR < -32dBc/

-55dBc at +30kHz/+60kHz offset

5.8

Output Power, RFL (Note 4)

dBm

VGC = 2.5V, FM mode

VGC = 2.6V, NADC modulation, ACPR = -32dB/

-55dBc at +30kHz/+60kHz offset

Output Power, RFH (Note 4)

6.6

dBm

Power-Control Range

VGC = 0.5V to 2.5V

Gain Variation Over Temperature

Relative to +25

C, T

= -40

C to +85

C (Note 4)

RFL

-25

-24

RF Image Rejection (Note 4)

LO Leakage (Note 4)

dBc

RFH

RFL, VGC = 2.5V

RFH, VGC = 2.6V

RFL, VGC = 2.5V

RFH, VGC = 2.6V

-22

-24

dBm

-133

-134

dBm/

RX Band Noise Power

_______________________________________________________________________________________

Complete Dual-Band

Quadrature Transmitter

AC ELECTRICAL CHARACTERISTICS (continued)

(

MAX2369 Evaluation Kit:

Ω

system, operating modes as defined in Table 6, input voltage at I and Q = 200mV

differential,

RMS

common mode = V

/2, 300kHz quadrature CW tones, IF synthesizer locked with passive lead-lag second-order loop filter, REF =

200mVp-p at 19.44MHz, V

SHDN

TXGATE

= +2.75V, V

= +2.75V, IF output load = 400

Ω

, LOH, LOL input power =

BAT

-7dBm, f

= 1017.26MHz, f

= 2061.26MHz, IFIN = 125mV

at 181.26MHz, IS-136 TDMA modulation, f

= 1880MHz, f

LOL

LOH

RMS

RFH RFL

= 836MHz, T

= +25

C, unless otherwise noted.)

PARAMETER

IF_PLL

CONDITIONS

MIN

TYP

MAX

UNITS

Reference Frequency

MHz

Frequency Reference Signal

Level

0.1

0.6

Vp-p

IF Main Divide Ratio

256

16384

2048

IF Reference Signal Ratio

VCO Operating Range

240

–

470

-6

MHz

dBm

IF LO Output Power

BUF_EN = 1

ICP = 00

ICP = 01

ICP = 10

ICP = 11

148

185

295

385

200

260

345

515

700

260

Charge-Pump Source/Sink

Current

µA

400

530

Turbolock Boost Current

(Note 5)

385

530

700

µA

Charge-Pump Source/Sink

Matching

Locked, all values of ICP, over specified compliance

range (Note 6)

Charge-Pump High-Z Leakage

Over specified compliance range (Note 6)

Note 1:

See Table 6 for register settings.

Note 2:

ACPR is met over the specified V

range.

Note 3:

must be supplied by the I/Q baseband source with

6µA capability.

Note 4:

Guaranteed by design and characterization.

Note 5:

When enabled, turbolock is active during acquisition and injects boost current in addition to the normal charge-pump current.

Note 6:

Charge Pump Compliance range is 0.5V to V

– 0.5V.

_______________________________________________________________________________________

Complete Dual-Band

Quadrature Transmitter

pical Operating Characteristics

(MAX2369EVKIT, V

= +2.8V, V

= 3.0V, T

= +25

C, unless otherwise noted.)

BAT

TANK 1/S11 vs. FREQUENCY

IF P

SETTLING TIME

vs. VGC INPUT

140

130

120

110

100

CELLULAR

= 181.26MHz

z =

200

Ω

-2

-4

-6

-8

-10

PCS

3: 330MHz,

1.58k

Ω

, 0.34pF

4: 780MHz,

1.21k

Ω

, 0.43pF

5: 1GHz,

0.94k

Ω

, 0.47pF

EQUIVALENT PARALLEL R-C

1: 200MHz,

1.76k

Ω

, 0.26pF

2: 260MHz,

1.66k

Ω

, 0.31pF

100 200 300 400 500 600 700 800 900

1000

TIME (µs)

1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5 2.6

VGC (V)

IF OUTPUT POWER

vs. VGC

INPUT AND IF DAC SETTING

OUTPUT POWER vs. VGC INPUT

IF OUTPUT POWER vs. VGC INPUT

-10

-20

-40°C

-5

-10

-15

-20

-25

-30

-35

-40

-20

-30

CELLULAR

+85°C

100

-40

-50

-60

110

-60

000

101

-70

111

001

-80

PCS

-80

-45

-50

-55

-60

010

011

-90

-100

-120

-100

-110

+25°C

1.0

1.5

1.7

1.9

2.1

2.3

2.5

0.5

1.5

2.0

2.5

3.0

0.5

1.0

1.5

2.0

2.5

3.0

VGC (V)

SIDEBAND SUPPRESSION AND LO

FEEDTHROUGH (IFOUT)

IF OUTPUT POWER vs. VGC INPUT

DESIRED

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-20

-40

2.7V, 3.0V, 3.3V

SIDEBAND

-60

-80

-100

-120

0.5

1.0

1.5

2.0

2.5

3.0

181.21 181.23 181.25 181.27 181.29 181.31

VGC (V)

FREQUENCY (MHz)

_______________________________________________________________________________________

Complete Dual-Band

Quadrature Transmitter

pical Operating Characteristics (continued)

(MAX2369EVKIT, V

= +2.8V, V

= 3.0V, T

= +25

C, unless otherwise noted.)

BAT

PHASE NOISE LOW-BAND OSCILLATOR

vs. FREQUENCY OFFSET (181.26MHz)

-50

I/Q BASEBAND FREQUENCY RESPONSE

RFL OUTPUT SPECTRUM

-0.5

-1.0

-1.5

-2.0

-2.5

-3.0

DESIRED

-60

= 360kHz

-70

-80

COMP

-10

-20

-30

-40

-50

-60

-70

-80

IMAGE

-90

-100

-110

-120

-130

-140

-150

10 15 20 25 30 35 40 45 50

FREQUENCY (MHz)

0.001

0.01

0.1

500

700

900

1100

1300

1500

OFFSET FREQUENCY (MHz)

FREQUENCY (MHz)

CASCADED ACPR/ALT vs. POWER (RFH)

RFH OUTPUT SPECTRUM

CASCADED ACPR/ALT vs. POWER (RFL)

-20

-30

-40

-50

-60

-70

-80

-20

ACPR WITH ROOT RAISED

COSINE FILTER

DESIRED

ACPR WITH ROOT RAISED

COSINE FILTER

-30

-40

-50

-60

-70

-80

-10

-20

-30

-40

-50

-60

-70

-80

-90

IMAGE

ACPR WITHOUT ROOT

RAISED COSINE FILTER

ACPR WITHOUT FILTER

ALT WITH OR WITHOUT ROOT

RAISED COSINE FILTER

ALT WITH OR WITHOUT FILTER

-24 -20

-16 -12 -8

-4

POWER (dBm)

1500

1700

1900

2100

2300

2500

-20 -16

-12 -8

-4

FREQUENCY (MHz)

POWER (dBm)

LOL PORT S11

LOH PORT S11

3 2

1: 700MHz,

Ω

–

j51

Ω

2: 966MHz,

Ω

–

j46

Ω

3: 1.22MHz,

Ω

–

j38

Ω

4: 1.5GHz,

Ω

–

j25

Ω

1600MHz TO 2500MHz

1: 1.6GHz,

Ω

–

j25

Ω

2: 1.75GHz,

Ω

–

j22

Ω

3: 1.88GHz,

Ω

–

j18

Ω

4: 2.01GHz,

Ω

–

j15

Ω

5: 2.5GHz,

Ω

–

Ω

_______________________________________________________________________________________

Complete Dual-Band

Quadrature Transmitter

Pin Description

NAME

FUNCTION

Transmitter RF Output for Cellular Band (800MHz to 1000MHz)

—

for both FM and digital modes.

This open-collector output requires a pullup inductor to the supply voltage, which is part of the

output matching network and may be connected directly to the battery.

RFL

Transmitter RF Output for PCS Band (1700MHz to 2000MHz). This open collector output

requires a pullup inductor to the supply voltage. The pullup inductor is part of the output match-

ing network and may be connected directly to the battery.

RFH

Open-Collector Output Indicating Lock Status of the IF PLL. Requires a pullup resistor. Control

using configuration register bit LD_MODE.

LOCK

Power Supply. Supply pin for the driver stage. V

must be bypassed to system ground as

close to the pin as possible. The ground vias for the bypass capacitor should not be shared by

any other branch. Bypass to ground with 100pF and 100nF capacitors.

Power Supply. Connect to pin 4 for normal operation.

Supply Pin for the Upconverter Stage. V

must be bypassed to system ground as close to the

pin as possible. The ground vias for the bypass capacitor should not be shared by any other

branch.

Digital Input. A logic low on

TXGATE

shuts down everything except the IF PLL, IF VCO, and ser-

ial bus and registers. This mode is used for IF PLL settling before the transmit time slot.

TXGATE

Differential Inputs to the RF Upconverter. These pins are internally biased to +1.5V. The input

impedance for these ports is nominally 400

Ω

differential. The IF filter should be AC-coupled to

these ports. Keep the differential lines as short as possible to minimize stray pickup and shunt

capacitance.

8, 9

10, 11

IFIN+, IFIN-

N.C.

No Connection. Leave these pins floating.

Bias Resistor Pin. RBIAS is internally biased to a bandgap voltage of +1.18V. An external resistor

or current source must be connected to this pin to set the bias current for the upconverters and PA

driver stages. The nominal resistor value is 16k

Ω

. This value can be altered to optimize the linearity

of the driver stage.

BIAS

Input Pins from the 3-Wire Serial Bus (SPI/QSPI/MICROWIRE compatible).

An R-C filter on each of these pins may be used to reduce noise.

13, 14, 15

16, 17

CLK, DI,

Power supply. Bypass to ground with a 1000pF capacitor.

Differential IF Outputs. These pins must be inductively pulled up to V

. A differential IF band-

pass filter is connected between this port and IFIN+ and IFIN-. The pullup inductors can be part

of the filter structure. The differential output impedance of this port is nominally 600

Ω

. The trans-

mission lines from these pins should be short to minimize the pickup of spurious signals and

noise.

IFOUT+,

IFOUT-

18, 19

RF and IF Variable-Gain Control Analog Input. VGC floats to +1.5V. Apply

+0.5V to +2.6V to control the gain of the RF and IF stages. An RC filter on this pin may be used

to reduce DAC noise or PDM clock spurs from this line.

VGC

Supply Pin for the IF VGA. Bypass with a capacitor as close to the pin as possible. The bypass

capacitor must not share its ground vias with any other branches.

_______________________________________________________________________________________

Complete Dual-Band

Quadrature Transmitter

Pin Description (continued)

NAME

FUNCTION

Supply for the I/Q Modulator. Bypass with capacitor as close to the pin as possible. The bypass

capacitor must not share its ground vias with any other branches.

Differential Q-Channel Baseband Inputs to the Modulator. These pins go directly to the bases of

a differential pair and require an external common-mode bias voltage.

23, 24

25, 26

Q+, Q-

I+, I-

Differential I-Channel Baseband Inputs to the Modulator. These pins go directly to the bases of

a differential pair and require an external common-mode bias voltage.

Shutdown Input. A logic low on

SHDN

shuts down the entire IC. An R-C lowpass filter may be

used to reduce digital noise.

SHDN

Supply Pin to the VCO Section. Bypass as close to the pin as possible. The bypass capacitor

should not share its vias with any other branches.

Buffered LO Output. Control the output buffer using register bit BUF_EN and the divide ratio

using the register bit BUF_DIV.

IFLO

TANK-,

TANK+

30, 31

Differential Tank Pins for the IF VCO. These pins are internally biased to +1.6V.

No Connection. Leave these pins floating.

32, 33, 34,

35, 42

N.C.

REF

Reference Frequency Input. REF is internally biased to V

– 0.7V and must be AC-coupled to

the reference source. This is a high-impedance port (25k

Ω

3pF).

Supply for the IF Charge Pump. This supply can differ from the system V

. Bypass as close to

the pin as possible. The bypass capacitor must not share its vias with any other branches.

High-Impedance Output of the IF Charge Pump. Connect to the tune input of the IF VCOs

through the IF PLL loop filter. Keep the line from IFCP to the tune input as short as possible to

prevent spurious pickup, and connect the loop filter as close to the tune input as possible.

IFCP

Supply Pin for Digital Circuitry. Bypass as close to the pin as possible. The bypass capacitor

must not share its vias with any other branch.

40, 45, 46,

47, 48

GND

Ground. Connect to PC board ground plane.

Supply Pin. Bypass as close to the pin as possible. The bypass capacitor may share with sup-

ply pin for digital circuitry, pin 39.

LOH

LOL

High-band RF LO Input Port. AC-couple to this port.

Low-band RF LO Input Port. AC-couple to this port.

Exposed

paddle

GND

DC and AC GND Return for the IC. Connect to PC board ground plane using multiple vias.

_______________________________________________________________________________________

Complete Dual-Band

Quadrature Transmitter

Use high-Q inductors and varactors to maximize equiv-

alent parallel resistance. The ICP_MAX bit in the OPC-

TRL register can be set to 1 to increase the charge

pump current.

Detailed Description

The MAX2369 complete quadrature transmitter accepts

differential I/Q baseband inputs with external common-

mode bias. A modulator upconverts this to IF frequency

in the 120MHz to 235MHz range. A gain control voltage

pin (VGC) controls the gain of both the IF and RF VGAs

simultaneously to achieve best noise and linearity per-

formance. The IF signal is brought off-chip for filtering,

then fed to a single sideband upconverter followed by

the RF VGA and PA driver. The RF upconverter requires

an external VCO for operation. The IF PLL and operat-

ing mode can be programmed by an SPI/QSPI/

MICROWIRE-compatible 3-wire interface.

IF VGA

The IF VGA allows varying an IF output level that is con-

trolled by the VGC voltage. The voltage range on VGC

of +0.5V to +2.6V provides a gain-control range of

85dB. The IF output ports from the VGA are optimized

for IF frequency from 120MHz to 235MHz. IFOUT ports

support direct VCO FM modulation. The differential IF

output port has an output impedance of 600

Ω

when

pulled up to V

through a choke.

The following sections describe each block in the

Single Sideband Mixer

MAX2369

Functional Diagram.

The RF transmit mixer uses a single sideband architec-

ture to eliminate an off-chip RF filter. The mixer is fol-

lowed by the RF VGA. The RF VGA is controlled by the

same VGC pin as the IF VGA to provide optimum lineari-

ty and noise performance. The total power control range

is >100dB.

I/Q Modulator

Differential in-phase (I) and quadrature-phase (Q) input

pins are designed to be DC-coupled and biased with the

baseband output from a digital-to-analog converter

(DAC). I and Q inputs need a DC bias of V

/2 and a

current-drive capability of 6µA. Common-mode voltage

PA Driver

The MAX2369 includes two power-amplifier (PA) drivers.

Each is optimized for the desired operating frequency.

RFL is optimized for cellular-band operation. RFH is opti-

mized for PCS operation. The PA drivers have open-col-

lector outputs and require pullup inductors. The pullup

inductors can act as the shunt element in a shunt series

match.

will work within a 1.35V to (V

– 1.25V) range. Typically,

I and Q will be driven differentially with a 200mV

RMS

baseband signal. Optionally, I and Q may be pro-

grammed for 100mV

operation with the IQ_LEVEL bit

RMS

in the configuration register. The IF VCO output is fed

into a divide-by-two/quadrature generator block to derive

quadrature components to drive the IQ modulator. The

output of the modulator is fed into the VGA.

Programmable Registers

The MAX2369 includes five programmable registers

consisting of two divide registers, a configuration regis-

ter, an operational control register, and a test register.

Each register consists of 24 bits. The 4 least significant

bits (LSBs) are the register

’

s address. The 20 most sig-

nificant bits (MSBs) are used for register data. All regis-

ters contain some

“

don’t care

”

bits. These can be either

a zero or a 1 and do not affect operation (

Figure 1

Data is shifted in MSB first, followed by the 4-bit

address. When

is low, the clock is active and data

is shifted with the rising edge of the clock. When

transitions to high, the shift register is latched into the

Power-up defaults for the five registers are shown in

Table 1

. The registers should be initialized according to

Table 2

. The dividers and control registers are pro-

grammed from the SPI/QSPI/MICROWIRE-compatible

serial port.

IF VCO

The VCO oscillates at twice the desired IF frequency.

Oscillation frequency is determined by external tank

components (see

Applications Information

). Typical

phase-noise performance for the tank is shown in

Typical Operating Characteristics.

IFLO Output Buffer

IFLO provides a buffered LO output when BUF_EN is 1.

The IFLO output frequency is equal to the VCO fre-

quency when BUF_DIV is 0, and half the VCO frequen-

cy when BUF_DIV is 1. The output power is -6dBm. This

output is used in test mode.

IF PLL

The IF PLL uses a charge-pump output to drive a loop

filter. The loop filter will typically be a passive second-

order lead lag filter. Outside the filter

’

s bandwidth,

phase noise will be determined by the tank compo-

nents. The two components that contribute most signifi-

cantly to phase noise are the inductor and varactor.

_______________________________________________________________________________________

Complete Dual-Band

Quadrature Transmitter

The IFM register sets the main frequency divide ratio

for the IF PLL. The IFR register sets the reference fre-

quency divide ratio. The IF VCO frequency can be

determined by the following:

See

Table 4

for a description of each bit.

The test register is not needed for normal use.

Power Management

Bias control is distributed among several functional

sections and can be controlled to accommodate many

different power-down modes as shown in

Table 5

IF VCO frequency = f

(IFM / IFR)

REF

where f

is the external reference frequency.

REF

The operational control register (OPCTRL) controls the

state of the MAX2369. See

Table 3

for the function of

each bit.

The shutdown control bit is of particular interest since it

differs from the

SHDN

pin. When the shutdown control

bit is active (SHDN_BIT = 0), the serial interface is left

active so that the part can be turned on with the serial

bus while all other functions remain shut off. In contrast,

The configuration register (CONFIG) sets the configura-

tion for the IF PLL and the baseband I/Q input levels

MSB

24 BIT REGISTER

LSB

DATA 20 BITS

ADDRESS 4 BITS

B19 B18 B17 B16 B15 B14 B13 B12 B11 B10

IFM DIVIDE RATIO REGISTER (14 BITS)

ADDRESS

B13 B12 B11 B10

IFR DIVIDE RATIO REGISTER (11 BITS)

ADDRESS

B10

CONTROL REGISTER

(16 BITS)

B15 B14 B13 B12 B11 B10

B9 B8 B7 B6 B5

ADDRESS

CONFIGURATION REGISTER (16 BITS)

ADDRESS

B15 B14 B13 B12 B11 B10

TEST REGISTER (8 BITS)

B5 B4 B3 B2

ADDRESS

X = DON

’

T CARE

Figure 1. Register Configuration

Table 1. Register Power-Up Default States

Table 2. Register Initialization for F

REF

19.44MHz, F

= 181.26MHz,

FUNCTION

IF M divider count

IF R divider count

= 360kHz

COMP

IFM

IFR

6519 dec

0492 dec

0010

0011

FUNCTION

Operational control

settings

IFM

IFR

1007 dec

0054 dec

0010

0011

IF M divider count

IF R divider count

OPCTRL

892F hex

0100

Configuration and

setup control

Operational control

settings

CONFIG

TEST

D03F hex

0000 hex

0101

0111

OPCTRL

890F hex

0100

Test-mode control

Configuration and

setup control

CONFIG

TEST

903D hex

0000 hex

0101

0111

Test-mode control

10 ______________________________________________________________________________________

Complete Dual-Band

Quadrature Transmitter

when the

SHDN

pin is low it shuts down everything. In

either case, PLL programming and register information

is lost. To retain the register information, use standby

mode (

STBY

= 0).

Applications Information

The MAX2369 is designed for use in dual-band, triple-

mode systems. It is recommended for triple-mode hand-

sets. A typical application circuit is shown in

Figure 2

Signal Flow Control

Table 6

shows an example of key registers for triple-

mode operation.

3-Wire Interface

Figure 3

shows the 3-wire interface timing diagram. The

3-wire bus is SPI/QSPI/MICROWIRE compatible.

FRAC-N

PLL

PCS

OUTPUT

GND GND GND GND

LOL LOH

GND

IFCP

N.C.

RFL

RFH

REF

N.C. 35

CELLULAR

OUTPUT

IF PLL

LOOP

LOCK

OUTPUT

LOCK

N.C.

FILTER

N.C. 33

N.C.

TANK+

MAX2369

TANK

-45

TXGATE

IFIN+

TXGATE

TANK-

LOGIC INPUT

IFLO

IFIN-

N.C.

BIAS

CTRL

SHDN

LOGIC INPUT

SHDN

I-

11 N.C.

I+

12 RBIAS

CLK

Q+

Q-

IFOUT+ IFOUT-

VGC

DAC GAIN

CONTROL INPUT

Figure 2. MAX2369 Typical Application Circuit

______________________________________________________________________________________ 11

Complete Dual-Band

Quadrature Transmitter

Table 3. Operation Control Register (OPCTRL)

BIT

LOCATION

(0 = LSB)

POWER-UP

STATE

BIT NAME

FUNCTION

LO_SEL

1 selects LOL input port; 0 selects LOH port.

Set to 0 for normal operation.

UNUSED

1 keeps IF turbo-mode current active even when frequency acquisition is

achieved. This mode is used when high operating IF charge-pump current is

needed.

ICP_MAX

MODE

Sets operating mode according to the following:

00 = FM mode

01 = Cellular digital mode; RFL is selected

10 = Not used

12, 11

11 = PCS mode; RFH is selected

UNUSED

Set to 0 for normal operation.

3-bit IF gain control. Alters IF gain by approximately 2dB per LSB (0 to 14dB).

Provides a means for adjusting balance between RF and IF gain for optimized

linearity.

IFG

100

8, 7, 6

When this register is 1, the upper sideband is selected (LO below RF). When

this register is 0, the lower sideband is selected (LO above RF).

SIDE_BAND

BUF_EN

MOD_TYPE

STBY

0 turns IFLO buffer off; 1 turns IFLO buffer on.

0 selects direct VCO modulation. (IF VCO is externally modulated and the I/Q

modulator is bypassed); 1 selects quadrature modulation.

0 shuts down everything except registers and serial interface.

0 shuts down modulator and upconverter, leaving PLL locked and registers

active. This is the programmable equivalent to the

TXGATE

pin.

TXSTBY

0 shuts down everything except serial interface, and also resets all registers to

power-up state.

SHDN_BIT

12 ______________________________________________________________________________________

Complete Dual-Band

Quadrature Transmitter

Table 4. Configuration Register (CONFIG)

BIT

LOCATION

(0 = LSB)

POWER-UP

STATE

BIT NAME

FUNCTION

IF_PLL_SHDN

UNUSED

0 shuts down the IF PLL. This mode is used with an external IF VCO and IF PLL.

Set to 0 for normal operation.

UNUSED

Set to 0 for normal operation.

IQ_LEVEL

BUF_DIV

1 selects 200mV

input mode; 0 selects 100mV

input mode.

RMS

1 selects

2 on IFLO port; 0 bypasses the divider.

VCO_BYPASS

1 bypasses IF VCO and enables a buffered input for external VCO use.

A 2-bit register sets the IF charge-pump current as follows:

00 = 200µA

01 = 260µA

10 = 400µA

11 = 530µA

ICP

9, 8

UNUSED

7, 6

Not used. Leave in the power-up/initialized state.

IF phase-detector polarity; 1 selects positive polarity (increasing tuning voltage

on the VCO produces increasing frequency); 0 selects negative polarity

(increasing tuning voltage on the VCO produces decreasing frequency).

IF_PD_POL

UNUSED

111

4, 3 ,2

Not used. Leave in the power-up/initialized state.

Set to 0 for normal operation.

Determines output mode for LOCK detector pin as follows:

0 = test mode, LD_MODE cannot be 0 for normal operation

1 = IF PLL lock detector

LD_MODE

series resistance attenuates the transients for error-free

operation. The same applies to the override pins

(

SHDN

TXGATE

Electromagnetic

Compliance Considerations

Two major concepts should be employed to produce a

noise-free and EMC-compliant transmitter: minimize cir-

cular current-loop area to reduce H-field radiation and

minimize voltage drops to reduce E-field radiation. To

minimize the circular current-loop area, bypass as

close to the part as possible and use the distributed

capacitance of a ground plane. To minimize voltage

When floating the override pins, bypass to ground with

the capacitors as close to the part as possible.

High-frequency bypass capacitors are required close

to the pins with a dedicated via to ground. The 48-pin

QFN-EP package provides minimal inductance ground

by using an exposed paddle under the part. Provide at

least five low-inductance vias under the paddle to

ground to minimize ground inductance. Use a solid

ground plane wherever possible. Any cutout in the

ground plane may act as slot radiator and reduce its

shield effectiveness.

drops, make V

traces short.

traces short and wide, and make RF

The

“

don’t care

”

bits in the registers should be zero in

order to minimize electromagnetic radiation due to

unnecessary bit banging. RC filtering can also be used

to slow the clock edges on the 3-wire interface, reduc-

ing high-frequency spectral content. RC filtering also

provides for transient protection against IEC802 testing

by shunting high frequencies to ground, while the

Keep the RF LO traces as short as possible to reduce

LO radiation and susceptibility to interference.

______________________________________________________________________________________ 13

Complete Dual-Band

Quadrature Transmitter

Table 5. Power-Down Modes

OFF

POWER-DOWN MODES

COMMENTS

SHDN

Ultra-low shutdown current

TXGATE

IF PLL SHDN

TX STBY

For punctured TX mode

For external IF PLL use

TX is off, but IF LO stays locked

Shuts down, but preserves registers

Serial bus is still active

REG STBY

REG SHDN

Table 6. Register and Control Pin States for Key Operating Modes

CONTROL

PINS

OPCTRL REGISTER

MODE

DESCRIPTION

PCS Digital

RFH selected

RFL selected

Cellular Digital

Direct VCO modulation, RFL selected

FM with IQ modulation, RFL selected

Gated transmission, PCS

FM_IQ

PCS TXGATE

Cellular TXGATE

Sleep

Gated transmission, cellular digital

Everything off

X = Don’t care

14 ______________________________________________________________________________________

Complete Dual-Band

Quadrature Transmitter

> 50ns

> 10ns

B19 (MSB)

B18

A0 (LSB)

> 50ns

CWH

> 50ns

CLK

> 50ns

CWL

> 50ns

CWH

NOTE:

THE 3-WIRE BUS IS SPI/QSPI/MICROWIRE-COMPATIBLE.

Figure 3. 3-Wire Interface Diagram

Internal to the IC, the charge pump will have a leakage

of less than 10nA. This is equivalent to a 300M

Ω

shunt

resistor. The charge-pump output must see an

extremely high DC resistance of greater than 300M

Ω

This will minimize charge-pump spurs at the compari-

son frequency. Make sure there is no solder flux under

the varactor or loop filter.

MAX2369

INT

PAR

-R

CENT

Layout Issues

The MAX2369 EV kit can be used as a starting point for

layout. For best performance, take into consideration

power-supply issues, as well as the RF, LO, and IF lay-

out.

Power-Supply Layout

To minimize coupling between different sections of the

IC, the ideal power-supply layout is a star configuration,

which has a large decoupling capacitor at a central

Figure 4. Tank Port Oscillator

IF Tank Design

The IF VCO tank (TANK+, TANK-) is fully differential.

The external tank components are shown in

Figure 4

The frequency of oscillation is determined by the follow-

ing equation:

node. The V

traces branch out from this node,

each going to a separate V

node in the MAX2369

circuit. At the end of each trace is a bypass capacitor

with impedance to ground less than 1

Ω

at the frequen-

cy of interest. This arrangement provides local decou-

OSC

pling at each V

pin. Use at least one via per bypass

) L

INT

CENT

VAR

PAR

capacitor for a low-inductance ground connection.

Matching Network Layout

The layout of a matching network can be very sensitive

to parasitic circuit elements. To minimize parasitic

inductance, keep all traces short and place compo-

nents as close to the IC as possible. To minimize para-

sitic capacitance, a cutout in the ground plane (and

any other planes) below the matching network compo-

nents can be used.

VAR

2 (C

+ C

)

INT

= Internal capacitance of TANK port

= Capacitance of varactor

= Equivalent variable tuning capacitance

VAR

= Parasitic capacitance due to PC board pads

PAR

and traces

On the high-impedance ports (e.g., IF inputs and out-

puts), keep traces short to minimize shunt capacitance.

CENT

= External capacitor for centering oscillation fre-

quency

= External coupling capacitor to the varactor

______________________________________________________________________________________ 15

Complete Dual-Band

Quadrature Transmitter

Tank Layout

Keep the traces coming out of the tank short to reduce

series inductance and shunt capacitance. Keep the

inductor pads and coupling capacitor pads small to

minimize stray shunt capacitance.

Pin Configuration

TOP VIEW

RFL

RFH

REF

N.C.

TANK +

LOCK

MAX2369

TXGATE

IFIN+

TANK –

IFLO

IFIN-

N.C.

SHDN

I-

BIAS

I+

QFN-EP

Package Information

For the latest package outline information, go to

www.maxim-ic.com/packages

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are

implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA

94086 408-737-7600

Maxim Integrated Products

Printed USA

is a registered trademark of Maxim Integrated Products.

ENGL ISH

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Analog-Devices-Inc–Maxim-Integrated-MAX2369EGM-TDG069

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