Analog-Devices-Inc–Maxim-Integrated-MAX260BCNG-
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19-0352; Rev 2; 7/02
Microprocessor Programmable
Universal Active Filters
General Description
Features
The MAX260/MAX261/MAX262 CMOS dual second-
order universal switched-capacitor active filters allow
microprocessor control of precise filter functions. No
external components are required for a variety of band-
pass, lowpass, highpass, notch, and allpass configura-
tions. Each device contains two second-order filter
sections that place center frequency, Q, and filter oper-
ating mode under programmed control.
o
Filter Design Software Available
o
Microprocessor Interface
o
64-Step Center Frequency Control
o
128-Step Q Control
o
Independent Q and f
Programming
0
o
Guaranteed Clock to f
Ratio-1% (A grade)
0
An input clock, along with a 6-bit f
program input,
0
determine the filter’s center or corner frequency without
affecting other filter parameters. The filter Q is also pro-
grammed independently. Separate clock inputs for
each filter section operate with either a crystal, RC net-
work, or external clock generator.
o
75kHz f
Range (MAX262)
0
o
Single +5V and
5V ꢀperation
Ordering Information
The MAX260 has offset and DC specifications superior
to the MAX261 and MAX262 and a center frequency
(f ) range of 7.5kHz. The MAX261 handles center fre-
0
quencies to 57kHz, while the MAX262 extends the cen-
ter frequency range to 140kHz by employing lower
clock-to-f ratios.
All devices are available in 24-pin DIP
0
PART
TEMP RANGE
PACKAGE ACCURACY
MAX260
ACNG
MAX260BCNG
0°C to +70°C
0°C to +70°C
Plastic DIP
Plastic DIP
Plastic DIP
Plastic DIP
Wide SO
1%
2%
1%
2%
1%
2%
1%
2%
MAX260AENG -40°C
to +85°C
MAX260BENG -40°C
to +85°C
and small outline packages in commercial, extended,
and military temperature ranges.
MAX260ACWG
MAX260BCWG
0°C to +70°C
0°C to +70°C
Wide SO
Applications
MAX260AMRG -55°C
to +125°C
CERDIP
MAX260BMRG -55°C
to +125°C
CERDIP
*
All devices—24-pin packages 0.3in-wide packages
µP-Tuned Filters
Anti-Aliasing Filters
Digital Signal Processing
Adaptive Filters
Ordering Information continued at end of data sheet.
Signal Analysis
Pin Configurations
Phase-Locked Loops
TOP VIEW
Functional Diagram
BP
A
1
2
3
4
5
6
7
8
9
24 LP
BP
1
2
3
4
5
6
7
8
9
24 LP
A
A
A
B
OUTPUT
INPUT
N.C.
HP
23 IN
OP OUT
HP
23 IN
B
B
IN LP
HP BP
IN LP
HP BP
22 LP
22 LP
21 BP
A
B
A
N.C.
IN
21 BP
20 D0
OP IN
IN
B
B
FILTER
A
FILTER
B
+
+5V
-5V
V
MAX260
MAX261
MAX262
20 HP
19 D0
A
A
B
D1
A3
19 OSC
OUT
D1
A3
18 GND
–
18 OSC
OUT
GND
GND
–
CLK OUT
17
V
CLK OUT
17
16
15
+
+
V
V
16 WR
15 A0
V
MAX260
MAX261
MAX262
WR
A2 10
CLK 11
A2 10
CLK 11
–
V
14 HP
14 A0
13 A1
A
B
A
CLK
OSC CLKOUT
CLK
B
A
CLK 12
13 A1
CLK 12
B
B
PROGRAM
INPUTS
CRYSTAL
FOURTH-ORDER BANDPASS FILTER
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
Microprocessor Programmable
Universal Active Filters
ABSꢀLUTE MAXIMUM RATINGS
+
–
Total Supply Voltage (V
to V )
………………………………………15V
Operating Temperature Ranges
–
+
Input Voltage, any pin
……………………..(V –
0.3V) to (V
+ 0.3V)
Input Current, any pin ………………………………………………
50mA
Power Dissipation
MAX260/MAX261/MAX262XCXG …………………..0°C
to +70°C
MAX260/MAX261/MAX262XEXG …………………-40°C to +85°C
MAX260/MAX261/MAX262XMXG ………………-55°C to +125°C
Storage Temperature Rang
e
.
……………………….-65°C to +160°C
Lead Temperature (Soldering, 10s) …………………………..+300°C
Plastic DIP (derate 8.33mW/°C above 70°C) ……………660mW
CERDIP (derate 12.5mW/°C above 70°C)
……………..1000mW
Wide SO (derate 11.8mW/°C above 70°C) ………………944mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
+
–
(V =
+5V, V
= -5V, CLK
= CLK
=
5V 350kHz for the MAX260 and 1.5MHz for the MAX261/MAX262, f
/f =
199.49 for
CLK 0
A
B
MAX260/MAX261 and 139.80 for MAX262, Filter Mode 1, T
= +25°C, unless otherwise noted.)
A
PARAMETER
CꢀNDITIꢀNS
MIN
TYP
MAX
UNITS
f Center
Frequency Range
0
See Table 1
Maximum Clock Frequency
See Table 1
MAX260A
0ꢀ2
0ꢀ2
0ꢀ2
0ꢀ2
-5
1
1ꢀ0
2ꢀ0
1ꢀ0
2ꢀ0
MAX260B
f
/f Ratio
Error (Note 1)
CLK 0
T
= T
to T
%
A
MIN
MAX
MAX261/MAX262A
MAX261/MAX262B
f Temperature
Coefficient
0
ppm/
°
C
Q = 8
MAX260A
6
Q = 8
MAX260B
1
10
10
15
20
25
6
Q = 32
Q = 32
Q = 64
Q = 64
Q = 8
MAX260A
2
MAX260B
2
MAX260A
4
MAX260B
4
Q Accuracy (deviation from ideal
continuous filter) (Note 2)
T
T
= T
to
A
MAX
MIN
%
MAX261/MAX262A
MAX261/MAX262B
MAX261/MAX262A
MAX261/MAX262B
MAX261/MAX262A
MAX261/MAX262B
1
Q = 8
1
10
10
15
20
25
Q = 32
Q = 32
Q = 64
Q = 64
2
2
4
4
Q Temperature Coefficient
DC Lowpass Gain Accuracy
20
0ꢀ1
0ꢀ1
-5
-5
+20
ppm/
°
C
MAX260
0ꢀ3
0ꢀ5
dB
MAX261/MAX262
MAX260
Lowpass (at DꢀCꢀ)
Bandpass (at f
)
MAX261/MAX262
MAX260/MAX261/MAX262
Gain Temperature Coefficient
ppm/
°
C
0
2
_______________________________________________________________________________________
Microprocessor Programmable
Universal Active Filters
ELECTRICAL CHARACTERISTICS (continued)
+
–
(V =
+5V, V
= -5V, CLK
= CLK
=
5V 350kꢁH for tꢂe MAX260 and 1ꢀ5MꢁH for tꢂe MAX261/MAX262, f
/f =
199ꢀ49 for
CLK 0
A
B
MAX260/MAX261 and 139ꢀ80 for MAX262, Filter Mode 1, T
= +25
°
C, unless otꢂerwise notedꢀ)
A
PARAMETER
CꢀNDITIꢀNS
MAX260A
MIN
TYP
0ꢀ05
0ꢀ15
0ꢀ40
0ꢀ80
0ꢀ40
0ꢀ80
0ꢀ0ꢃ5
0ꢀ0ꢃ5
0ꢀ50
0ꢀ90
0ꢀ50
0ꢀ90
MAX
UNITS
0ꢀ25
0ꢀ45
1ꢀ00
1ꢀ60
1ꢀ20
1ꢀ60
0ꢀ30
0ꢀ50
1ꢀ10
1ꢀ60
1ꢀ30
1ꢀ60
MAX260B
MAX261A
MAX261B
MAX262A
MAX262B
MAX260A
MAX260B
MAX261A
MAX261B
MAX262A
MAX262B
T
= T
to T
, Q = 4
MAX
A
MIN
Mode 1
Offset Voltage At Filter
Outputs
—
LP, BP, ꢁP (Note 3)
V
Mode 3
Offset Voltage Temperature
Coefficient
f
T
/f =
100ꢀ53, Q = 4
CLK 0
0ꢀꢃ5
mV/
°
C
= T
to T
MIN MAX
A
4
mV
dB
Clock Feedtꢂrougꢂ
Crosstalk
-ꢃ0
Q = 1, 2nd-Order, LP/BP
4tꢂ-Order LP (Figure 26)
See Typꢀ Operꢀ Cꢂarꢀ
Wideband Noise
90
100
-6ꢃ
µV
RMS
4tꢂ-Order BP (Figure 24) (Note 4)
Q = 4, V
= 1ꢀ5V
ꢁarmonic Distortion at f
Supply Voltage Range
dB
V
0
IN
P-P
MAX
T
= T
to T
2ꢀ3ꢃ
5
15
16
16
6ꢀ3
20
A
MIN
MAX260
MAX261
MAX262
T
= T
to T
A
MIN
MAX
Power Supply Current (Note 5)
Sꢂutdown Supply Current
20
mA
mA
CMOS Level Logic Inputs
20
Q0 –
Q6 =
all 0,
A
A
1ꢀ5
CMOS Level Logic Inputs (Note 5)
INTERNAL AMPLIFIERS
Output Signal Swing
T
= T
to T
, 10k
Ω
load (Note 6)
MAX
4ꢀꢃ5
50
V
A
MIN
Source
Sink
Output Signal Circuit Current
mA
2
Power Supply Rejection Ratio
Gain Bandwidtꢂ Product
Slew Rate
0ꢁH to 10kꢁH
-ꢃ0
2ꢀ5
dB
MꢁH
6
V/µs
_______________________________________________________________________________________
3
Microprocessor Programmable
Universal Active Filters
ELECTRICAL CHARACTERISTICS (for V
= 2ꢁ5V 5%)
+
–
(V =
+2ꢀ3ꢃV, V
= -2ꢀ3ꢃV, CLK
= CLK
=
2ꢀ5V 250kꢁH for tꢂe MAX260 and 1MꢁH for tꢂe MAX261/MAX262, f
/f =
199ꢀ49 for
CLK 0
A
B
MAX260/MAX261 and 139ꢀ80 for MAX262, Filter Mode 1, T
= +25
°
C, unless otꢂerwise notedꢀ)
A
PARAMETER
CꢀNDITIꢀNS
MIN
TYP
MAX
UNITS
f Center
Frequency Range
0
(Note ꢃ)
Maximum Clock Frequency
(Note ꢃ)
MAX26XA
0ꢀ1
0ꢀ1
2
1
f
/f Ratio
Error
CLK 0
Q = 8
Q = 8
%
(Notes 1, 8)
MAX26XB
MAX260A
MAX260B
MAX261A
MAX261B
MAX262A
MAX262B
2
6
f
/f =
199ꢀ49
CLK 0
2
10
6
Q Accuracy (deviation from ideal
continuous filter)
(Notes 2, 8)
2
f
/f =
199ꢀ49
CLK 0
%
2
10
6
2
f /f
= 139ꢀ80
CLK 0
2
10
Output Signal Swing
Power Supply Current
Sꢂutdown Current
All Outputs (Note 6)
2
V
CMOS Level Logic Inputs (Note 5)
CMOS Level Logic Inputs (Note 5)
ꢃ
mA
mA
0ꢀ35
Note 1:
f /f
accuracy is tested at 199ꢀ49 on tꢂe MAX260/MAX261, and at 139ꢀ8 on tꢂe MAX262ꢀ
CLK 0
Note 2:
Q accuracy tested at Q = 8, 32, and 64ꢀ Q of 32 and 64 tested at 1/2 stated clock frequencyꢀ
Note 3:
Tꢂe offset voltage is specified for tꢂe entire filterꢀ Offset is virtually independent of Q and f
/f ratio
settingꢀ Tꢂe test clock
0
CLK
frequency for mode 3 is 1ꢃ5kꢁH for tꢂe MAX260 and ꢃ50kꢁH for tꢂe MAX261/MAX262ꢀ
Note 4:
Output noise is measured witꢂ an RC output smootꢂing filter at 4
✕
f to
remove clock feedtꢂrougꢂꢀ
0
Note 5:
TTL logic levels are: ꢁIGꢁ = 2ꢀ4V, LOW = 0ꢀ8Vꢀ CMOS logic levels are: ꢁIGꢁ = 5V, LOW = 0Vꢀ Power supply current is typi-
cally 4mA ꢂigꢂer witꢂ TTL logic and clock input levelsꢀ
Note 6:
On tꢂe MAX260 only, tꢂe ꢁP output signal swing is typically 0ꢀꢃ5V less tꢂan tꢂe LP or BP outputsꢀ
Note 7:
At 2ꢀ5V
supplies, tꢂe f
range and maximum clock frequency are typically ꢃ5% of values listed in Table 1ꢀ
0
Note 8:
f /f
and Q accuracy are a function of tꢂe accuracy of internal capacitor ratiosꢀ No increase in error is expected at
2ꢀ5V
CLK 0
as compared to
5Vꢄ ꢂowever, tꢂese parameters are only tested to tꢂe extent indicated by tꢂe MIN or MAX limitsꢀ
INTERFACE SPECIFICATIꢀNS (Note 9)
+
+
(V =
+5V, V
= -5V, T
= +25
°
C, unless otꢂerwise notedꢀ)
A
PARAMETER
WR
Pulse Widtꢂ
SYMBꢀL
CꢀNDITIꢀNS
MIN
250
25
TYP
MAX
UNITS
ns
t
150
WR
Address Setup
Address ꢁold
Data Setup
t
ns
AS
t
0
ns
Aꢁ
t
100
10
50
0
ns
DS
Data ꢁold
t
ns
Dꢁ
WR
, D0, D1, A0
–
A3, CLK
, CLK
A
B
B
Logic Input ꢁigꢂ
Logic Input Low
V
2ꢀ4
V
V
Iꢁ
T
=T to
T
MIN MAX
A
WR
, D0, D1, A0
–
A3, CLK
, CLK
A
V
I
0ꢀ8
IL
T
=T to
T
MIN MAX
A
10
60
WR
, D0, D1, A0
–
A3, CLK
B
CLK
A
Input Leakage Current
Input Capacitance
6
µA
pF
IN
T
=T to
T
MIN MAX
A
C
WR
, D0, D1, A0
–
A3, CLK
, CLK
15
IN
A
B
Note 9:
Interface timing specifications are guaranteed by design and are not subject to testꢀ
4
_______________________________________________________________________________________
Microprocessor Programmable
Universal Active Filters
Pin Description
PIN
MAX261/
PIN
NAME
FUNCTIꢀN
NAME
FUNCTIꢀN
MAX261/
MAX262
MAX260
MAX260
MAX262
9
9
V
+
V
–
Positive supply voltage
Negative supply voltage
5, 23
1, 21
5, 23
1, 21
IN ,
IN
Filter inputs
A
B
1ꢃ
16
BP ,
BP
Bandpass outputs
Lowpass outputs
A
B
B
Analog Groundꢀ Connect
to tꢂe system ground for
dual supply operation or
mid-supply for single sup-
ply operationꢀ GND sꢂould
be well bypassed in single
supply applicationsꢀ
24, 22
24, 22
LP ,
LP
A
ꢁigꢂpass/notcꢂ/allpass
outputs
3, 14
3, 20
ꢁP ,
ꢁP
A
B
18
1ꢃ
GND
16
15
WR
Write enable input
15, 13,
10, ꢃ
14, 13,
10, ꢃ
A0, A1,
A2, A3
Address inputs for f
and
0
Q input data locations
Data inputs for f
and Q
0
programming
Input to tꢂe oscillator and
clock input to section Aꢀ
Tꢂis clock is internally
divided by 2ꢀ
20, 6
19, 6
D0, D1
11
12
11
12
CLK
CLK
A
B
Output of uncommitted
op amp on MAX261/
MAX262 onlyꢀ Pin 2 is a no-
connect on tꢂe MAX260ꢀ
2
OP OUT
Clock input to filter Bꢀ Tꢂis
clock is internally divided
by 2ꢀ
Inverting input of uncom-
mitted op amp on MAX261/
MAX262 only (noninverting
input is internally connected
to ground)ꢀ Pin 4 is a no-
connect on tꢂe MAX260ꢀ
Clock output for crystal
and R-C oscillator operation
8
8
CLK OUT
OSC OUT
4
OP IN
Connects to crystal or R-C
for self-clocked operation
19
18
_______________________________________________________________________________________
5
Microprocessor Programmable
Universal Active Filters
T
y
pical Operating Characteristics
(T =
+25
°
C, unless otꢂerwise notedꢀ)
A
Q ERROR vs. CLOCK FREQUENCY
I
vs. POWER SUPPLY VOLTAGE
I
vs. CLOCK FREQUENCY
DD
MAX260
DD
30
20
19
18
17
16
15
14
13
25
20
15
10
5
CLOCK (2.4V, 0.8V)
MODE 4
5V
25
°
C
Q = 8
CLK FREQ = 500KHz
25
°
C
CONTROL PINS (5V, 0V)
20
10
CLOCK (5V, 0V)
f
/f
¡
N = 0
CLK
0
CLOCKS (5V, 0V)
5V
MODES 2 & 3
CONTROL PINS (5V, 0V)
25
°
C
0
MODE 1
CLOCK (5V, -5V)
CLOCKS (5V, -5V)
-10
-20
0.2
0.4
0.6
0.8
1.0 1.2
1.4
5
6
7
8
9
10
11
12
0.5
1.5
2.5
3.5
CLOCK FREQUENCY (MHz)
V+ TO V- (V)
CLOCK FREQUENCY (MHz)
OUTPUT SIGNAL SWING
vs. CLOCK FREQUENCY
F
/F ERROR
vs. CLOCK FREQUENCY
0
Q ERROR vs. CLOCK FREQUENCY
MAX261/MAX262
CLK
MAX261/MAX262
8
7
6
5
4
3
2
1
0
0.2
MODES 2, 3
MAX261/MAX262 ALL MODES
5V
Q = 8
A
20
16
12
0
-0.2
-0.4
-0.6
T
f
= 25
°
C
MODE 3
MODES 1, 4
5V
CLK
0
¡
N = 0
Q = 8
= 25
°
C
f
T
A
f
CLK
¡
N = 0
MAX260 MODE 4
f
0
MODE 2
8
4
5V
25
°
C
Q = 8
-0.8
-1.0
-1.2
f
/f
¡
N = 0
CLK 0
0
MAX260 MODES 1, 2, 3
MODES 1, 4
2.5 3.0 3.5
-4
1.0
1.5
2.0
2.5
3.0
3.5
0.2 0.6 1.0 1.4 1.8 2.2 2.8 3.0
CLOCK FREQUENCY (MHz)
0.5
1.0
1.5
2.0
CLOCK FREQUENCY (MHz)
CLOCK FREQUENCY (MHz)
Wideband RMS Noise
(db refꢀ to 2ꢀ4ꢃV
, ꢃV
)
P-P
5V Supplies
Q = 64
RMS
Noise Spectral Distribution
(MAX261, f
= 1MꢁH, dB refꢀ to 2ꢀ4ꢃV
,
CLK
RMS
Q = 1
MꢀDE
Q = 8
BP
ꢃV
P-P
)
LP BP
HP/AP/N LP
HP/AP/N LP
BP HP/AP/N
MEASUREMENT
BANDWIDTH
1
-84 -90
-88 -90
-84 -90
-83 -89
-8ꢃ -89
-89 -88
-8ꢃ -88
-8ꢃ -88
-84
-88
-88
-84
-86
-85
-85
-86
-80
-84
-80
-ꢃ9
-81
-83
-80
-81
-82
-82
-82
-81
-81
-80
-82
-81
CLK
-85
-84
-82
-85
-86
-82
-80
-86
-ꢃ2 -ꢃ3
-ꢃꢃ -ꢃ3
-85
Q = 1
Q = 8
Q = 64
2
-ꢃ6
-ꢃ4
-85
-86
-ꢃ4
-ꢃ2
-86
Wideband
3kꢁH
-84
-8ꢃ
-80
-8ꢃ
-ꢃ2
-86
3
-ꢃ3 -ꢃ3
-ꢃ1 -ꢃ3
-ꢃ3 -ꢃ3
-ꢃ5 -ꢃ2
-ꢃ1 -ꢃ2
-ꢃ1 -ꢃ2
4
C Message
Weigꢂted
1
-93
-93
-93
2
3
4
Note 1:
f
Note 2:
f
= 1MꢁH for MAX261/MAX262, f
= 350kꢁH for MAX260
CLK
/f ratio
programmed at N = 63 (see Table 2)
CLK 0
Note 3:
Clock feedtꢂrougꢂ is removed witꢂ an RC lowpass ar 4f
, ieꢀ, R = 3ꢀ9k
Ω
,
0
C = 2000pF for MAX261ꢀ
6
_______________________________________________________________________________________
Microprocessor Programmable
Universal Active Filters
S-H
N/HP/AP
SCN = SWITCH-CAPACITOR NETWORK
SAMPLE-HOLD
MAX260 ON
L
Y
S1
SCN
BP
LP
–
–
–
IN
SCN
+
∫
∫
Σ
+
S2
S1
S2
S3
MODE
SELECT
SCN
S3
M0
M1
SCN
Q0–Q6
(TABLE 3)
F0–F5
(TABLE 2)
Figure 1. Filter Block Diagram (One Second-Order Section)
ance at tꢂe expense of ꢂigꢂ-end f
and signal band-
0
Introduction
widtꢂꢀ Tꢂe N/ꢁP/AP outputs of tꢂe MAX260 are internal-
ly sample-and-ꢂeld as a result of its auto-Hero
operationꢀ Signal swing at tꢂis output is somewꢂat
reduced as a result (MAX260 only)ꢀ See Table 1 for
bandwidtꢂ comparisons of tꢂe tꢂree filtersꢀ
Eacꢂ MAX260/MAX261/MAX262 contains two second-
order switcꢂed-capacitor active filtersꢀ Figure 1 sꢂows
tꢂe filter’s state variable topology, employed witꢂ two
cascaded integrators and one summing amplifierꢀ Tꢂe
MAX261 and MAX262 also contain an uncommitted
amplifierꢀ On-cꢂip switcꢂes and capacitors provide
Maxim also provides design programs tꢂat aid in con-
verting filter response specifications into tꢂe f
and Q
0
feedback to-control eacꢂ filter section’s f
and Qꢀ
0
program codes used by tꢂe MAX260 series devicesꢀ
Internal capacitor ratios are primarily responsible for
tꢂe accuracy of tꢂese parametersꢀ Altꢂougꢂ tꢂese
switcꢂed-capacitor networks (SCN) are in fact sampled
systems, tꢂeir beꢂavior very closely matcꢂes tꢂat of
continuous filters, sucꢂ as RC active filtersꢀ Tꢂe ratio of
tꢂe clock frequency to tꢂe filter center frequency
Tꢂis software also precompensates f
and Q wꢂen low
0
sample rates are usedꢀ
It is important to note tꢂat, in all MAX260 series filters,
tꢂe filter’s internal sample rate is one ꢂalf tꢂe input
clock rate (CLK
or CLK
) due to an internal division
A
B
(f
/f ) is kept large so tꢂat ideal second-order state-
CLK 0
by twoꢀ All clock-related data, tables, and otꢂer dis-
cussions in tꢂis data sꢂeet refer to tꢂe frequency at tꢂe
variable response is maintainedꢀ
CLK or
CLK input,
iꢀeꢀ, twice tꢂe internal sample rate,
A
B
Tꢂe MAX262 uses a lower range of sampling (f
/f )
CLK 0
unless specifically stated otꢂerwiseꢀ
ratios tꢂan tꢂe MAX260 or MAX261 to allow ꢂigꢂer
operating f
frequencies and signal bandwidtꢂsꢀ Tꢂese
0
Quick Look Design Procedure
reduced sample rates result in somewꢂat more devia-
tion from ideal continuous filter parameters tꢂan witꢂ
tꢂe MAX260/MAX261ꢀ ꢁowever, tꢂese differences can
be compensated using Figure 20 (see
Application
Hints
) or Maxim’s filter design softwareꢀ
Tꢂe MAX260, MAX261, and MAX262, witꢂ Maxim’s filter
design software, greatly simplify tꢂe design procedures
for many active filtersꢀ Most designs can be realiHed
using a tꢂree-step process described in tꢂis sectionꢀ If
tꢂe design software is not used, or if tꢂe filter complexi-
ty is beyond tꢂe scope of tꢂis section, refer to tꢂe
remainder of tꢂis data sꢂeet for more detailed applica-
tions and design informationꢀ
Tꢂe MAX260 employs auto-Hero circuitry not included
in tꢂe MAX261 or MAX262ꢀ Tꢂis provides improved DC
cꢂaracteristics, and improved low-frequency perform-
_______________________________________________________________________________________
7
Microprocessor Programmable
Universal Active Filters
100
110
120
130
140
150
160
170
180
190
200
210
220
230
240
250
260
270
280
290
300
310
AB$ = “FILTER A” : GOSUB 150 : REM GET DATA FOR SECTION A
ADD = 0 : GOSUB 220 : REM WRITE DATA TO THE PRINTER PORT
AB$ = “FILTER B” : GOSUB 150 : REM GET DATA FOR B
ADD = 32 : GOSUB 220 : REM WRITE DATA TO PRINTER PORT
GOTO 100
PRINT “MODE (1 to 4, see Table 5) “; AB$; : INPUT M
IF M<1 OR M>4 THEN GOTO 150
PRINT “CLOCK RATIO (0 to 63, N of Table 2) “; AB$; : INPUT F
IF F<0 OR F>63 THEN GOTO 170
PRINT “Q (0 to 127, N of Table 3) “; AB$; : INPUT Q
IF Q<0 OR Q>127 THEN GOTO 190 ELSE : PRINT
RETURN
LPRINT CHR$(ADD+M-1); : ADD = ADD+4
FOR I = 1 TO 3
X = (ADD + (F – 4*INT(F/4))) : LPRINT CHR$(X);
F=INT(F/4) : ADD = ADD + 4
NEXT I
FOR I = 1 TO 4
X=(ADD + (Q – 4*INT(Q/4))) : LPRINT CHR$(X);
Q=I(Q/4) :: ADD = ADD + 4
NEXT I
RETURN
16(15)
20(19)
6
1
2
WR
D0
D1
A0
A1
A2
A3
25
24
5
24
IN
IN
A
3
4
5
23
22
21
20
19
18
LP
A
3
6
7
HP
A
15(14)
13
1
MAX260
MAX261*
MAX262*
BP
IN
A
23
B
10
11
12
22
DB-25 MALE PLUG
(BACK VIEW)
LP
B
7
(20)14
21
HP
B
11
CLK
A
BP
B
12
CLK
B
OUT
+
–
V
GND
V
9
18(17)
17(16)
CLK IN
0.1
µ
F
0.1
µ
F
TTL
(SEE FIGURE 4)
+5V
-5V
*PIN NUMBERS IN ( ) ARE FOR MAX261/MAX262
Figure 2. Basic Program and Hardware Connections to Parallel Printer Port for “Quick Look” Using a PC
quency response and calculates tꢂe pole/Hero (f ) and
0
Step 1—Filter Design
Start witꢂ tꢂe program
“
PZ
”
to determine wꢂat type of
filter is neededꢀ Tꢂis ꢂelps determine tꢂe type
(Butterwortꢂ, Cꢂebysꢂev, etcꢀ) and tꢂe number of poles
for tꢂe optimum cꢂoiceꢀ Tꢂe program also plots tꢂe fre-
Q values for eacꢂ second-order sectionꢀ Eacꢂ
MAX260/MAX261/MAX262 contains two second-order
sections, and devices can be cascaded for ꢂigꢂer
order filtersꢀ
8
_______________________________________________________________________________________
Microprocessor Programmable
Universal Active Filters
Program PRꢁBAS
Allows a MAX260/MAX261/MAX262
Step 2—Generate Programming
Coefficients
to be programmed tꢂrougꢂ a personal computerꢀ Tꢂe
mode, f , and Q of eacꢂ section are typed in, and tꢂe
0
Starting witꢂ tꢂe f
and Q values obtained in Step 1, use
0
proper codes are sent to tꢂe filter tꢂrougꢂ tꢂe comput-
er
’
s parallel printer portꢀ Tꢂis program is also provided
in Figure 2ꢀ
tꢂe program
“
MPP
”
to generate tꢂe digital coefficients
tꢂat program eacꢂ second-order section’s f
and Qꢀ Tꢂe
0
program displays values for
“
N
”
(
“
N = _ for f
”
and
“
N =
0
_ for Q
”
)ꢀ N is tꢂe decimal equivalent of tꢂe binary code
Otꢂer design programs are also included for use witꢂ
otꢂer Maxim filter productsꢀ
tꢂat sets tꢂe filter section
’
s f
or Qꢀ Tꢂese are tꢂe same
0
“
N
”
s tꢂat are listed in Tables 2 and 3ꢀ
Other Filter Products
Maxim ꢂas developed a number of otꢂer filter products
in addition to tꢂe MAX260, MAX261, and MAX262ꢀ
An input clock frequency and filter mode must also be
selected in tꢂis stepꢄ ꢂowever, if a specific-clock rate is
not selected,
“
GEN
”
picks oneꢀ Witꢂ regard to mode
selection, mode 1 is tꢂe most convenient cꢂoice for
most bandpass and lowpass filtersꢀ Exceptions are
elliptic bandpass and lowpass filters, wꢂicꢂ require
mode 3ꢀ ꢁigꢂpass filters also use mode 3, wꢂile allpass
filters use mode 4ꢀ For furtꢂer information regarding
tꢂese filter modes, see tꢂe
Filter Operating Modes
sec-
tionꢀ
PIN-PRꢀGRAMMABLE ACTIVE FILTERS
—
A dual sec-
ond-order universal filter tꢂat needs no external compo-
nentsꢀ A microprocessor interface is not requiredꢀ
MAX263
0ꢀ4ꢁH to 30kꢁH f
range
0
MAX264
1ꢁH to ꢃ5kꢁH f
range
0
RESISTꢀR AND PIN-PRꢀGRAMMABLE FILTERS
—
A
dual second-order universal filter wꢂere f
adjustment
0
beyond pin-programmable resolution employs external
resistorsꢀ
Step 3—Loading the Filter
Wꢂen tꢂe N values for tꢂe f
and Q of eacꢂ second-
0
order filter section are determined, tꢂe filter can tꢂen be
programmed and operatedꢀ Wꢂat follows is a con-
venient metꢂod of programming tꢂe filter and evalu-
ating a design if a PC is availableꢀ
MAX265
0ꢀ4ꢁH to 30kꢁH f
rangeꢀ Includes two
0
uncommitted op ampsꢀ
MAX266
1ꢁH to ꢃ5kꢁH f
rangeꢀ Includes two un-
0
A sꢂort BASIC program loads data into tꢂe MAX260/
MAX261/MAX262 tꢂrougꢂ tꢂe PC’s parallel printer portꢀ
Tꢂe program asks for tꢂe filter mode, as well as tꢂe N
committed op ampsꢀ
MF10
Industry Standard, Resistor Programmed Only
values for tꢂe f
and Q of eacꢂ sectionꢀ Tꢂese coeffi-
0
PIN-PRꢀGRAMMABLE BANDPASS FILTERS
—
A
dual second-order bandpass tꢂat needs no external
componentsꢀ A microprocessor interface is not
requiredꢀ
cients are tꢂen loaded into tꢂe filter in tꢂe form of ASCII
cꢂaractersꢀ Tꢂis program can be used witꢂ or witꢂout
Maxim’s otꢂer filter design softwareꢀ Tꢂe program and
tꢂe appropriate ꢂardware connections for a Centronics-
type printer port are sꢂown in Figure 2ꢀ
MAX267
0ꢀ4ꢁH to 30kꢁH f
range
0
MAX268
1ꢁH to ꢃ5kꢁH f
range
0
Filter Design Software
PRꢀGRAMMABLE ANTI-ALIAS FILTER
—
A program-
mable dual second-order continuous (not switcꢂed)
lowpass filterꢀ No clock noise is generatedꢀ Designed
for use as an anti-alias filter in front of, or as a smootꢂ-
ing filter following, any sampled filter or systemꢀ
Maxim provides software programs to ꢂelp speed tꢂe
transition from frequency response design require-
ments to working ꢂardwareꢀ A series of programs are
available, including:
Program PZꢁ
Given tꢂe requirements, sucꢂ as center
frequency, Q, passband ripple, and stopband attenua-
tion, PZ calculates tꢂe pole frequencies, Q’s, Heros,
and tꢂe number of stages neededꢀ
MAX270
1kꢁH to 25kꢁH Cutoff Frequency Range
5th-ꢀRDER LꢀW PASS FILTER
—
Features Hero offset
and drift errors for designs requiring ꢂigꢂ DC accuracyꢀ
Program MPPꢁ
For programmed filters, MPP computes
tꢂe input codes to use and describes tꢂe expected
performance of tꢂe designꢀ
MAX280, LT1062
0ꢀ1ꢁH to 20kꢁH Cutoff Frequency
Range
Program FRꢁ
Wꢂen a design of one or more stages is
completed, FR cꢂecks tꢂe final cascaded assemblyꢀ
Tꢂe output frequency response can be compared witꢂ
tꢂat expected from PZꢀ
_______________________________________________________________________________________
9
Microprocessor Programmable
Universal Active Filters
Table 1ꢁ Typical Clock and Center Frequency Limits
PART
Q
8
MꢀDE
f
f
0
PART
Q
1
MꢀDE
f
f
0
CLK
CLK
3
4
1
2
3
4
1
2
3
4
1
2
3
4
1
2
3
4
40ꢁH
–
1ꢀꢃMꢁH
40ꢁH
–
2ꢀꢃMꢁH
40ꢁH
–
2ꢀ0MꢁH
40ꢁH
–
1ꢀ2MꢁH
40ꢁH
–
1ꢀ2MꢁH
40ꢁH
–
2ꢀ0MꢁH
40ꢁH
–
4ꢀ0MꢁH
40ꢁH
–
4ꢀ0MꢁH
40ꢁH
–
4ꢀ0MꢁH
40ꢁH
–
4ꢀ0MꢁH
40ꢁH
–
2ꢀ5MꢁH
40ꢁH
–
1ꢀ4MꢁH
40ꢁH
–
1ꢀ4MꢁH
40ꢁH
–
2ꢀ5MꢁH
40ꢁH
–
1ꢀ5MꢁH
40ꢁH
–
0ꢀ9MꢁH
40ꢁH
–
0ꢀ9MꢁH
40ꢁH
–
1ꢀ5MꢁH
0ꢀ4ꢁH
–
1ꢃkꢁH
0ꢀ4ꢁH
–
2ꢃkꢁH
0ꢀ4ꢁH
–
20kꢁH
0ꢀ4ꢁH
–
18kꢁH
0ꢀ4ꢁH
–
12kꢁH
0ꢀ4ꢁH
–
20kꢁH
1ꢀ0ꢁH
–
100kꢁH
1ꢀ4ꢁH
–
140kꢁH
1ꢀ0ꢁH
–
100kꢁH
1ꢀ0ꢁH
–
100kꢁH
1ꢀ0ꢁH
–
60kꢁH
1ꢀ4ꢁH
–
50kꢁH
1ꢀ0ꢁH
–
35kꢁH
1ꢀ0ꢁH
–
60kꢁH
1ꢀ0ꢁH
–
3ꢃkꢁH
1ꢀ4ꢁH
–
32kꢁH
1ꢀ0ꢁH
–
22kꢁH
1ꢀ0ꢁH
–
3ꢃkꢁH
1
2
3
4
1
2
3
4
1
2
3
4
1
2
3
4
1
2
1ꢁH
–
400kꢁH
1ꢁH
–
425kꢁH
1ꢁH
–
500kꢁH
1ꢁH
–
400kꢁH
1ꢁH
–
500kꢁH
1ꢁH
–
ꢃ00kꢁH
1ꢁH
–
ꢃ00kꢁH
1ꢁH
–
600kꢁH
1ꢁH
–
ꢃ50kꢁH
1ꢁH
–
500kꢁH
1ꢁH
–
400kꢁH
1ꢁH
–
ꢃ50kꢁH
40ꢁH
–
4ꢀ0MꢁH
40ꢁH
–
4ꢀ0MꢁH
40ꢁH
–
4ꢀ0MꢁH
40ꢁH
–
4ꢀ0MꢁH
40ꢁH
–
2ꢀꢃMꢁH
40ꢁH
–
2ꢀ1MꢁH
0ꢀ01ꢁH
–
4ꢀ0kꢁH
0ꢀ01ꢁH
–
6ꢀ0kꢁH
0ꢀ01ꢁH
–
5ꢀ0kꢁH
0ꢀ01ꢁH
–
4ꢀ0kꢁH
0ꢀ01ꢁH
–
5ꢀ0kꢁH
0ꢀ01ꢁH
–
10ꢀ0kꢁ
8
1
64
90
64
64
1
1
MAX261
1
8
8
MAX260
8
0ꢀ01ꢁH
–
5ꢀ0kꢁH
0ꢀ01ꢁH
–
4ꢀ0kꢁH
0ꢀ01ꢁH
–
ꢃꢀ5kꢁH
0ꢀ01ꢁH
–
ꢃꢀ0kꢁH
0ꢀ01ꢁH
–
4ꢀ0kꢁH
0ꢀ01ꢁH
–
ꢃꢀ5kꢁH
0ꢀ4ꢁH
–
40kꢁH
0ꢀ5ꢁH
–
5ꢃkꢁH
0ꢀ4ꢁH
–
40kꢁH
0ꢀ4ꢁH
–
40kꢁH
0ꢀ4ꢁH
–
2ꢃkꢁH
0ꢀ5ꢁH
–
30kꢁH
1
8
1
64
90
64
64
1
1
8
6
MAX262
8
8
1
64
90
64
64
1
MAX261
1
8
8
IN
IN
B
N/HP/AP
A
LP
N/HP/AP
LP
B
BP
A
BP
B
A
A
B
+
V
∫
∫
∫
∫
–
V
GND
MODE
f
Q
CK
MODE
2
f
Q
CK
0
0
2
6
7
6
7
A PROGRAM MEMORY
B PROGRAM MEMORY
÷
2
÷
2
MODE, f
, Q
MODE, f
, Q
0
0
MAX261/MAX262 ON
L
Y
15
15
–
+
INTERFACE
LOGIC
2
4
D0, D1
A0
–
A3 WR
CLK
OSC OUT
CLK OUT
CLK
OP IN
OP OUT
A
B
Figure 3. MAX260/MAX261/MAX262 Block Diagram
10 ______________________________________________________________________________________
Microprocessor Programmable
Universal Active Filters
Table 2ꢁ f
/f Program
Selection Table
CLK 0
f
/f RATIꢀ
CLK 0
PRꢀGRAM CꢀDE
MAX262
MAX260/MAX261
MꢀDES 1,3,4
100ꢀ53
102ꢀ10
103ꢀ6ꢃ
105ꢀ24
106ꢀ81
108ꢀ38
109ꢀ96
111ꢀ53
113ꢀ10
114ꢀ6ꢃ
116ꢀ24
11ꢃꢀ81
119ꢀ38
120ꢀ95
122ꢀ52
124ꢀ09
125ꢀ66
12ꢃꢀ23
128ꢀ81
130ꢀ38
131ꢀ95
133ꢀ52
135ꢀ08
136ꢀ66
138ꢀ23
139ꢀ80
141ꢀ3ꢃ
142ꢀ94
14ꢀ4ꢀ51
146ꢀ08
14ꢃꢀ65
149ꢀ23
150ꢀ80
152ꢀ3ꢃ
153ꢀ98
155ꢀ51
15ꢃꢀ08
158ꢀ65
160ꢀ22
161ꢀꢃ9
163ꢀ36
164ꢀ93
166ꢀ50
168ꢀ08
169ꢀ65
1ꢃ1ꢀ22
MꢀDE 2
ꢃ1ꢀ09
ꢃ2ꢀ20
ꢃ3ꢀ31
ꢃ4ꢀ42
ꢃ5ꢀ53
ꢃ6ꢀ64
ꢃꢃꢀꢃ5
ꢃ8ꢀ86
ꢃ9ꢀ9ꢃ
81ꢀ08
82ꢀ19
83ꢀ30
84ꢀ42
85ꢀ53
86ꢀ64
8ꢃꢀꢃ5
88ꢀ86
89ꢀ9ꢃ
91ꢀ80
92ꢀ19
93ꢀ30
94ꢀ41
95ꢀ52
96ꢀ63
MꢀDES 1,3,4
MꢀDE 2
28ꢀ88
29ꢀ99
31ꢀ10
32ꢀ21
33ꢀ32
34ꢀ43
35ꢀ54
36ꢀ65
3ꢃꢀꢃ6
38ꢀ8ꢃ
39ꢀ99
41ꢀ10
42ꢀ21
43ꢀ32
44ꢀ43
45ꢀ54
46ꢀ65
4ꢃꢀꢃ6
48ꢀ8ꢃ
49ꢀ98
51ꢀ10
52ꢀ20
53ꢀ31
54ꢀ43
55ꢀ54
56ꢀ65
5ꢃꢀꢃ6
58ꢀ8ꢃ
59ꢀ98
61ꢀ09
62ꢀ20
63ꢀ31
64ꢀ42
65ꢀ53
66ꢀ64
6ꢃꢀꢃ5
68ꢀ86
69ꢀ98
ꢃ1ꢀ09
ꢃ2ꢀ20
ꢃ3ꢀ31
ꢃ4ꢀ42
ꢃ5ꢀ53
ꢃ6ꢀ64
ꢃꢃꢀꢃ5
ꢃ8ꢀ86
N
0
1
2
3
4
5
6
ꢃ
F5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
F4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
F3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
F2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
F1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
F0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
40ꢀ84
42ꢀ41
43ꢀ98
45ꢀ55
4ꢃꢀ12
48ꢀ69
50ꢀ2ꢃ
51ꢀ84
53ꢀ41
54ꢀ98
56ꢀ55
58ꢀ12
59ꢀ69
61ꢀ26
62ꢀ83
64ꢀ40
65ꢀ9ꢃ
6ꢃꢀ54
69ꢀ12
ꢃ0ꢀ69
ꢃ2ꢀ26
ꢃ3ꢀ83
ꢃ5ꢀ40
ꢃ6ꢀ9ꢃ
ꢃ8ꢀ53
80ꢀ11
81ꢀ68
83ꢀ25
84ꢀ82
86ꢀ39
8ꢃꢀ96
89ꢀ54
91ꢀ11
92ꢀ68
94ꢀ25
95ꢀ82
9ꢃꢀ39
98ꢀ96
100ꢀ53
102ꢀ10
102ꢀ6ꢃ
105ꢀ24
106ꢀ81
108ꢀ38
109ꢀ96
111ꢀ53
8
9
10
11
12
13
14
15
16
1ꢃ
18
19
20
21
22
23
24
25
26
2ꢃ
28
29
30
31
32
33
34
35
36
3ꢃ
38
39
40
41
42
43
44
45
9ꢃꢀꢃ4
98ꢀ86
99ꢀ9ꢃ
101ꢀ08
102ꢀ89
103ꢀ30
104ꢀ41
105ꢀ52
106ꢀ63
10ꢃꢀꢃ4
108ꢀ85
109ꢀ96
111ꢀ0ꢃ
112ꢀ18
113ꢀ29
114ꢀ41
115ꢀ52
116ꢀ63
11ꢃꢀꢃ4
118ꢀ85
119ꢀ96
121ꢀ0ꢃ
______________________________________________________________________________________ 11
Microprocessor Programmable
Universal Active Filters
Table 2ꢁ f
/f Program
Selection Table (continued)
CLK 0
f
/f RATIꢀ
CLK 0
PRꢀGRAM CꢀDE
MAX260/MAX261
MAX262
MꢀDES 1,3,4
1ꢃ2ꢀꢃ9
1ꢃ4ꢀ36
1ꢃ5ꢀ93
1ꢃꢃꢀ50
1ꢃ9ꢀ0ꢃ
180ꢀ64
182ꢀ21
183ꢀꢃ8
185ꢀ35
186ꢀ92
188ꢀ49
190ꢀ0ꢃ
191ꢀ64
193ꢀ21
194ꢀꢃ8
196ꢀ35
19ꢃꢀ92
199ꢀ49
MꢀDE 2
122ꢀ18
123ꢀ29
124ꢀ40
125ꢀ51
126ꢀ62
12ꢃꢀꢃ3
128ꢀ84
129ꢀ96
131ꢀ0ꢃ
132ꢀ18
133ꢀ29
134ꢀ40
135ꢀ51
136ꢀ62
13ꢃꢀꢃ3
138ꢀ84
139ꢀ95
141ꢀ06
MꢀDES 1,3,4
MꢀDE 2
ꢃ9ꢀ9ꢃ
81ꢀ08
82ꢀ19
83ꢀ30
84ꢀ41
85ꢀ53
86ꢀ64
8ꢃꢀꢃ5
88ꢀ86
89ꢀ9ꢃ
91ꢀ08
92ꢀ19
93ꢀ30
94ꢀ41
95ꢀ52
96ꢀ63
9ꢃꢀꢃ4
98ꢀ85
N
F5
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
F4
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
F3
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
F2
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
F1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
F0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
113ꢀ10
114ꢀ66
11624
11ꢃꢀ81
119ꢀ38
120ꢀ95
122ꢀ52
124ꢀ09
125ꢀ66
12ꢃꢀ23
128ꢀ81
130ꢀ38
131ꢀ95
133ꢀ52
135ꢀ09
136ꢀ66
138ꢀ23
139ꢀ80
46
4ꢃ
48
49
50
51
52
53
54
55
56
5ꢃ
58
59
60
61
62
63
Note 1:
For tꢂe MAX260/MAX261, f
/f =
(64 + N)
π
/ 2 in modes 1, 3, and 4, wꢂere N varies from 0 to 63ꢀ
0
CLK
Note 2:
For tꢂe MAX262, f
/f =
(26 s N)
π
/ 2 in modes 1, 3, and 4, wꢂere N varies 0 to 63ꢀ
CLK 0
Note 3:
In mode 2, all f
/f ratios
are divided by
√
2
ꢀ Tꢂe functions are tꢂen:
CLK
0
MAX260/MAX261 f
/f =
1ꢀ110ꢃ2 (64 + N), MAX262 f
/f =
1ꢀ110ꢃ2 (26 + N)
CLK 0
CLK 0
Tꢂe duty cycle of tꢂe clock at CLK
and CLK
is unim-
A
B
Detailed Description
portant because tꢂe input is internally divided by 2 to
generate tꢂe sampling clock for eacꢂ filter sectionꢀ It is
important to note tꢂat tꢂis internal division also ꢂalves
tꢂe sample rate wꢂen considering aliasing and otꢂer
sampled system pꢂenomenonꢀ
f and
Q Programming
0
Figure 3 sꢂows a block diagram of tꢂe MAX260ꢀ Eacꢂ
second-order filter section ꢂas its own clock input and
independent f
and Q controlꢀ Tꢂe actual center fre-
0
quency is a function of tꢂe filter’s clock rate, 6-bit f
0
Microprocessor Interface
f , Q, and mode-selection data are stored in internal
0
control word (see Table 2), and operating modeꢀ Tꢂe Q
of eacꢂ section is also set by a separate programmed
input (see Table 3)ꢀ Tꢂis way, eacꢂ ꢂalf of a MAX260/
MAX261/MAX262 is tuned independently so tꢂat com-
plex filter polynomials can be realiHedꢀ Equations tꢂat
program memoryꢀ Tꢂe memory contents are updated
by writing to addresses selected by A0
–
A3ꢀ D0, and D1
are tꢂe data inputsꢀ A map of tꢂe memory locations is
sꢂown in Table 4ꢀ Data is stored in tꢂe selected
address on tꢂe rising edge of
WR
ꢀ Address and data
inputs are TTL and CMOS compatible wꢂen tꢂe filter is
powered from
5Vꢀ Witꢂ otꢂer power supply voltages,
CMOS logic levels sꢂould be usedꢀ Interface timing is
convert program code numbers to f
/f and
Q values
CLK 0
are listed in tꢂe notes beneatꢂ Tables 2 and 3ꢀ
Oscillator and Clock Inputs
Tꢂe clock circuitry of tꢂe MAX260/MAX261/MAX262
can operate witꢂ a crystal, resistor-capacitor (RC) net-
work, or an external clock generator as sꢂown in Figure
sꢂown in Figure 5ꢀ
Note:
Clock inputs CLK
and CLK
A
B
ꢂave no relation to tꢂe digital interfaceꢀ Tꢂey control tꢂe
switcꢂed-capacitor filter sample rate onlyꢀ
4ꢀ If an RC oscillator is used, tꢂe clock rate, f
nally equals 0ꢀ45/RCꢀ
, nomi-
CLK
Some noise may be generated on tꢂe filter outputs by
transitions at tꢂe logic inputsꢀ If tꢂis is objectionable,
12 ______________________________________________________________________________________
Microprocessor Programmable
Universal Active Filters
Table 3ꢁ Q Program Selection Table
PRꢀGRAMMED Q
MꢀDES MꢀDE
PRꢀGRAM CꢀDE
PRꢀGRAMMED Q
PRꢀGRAM CꢀDE
MꢀDES MꢀDE
N
Q6 Q5 Q4 Q3 Q2 Q1 Q0
N
Q6 Q5 Q4 Q3 Q2 Q1 Q0
1,3,4
2
1,3,4
2
0ꢀ615
0ꢀ621
0ꢀ62ꢃ
0ꢀ634
0ꢀ640
0ꢀ646
0ꢀ653
0ꢀ8ꢃ0
0ꢀ8ꢃ9
0ꢀ88ꢃ
0ꢀ896
0ꢀ905
0ꢀ914
0ꢀ924
24
25
26
2ꢃ
28
29
30
31
32
33
34
35
36
3ꢃ
38
39
40
41
42
43
44
45
46
4ꢃ
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0ꢀ500*
0ꢀ504
0ꢀ508
0ꢀ512
0ꢀ516
0ꢀ520
0ꢀ525
0ꢀ529
0ꢀ533
0ꢀ538
0ꢀ542
0ꢀ54ꢃ
0ꢀ552
0ꢀ556
0ꢀ561
0ꢀ566
0ꢀ5ꢃ1
0ꢀ5ꢃꢃ
0ꢀ582
0ꢀ58ꢃ
0ꢀ593
0ꢀ598
0ꢀ604
0ꢀ609
0ꢀꢃ0ꢃ*
0ꢀꢃ13
0ꢀꢃ18
0ꢀꢃ24
0ꢀꢃ30
0ꢀꢃ36
0ꢀꢃ42
0ꢀꢃ48
0ꢀꢃ54
0ꢀꢃ61
0ꢀꢃ6ꢃ
0ꢀꢃꢃ4
0ꢀꢃ80
0ꢀꢃ8ꢃ
0ꢀꢃ94
0ꢀ801
0ꢀ808
0ꢀ815
0ꢀ823
0ꢀ830
0ꢀ838
0ꢀ646
0ꢀ854
0ꢀ862
0*
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
2
3
4
5
6
0ꢀ660
0ꢀ66ꢃ
0ꢀ6ꢃ4
0ꢀ681
0ꢀ688
0ꢀ696
0ꢀꢃ03
0ꢀꢃ11
0ꢀꢃ19
0ꢀꢃ2ꢃ
0ꢀꢃ36
0ꢀꢃ44
0ꢀꢃ53
0ꢀꢃ62
0ꢀꢃꢃ1
0ꢀꢃ80
0ꢀꢃ90
0ꢀ933
0ꢀ943
0ꢀ953
0ꢀ963
0ꢀ9ꢃ3
0ꢀ984
0ꢀ995
1ꢀ01
ꢃ
8
9
10
11
12
13
14
15
16
1ꢃ
18
19
20
21
22
23
1ꢀ02
1ꢀ03
1ꢀ04
1ꢀ05
1ꢀ06
1ꢀ08
1ꢀ09
1ꢀ10
1ꢀ12
Note 4:
* Writing all 0s into Q0A
–
Q6A on Filter A activates a low-power sꢂutdown modeꢀ BOTꢁ filter sections are deactivatedꢀ
Tꢂerefore, tꢂis Q value is only acꢂievable in filter Bꢀ
______________________________________________________________________________________ 13
Microprocessor Programmable
Universal Active Filters
Table 3ꢁ Q Program Selection Table (continued)
PRꢀGRAMMED Q
MꢀDES MꢀDE
PRꢀGRAM CꢀDE
PRꢀGRAMMED Q
MꢀDES MꢀDE
PRꢀGRAM CꢀDE
N
Q6 Q5 Q4 Q3 Q2 Q1 Q0
N
Q6 Q5 Q4 Q3 Q2 Q1 Q0
1,3,4
1ꢀ60
1ꢀ64
1ꢀ68
1ꢀꢃ3
1ꢀꢃ8
1ꢀ83
1ꢀ88
1ꢀ94
2ꢀ00
2ꢀ06
2ꢀ13
2ꢀ21
2ꢀ29
2ꢀ3ꢃ
2ꢀ46
2ꢀ56
2ꢀ6ꢃ
2ꢀꢃ8
2ꢀ91
3ꢀ05
3ꢀ20
3ꢀ3ꢃ
3ꢀ56
3ꢀꢃ6
4ꢀ00
4ꢀ2ꢃ
4ꢀ5ꢃ
4ꢀ92
5ꢀ33
5ꢀ82
6ꢀ40
ꢃꢀ11
8ꢀ00
9ꢀ14
10ꢀꢃ
12ꢀ8
16ꢀ0
21ꢀ3
32ꢀ0
64ꢀ0
2
1,3,4
0ꢀ800
0ꢀ810
0ꢀ821
0ꢀ831
0ꢀ842
0ꢀ853
0ꢀ865
0ꢀ8ꢃꢃ
0ꢀ889
0ꢀ901
0ꢀ914
0ꢀ928
0ꢀ941
0ꢀ955
0ꢀ969
0ꢀ985
1ꢀ00
1ꢀ02
1ꢀ03
1ꢀ05
1ꢀ0ꢃ
1ꢀ08
1ꢀ10
1ꢀ12
1ꢀ14
1ꢀ16
1ꢀ19
1ꢀ21
1ꢀ23
1ꢀ25
1ꢀ28
1ꢀ31
1ꢀ33
1ꢀ36
1ꢀ39
1ꢀ42
1ꢀ45
1ꢀ49
1ꢀ52
1ꢀ56
2
1ꢀ13
1ꢀ15
1ꢀ16
1ꢀ18
1ꢀ19
1ꢀ21
1ꢀ22
1ꢀ24
1ꢀ26
1ꢀ2ꢃ
1ꢀ29
1ꢀ31
1ꢀ33
1ꢀ35
1ꢀ3ꢃ
1ꢀ39
1ꢀ41
1ꢀ44
1ꢀ46
1ꢀ48
1ꢀ51
1ꢀ53
1ꢀ56
1ꢀ59
1ꢀ62
1ꢀ65
1ꢀ68
1ꢀꢃ1
1ꢀꢃ4
1ꢀꢃꢃ
1ꢀ81
1ꢀ85
1ꢀ89
1ꢀ93
1ꢀ9ꢃ
2ꢀ01
2ꢀ06
2ꢀ10
2ꢀ16
2ꢀ21
48
49
50
51
52
53
54
55
56
5ꢃ
58
59
60
61
62
63
64
65
66
6ꢃ
68
69
ꢃ0
ꢃ1
ꢃ2
ꢃ3
ꢃ4
ꢃ5
ꢃ6
ꢃꢃ
ꢃ8
ꢃ9
80
81
82
83
84
85
86
8ꢃ
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
2ꢀ26
2ꢀ32
2ꢀ40
2ꢀ45
2ꢀ51
2ꢀ59
2ꢀ66
2ꢀꢃ4
2ꢀ83
2ꢀ92
3ꢀ02
3ꢀ12
3ꢀ23
3ꢀ35
3ꢀ48
3ꢀ62
3ꢀꢃꢃ
3ꢀ96
4ꢀ11
4ꢀ31
4ꢀ53
4ꢀꢃ6
5ꢀ03
5ꢀ32
5ꢀ66
6ꢀ03
6ꢀ46
6ꢀ96
ꢃꢀ54
8ꢀ23
9ꢀ05
10ꢀ1
11ꢀ3
12ꢀ9
15ꢀ1
18ꢀ1
22ꢀ6
30ꢀ2
45ꢀ3
90ꢀ5
88
89
90
91
92
93
94
95
96
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
9ꢃ
98
99
100
101
102
103
104
105
106
10ꢃ
108
109
110
111
112
113
114
115
116
11ꢃ
118
119
120
121
122
123
124
125
126
12ꢃ
Notes
5) In modes 1, 3, and 4: Q = 64 / (128 – N)
6) In mode 2, tꢂe listed Q values are tꢂose of mode 1 multiplied by
√
2
ꢀ Tꢂen Q = 90ꢀ51 / (128 – N)
14 ______________________________________________________________________________________
Microprocessor Programmable
Universal Active Filters
Table 4ꢁ Program Address Locations
DATA BIT
D0 D1
FILTER A
ADDRESS
FILTER A
LꢀCATIꢀN
FILTER B
A3
A2
A1
A0
M0
M1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
2
3
4
5
6
ꢃ
A
A
A
A
A
A
A
A
OSC
OUT
CLK
CLK
A
F0
F2
F4
F1
F3
F5
OUT CLK
B
8
11
12
19(18)*
Q0
Q2
Q4
Q6
Q1
Q3
Q5
CRYSTAL
A
A
A
A
A
A
A
*OSC OUT IS PIN 18 ON MAX261/MAX262
FILTER A
FILTER B
FILTER B
M0
M1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
8
9
B
B
B
B
B
B
B
B
F0
F2
F4
F1
F3
F5
OSC
CLK
OUT
12
CLK
A
OUT
10
11
12
13
14
15
CLK
B
8
19(18)*
11
0.45
RC
f
=
CLK
R
C
Q0
Q2
Q4
Q6
Q1
Q3
Q5
B
B
B
B
B
B
B
FILTER A
FILTER B
Note:
Writing 0 into Q0A–Q6A (address locations 4–7) on filter
A activates shutdown mode. BOTH filter sections deactivate.
OSC
OUT
CLK
OUT
12
CLK
A
CLK
B
11
N.C.
N.C.
t
AH
t
AS
EXTERNAL CLOCK IN
(ANY DUTY CYCLE)
A0
–
A3
VALID ADDRESS
t
Figure 4. Clock Input Connections
WR
WR
tꢂe digital lines sꢂould be buffered from tꢂe device by
logic gates as sꢂown in Figure 6ꢀ
t
t
DS
DH
D0, D1
VALID DATA
SEE INTERFACE SPECIFICATIONS FOR TIMING LIMITS
Shutdown Mode
Tꢂe MAX260/MAX261/MAX262 enters a sꢂutdown/
standby mode wꢂen all Heroes are written to tꢂe Q
addresses of filter A (Q0
–
Q6 )ꢀ
Wꢂen sꢂut down,
A
A
power consumption witꢂ
5V supplies typically drops
to 10mWꢀ Wꢂen reactivating tꢂe filter after sꢂutdown,
allow 2ms to return to full operationꢀ
Figure 5. Interface Timing
inputs M0 and M1 (see Tables 4 and 5)ꢀ Tꢂese modes
use no external componentsꢀ A fiftꢂ mode, 3A, makes
use of an additional op amp (included in tꢂe MAX261
and MAX262) and external resistors, but uses tꢂe same
internal configuration and is selected witꢂ tꢂe same
programming code, as mode 3ꢀ
Filter Operating Modes
Tꢂere are several ways in wꢂicꢂ tꢂe summing amplifier
and integrators in eacꢂ MAX260/MAX261/MAX262 filter
section can be configuredꢀ Tꢂe four most versatile
interconnections (modes) are selected by writing to
______________________________________________________________________________________ 15
Microprocessor Programmable
Universal Active Filters
+5V
-5V
MODE 1
OCTAL D FLIP-FLOP
74HC374
N
SCN
20
BP
LP
+
–
V
V
V
CC
–
IN
3
4
2
–
SCN
+
A0
A1
A2
A3
D1
D2
1D
2D
3D
4D
5D
6D
A0
A1
A2
A3
D1
D2
1Q
2Q
3Q
4Q
5Q
∫
∫
Σ
+
5
–
7
6
MAX260
MAX261
MAX262
SCN
8
9
SCN = SWITCHED-CAPACITOR NETWORK
12
15
13
14
Figure 7. Filter Mode 1: Second-Order Bandpass, Lowpass,
and Notch
6Q
CK
OC
GND
10
different modes if desiredꢀ Tꢂe f , f
(notcꢂ), Q, and
various output gains in eacꢂ case are sꢂown in Table 5ꢀ
0
N
1
11
WR
WR
GND
Filter Mode Selection
MꢀDE 1
(Figure ꢃ) is useful wꢂen implementing allpole
lowpass and bandpass filters sucꢂ as Butterwortꢂ,
Cꢂebysꢂev, Basset, etcꢀ It can also be used for notcꢂ
filters, but only second-order notcꢂes because tꢂe rela-
tive pole and Hero locations are fixedꢀ ꢁigꢂer order
-5V
Figure 6. Buffering/Latching Logic Inputs
Figures ꢃ tꢂrougꢂ 11 sꢂow symbolic representations of
tꢂe MAX260 filter modesꢀ Only one second-order sec-
tion is sꢂown in eacꢂ caseꢀ Tꢂe A and B sections of
one MAX260/MAX261/MAX262 can be programmed for
notcꢂ filters require more latitude in f
and 1
, wꢂicꢂ is
0
N
wꢂy tꢂey are more easily implemented witꢂ mode 3Aꢀ
Table 5ꢁ Filter Modes for Second-ꢀrder Functions
M1,
M0
FILTER
FUNCTIꢀNS
H
H
ꢀN2
ꢀN1
MꢀDE
f
Q
f
H
H
ꢀTHER
0
N
ꢀLP
ꢀBP
(f
➝
0)
(f
➝
f
/4)
CLK
1
2
3
0, 0
0, 1
1, 0
LP, BP, N
LP, BP, N
LP, BP, ꢁP
f
-1
-0ꢀ5
-1
-Q
-Q/
√
2
-Q
-1
-0ꢀ5
-1
-1
0
f
√
2
0
ꢁ
ꢁ
ꢁ
= -1
= -1
= -1
OꢁP
OꢁP
OAP
R
ꢁ
R
R
G
R
G
f
+
+
-1
-2
-Q
0
R
R
ꢁ
L
L
4
1, 1
LP, BP, AP
-2Q
f =
f ,
Q =
Q
Z
0
Z
Notes:
f =
Center Frequency
0
ꢁ
ꢁ
ꢁ
= Notcꢂ Gain as f approacꢂes DC
ON1
ON2
OAP
f
N
= Notcꢂ Frequency
= Notcꢂ Gain as f approacꢂes f
CLK
/4
= Allpass Gain
ꢁ
ꢁ
ꢁ
= Lowpass Gain at DC
OLP
= Bandpass Gain at f
f , Q
= f and Q of Complex Pole Pair
H
OBP
OꢁP
0
H
= ꢁigꢂpass Gain as f approacꢂes f
/4
CLK
16 ______________________________________________________________________________________
Microprocessor Programmable
Universal Active Filters
MODE 3A
MODE 2
R
G
R
H
N
SCN
BP
LP
N
–
R
L
–
+
IN
–
SCN
+
∫
∫
Σ
+
–
HP
SCN
BP
–
–
IN
LP
–
SCN
+
SCN
∫
∫
Σ
+
SCN
Figure 8. Filter Mode 2: Second-Order Bandpass, Lowpass,
and Notch
SCN
SCN
MODE 3
SCN = SWITCHED-CAPACITOR NETWORK
HP
SCN
BP
LP
Figure 10. Filter Mode 3a: Second-Order Bandpass, Lowpass,
Highpass, and Notch. For elliptic LP, BP, HP, and Notch, the N
output is used.
–
–
IN
–
SCN
+
∫
∫
Σ
+
MꢀDE 3
(Figure 9) is tꢂe only mode tꢂat produces
ꢂigꢂ-pass filtersꢀ Tꢂe maximum clock frequency is
somewꢂat less tꢂan witꢂ mode 1 (see Table 1)ꢀ
SCN
MꢀDE 3A
(Figure 10) uses a separate op amp to sum
tꢂe ꢂigꢂpass and lowpass outputs of mode 3, creating
a separate notcꢂ outputꢀ Tꢂis output allows tꢂe notcꢂ to
SCN
be set independently of f
by adjusting tꢂe op amp
’
s
0
SCN = SWITCHED-CAPACITOR NETWORK
feedback resistor ratio (R
, R )ꢀ R
, R , and R
are
ꢁ
L
ꢁ
L
G
external resistorsꢀ Because tꢂe notcꢂ can be indepen-
dently set, mode 3A is also useful wꢂen designing
pole-Hero filters sucꢂ as ellipticsꢀ
Figure 9. Filter Mode 3: Second-Order Bandpass, Lowpass,
and Highpass
Mode 1, along witꢂ mode 4, supports tꢂe ꢂigꢂest clock
frequencies (see Table 1) because tꢂe input summing
amplifier is outside tꢂe filter
’
s resonant loop (Figure ꢃ)ꢀ
Tꢂe gain of tꢂe lowpass and notcꢂ outputs is 1, wꢂile
tꢂe bandpass gain at tꢂe center frequency is Qꢀ For
bandpass gains otꢂer tꢂan Q, tꢂe filter input or output
can be scaled by a resistive divider or op ampꢀ
MꢀDE 4
(Figure 11) is tꢂe only mode tꢂat provides an
allpass outputꢀ Tꢂis is useful wꢂen implementing group
delay equaliHationꢀ In addition to tꢂis, mode 4 can also
be used in all pole lowpass and bandpass filtersꢀ Along
witꢂ mode 1, it is tꢂe fastest operating mode for tꢂe fil-
ter, altꢂougꢂ tꢂe gains are different tꢂan in mode 1ꢀ
Wꢂen tꢂe allpass function is used, note tꢂat some
amplitude peaking occurs (approximately 0ꢀ3dB wꢂen
MꢀDE 2
(Figure 8) is used for all-pole lowpass and
bandpass filtersꢀ Key advantages compared to mode 1
are ꢂigꢂer available Qs (see Table 3) and lower output
Q = 8) at f
ꢀ Also note tꢂat f
and Q sampling errors are
0
0
ꢂigꢂest in mode 4 (see Figure 20)ꢀ
noiseꢀ Mode 2
’
s available f
/f ratios
are
√
2
less tꢂan
CLK 0
witꢂ mode 1 (see Table 2), so a wider overall range of
f s can be selected from a single clock wꢂen botꢂ
0
modes are used togetꢂerꢀ Tꢂis is demonstrated in tꢂe
Wide Passband Cꢂebysꢂev Bandpass design exampleꢀ
______________________________________________________________________________________ 17
Microprocessor Programmable
Universal Active Filters
BANDPASS OUTPUT
MODE 4
H
OBP
OBP
BP
LP
AP
SCN
0.707 H
–
–
IN
–
SCN
+
∫
∫
Σ
+
f
L
f
O
f
H
f(LOG SCALE)
SCN
f
O
Q
=
, f
SCN = SWITCHED-CAPACITOR NETWORK
O
=
f f
L ꢁ
f
−
f
L
ꢁ
Figure 11. Filter Mode 4: Second-Order Bandpass, Lowpass,
and Allpass
2
−
1
2Q
1
2Q
f
=
f
+
+
+
1
L
O
Description of Filter Functions
BANDPASS
(Figure 12)
2
1
2Q
1
2Q
f
=
f
+
1
ꢁ
O
For all pole bandpass and lowpass filters (Butterwortꢂ,
Bessel, Cꢂebysꢂev) use mode 1 if possibleꢀ If appropri-
ate f
/f or
Q values are not available in mode 1,
CLK 0
Figure 12. Second-Order Bandpass Characteristics
mode 2 provides a selection tꢂat is closer to tꢂe
required valuesꢀ Mode 1, ꢂowever, ꢂas tꢂe ꢂigꢂest
bandwidtꢂ (see Table 1)ꢀ For pole-Hero filters, sucꢂ as
elliptics, see mode 3Aꢀ
2
s
G(s)
=
ꢁ
OꢁP
s(
ω
/ Q)
2
o
s
+
s(
ω
/ Q)
+ ω
2
G(s)
=
ꢁ
o
o
OBP
2
s
+
s(
ω
/ Q)
+ ω
2
o o
ꢁ
OꢁP
= ꢁigꢂpass output gain as f approacꢂes f
/4
CLK
ꢁ
= Bandpass output gain at
ω
=
ω
o
OBP
f =
ω
NꢀTCH
(Figure 15)
0
/ 2
π
0
ω
= Tꢂe center frequency of tꢂe complex
/ 2
π
f =
0
0
pole pairꢀ Input-output pꢂase sꢂift is -180
°
at f
ꢀ
0
Mode 3A is recommended for multi-pole notcꢂ filtersꢀ In
second-order filters, mode 1 can also be usedꢀ Tꢂe
advantages of mode 1 are ꢂigꢂer bandwidtꢂ, com-
Q = Tꢂe quality factor of tꢂe complex pole pairꢀ
Also tꢂe ratio of f
to -3dB bandwidtꢂ of tꢂe
0
second-order bandpass responseꢀ
pared to mode 3 (ꢂigꢂer f
can be implemented), and
N
no need for external components as required in mode
3Aꢀ
LꢀWPASS
See bandpass textꢀ (Figure 13)
ω
2
o
G(s)
=
ꢁ
OLP
2
+ ω
2
s
n
2
s
+
s(
ω
/ Q)
+ ω
2
G(s)
=
ꢁ
o
o
ON2
2
s
+
s(
ω
/ Q)
+ ω
2
o o
ꢁ
OLP
= Lowpass output gain at DC
ꢁ
ꢁ
= Notcꢂ output gain as f approacꢂes f
/4
ON2
CLK
=
ω
f
0
/ 2
π
0
= Notcꢂ output gain as f approacꢂes DC
ON1
HIGHPASS
(Figure 14)
f =
ω
n
/ 2
π
n
Mode 3 is tꢂe only mode witꢂ a ꢂigꢂpass outputꢀ It
works for all pole filter types sucꢂ as Butterwortꢂ,
Bessel and Cꢂebysꢂevꢀ Use mode 3A for filters
employing botꢂ poles and Heros, sucꢂ as ellipticsꢀ
ALLPASS
Mode 4 is tꢂe only configuration in wꢂicꢂ an allpass
function can be realiHedꢀ
18 ______________________________________________________________________________________
Microprocessor Programmable
Universal Active Filters
HIGHPASS OUTPUT
LOWPASS OUTPUT
H
OHP
H
OLP
OP
OP
H
H
0.707 H
OHP
0.707 H
OLP
f
C
f
P
f
f
C
P
f(LOG SCALE)
f(LOG SCALE)
1
2Q
1
2
2Q
1
2Q
1
2
2Q
f
C
=
f
O
X
1
−
+
1
−
+
1
f
C
=
f
O
X
1
−
+
1
−
+
1
2
2
2
2
1
2Q
2
1
2Q
2
fp
=
f
O
1
−
ꢁ
OP
=
ꢁ
OLP
fp
=
f
O
1
−
ꢁ
OP
=
ꢁ
OꢁP
1
1
X
X
1
1
1
−
1
Q
1
4Q
2
4Q
2
1
−
Q
Figure 14. Second-Order Highpass Characteristics
Figure 13. Second-Order Lowpass Characteristics
2
−
s(
ω
/ Q)
+ ω
2
s
s
o
o
G(s)
=
ꢁ
OAP
2
H
+
s(
ω
/ Q)
+ ω
2
ON2
o
o
H
ON1
ꢁ
OAP
= Allpass output gain for DC < f < f
/ 4
CLK
f =
ω
0
/ 2
π
0
Filter Design Procedure
Tꢂe procedure for most filter designs is to first convert
H
ON
tꢂe required frequency response specifications to f s
0
f
N
and Qs for tꢂe appropriate number of second-order
sections tꢂat implement tꢂe filterꢀ Tꢂis can be done by
using design equations or tables in available liter-
ature, or can be conveniently calculated using Maxim’s
f(LOG SCALE)
Figure 15. Second-Order Notch Characteristics
filter design softwareꢀ Once tꢂe f s and Qs ꢂave been
0
Table 6ꢁ Cascading Identical Bandpass
Filter Sections
found, tꢂe next step is to turn tꢂem into tꢂe digital pro-
gram coefficients required by tꢂe MAX260/MAX261/
MAX262ꢀ An operating mode and clock frequency (or
clock/center frequency ratio) must also be selectedꢀ
TꢀTAL SECTIꢀNS
TꢀTAL BꢁWꢁ
1ꢀ000 B
TꢀTAL Q
1ꢀ00 Q
1ꢀ55 Q
1ꢀ96 Q
2ꢀ30 Q
2ꢀ60 Q
1
2
3
4
5
Next, if tꢂe sample rate (f
/2) is low enougꢂ to cause
CLK
0ꢀ644 B
significant errors, tꢂe selected f s and Qs sꢂould be
0
0ꢀ510 B
corrected to account for sampling effects by using
Figure 20 or Maxim’s design softwareꢀ In most cases,
tꢂe sampling errors are small enougꢂ to require no cor-
rection, iꢀeꢀ, less tꢂan 1%ꢀ In any case, witꢂ or witꢂout
correction, tꢂe required f s and Qs can tꢂen be select-
0
ed from Tables 2 and 3ꢀ Maxim’s filter design software
0ꢀ435 B
0ꢀ386 B
Note:
B = individual stage bandwidtꢂ, Q = individual
stage Qꢀ
______________________________________________________________________________________ 19
Microprocessor Programmable
Universal Active Filters
can also perform tꢂis last stepꢀ Tꢂe desired f s and Qs
0
are stated, and tꢂe appropriate digital coefficients are
suppliedꢀ
Application Hints
Power Supplies
Tꢂe MAX260/MAX261/MAX262 can be operated witꢂ a
variety of power supply configurations, including +5V to
+12V single supply or
2ꢀ5V to
5V dual suppliesꢀ
Cascading Filters
In some designs, sucꢂ as very narrow band filters, sev-
eral second-order sections witꢂ identical center fre-
quency can be cascadedꢀ Tꢂe total Q of tꢂe resultant
filter is:
–
Wꢂen a single supply is used, V
is connected to sys-
tem ground and tꢂe filter’s GND pin sꢂould be biased
+
at V
/2ꢀ Tꢂe input signal is tꢂen eitꢂer capacitively cou-
+
Q
pled to tꢂe filter input or biased to V
/2ꢀ Figure 16
Total Q
=
T
sꢂows circuit connections for single-supply operationꢀ
1
/
N
2
−
1
Wꢂen power supplies otꢂer tꢂan
5V are used, CMOS
+
–
input logic levels (ꢁIGꢁ = V
, LOW = GND or V ) are
required for
WR
, D0, D1, A0
–
A3, OLK
, and CLK
ꢀ
Q is tꢂe Q of eacꢂ individual filter section, and N is tꢂe
number of sectionsꢀ In Table 6, tꢂe total Q and band-
widtꢂ are listed for up to five identical second-order
sectionsꢀ B is tꢂe bandwidtꢂ of eacꢂ sectionꢀ
A
B
Witꢂ 5V
supplies, eitꢂer TTL or CMOS levels can be
usedꢀ Note, ꢂowever, tꢂat power consumption at
5V is
reduced if CLK
and CLK
are driven witꢂ
5V, ratꢂer
A
B
tꢂan TTL or 0 to 5V levelsꢀ Operation witꢂ +5V or
2ꢀ5V
power lowers power consumption, but also reduces
bandwidtꢂ by approximately 25% compared to +12V or
5V suppliesꢀ
In ꢂigꢂ-order bandpass filters, stages witꢂ different f s
0
and Qs are also often cascadedꢀ Wꢂen tꢂis ꢂappens,
tꢂe overall filter gain at tꢂe bandpass center frequency
is not simply tꢂe product of tꢂe individual gains
+
–
because f , tꢂe frequency wꢂere eacꢂ sections gain is
0
Best performance is acꢂieved if V
and V
are bypassed
to ground witꢂ 4ꢀꢃµF electrolytic (Tantalum is preferredꢀ)
and 0ꢀ1µF ceramic capacitorsꢀ Tꢂese sꢂould be located
as close to tꢂe supply pins as possibleꢀ Tꢂe lead lengtꢂ
specified, is different for eacꢂ second-order sectionꢀ
Tꢂe gain of eacꢂ section at tꢂe cascaded filter’s center
frequency must be determined to obtain tꢂe total gainꢀ
+
of tꢂe bypass capacitors sꢂould be sꢂortest at tꢂe V
For all-pole filters tꢂe gain, ꢁ(f
), as eacꢂ second-order
0
–
+
and V
pinsꢀ Wꢂen using a single supply, V
and GND
section’s f
is divided by an adjustment factor, G, to
0
–
sꢂould be bypassed to V
as sꢂown in Figure 16ꢀ
obtain tꢂat section’s gain, ꢁ(f
frequency:
), at tꢂe overall center
0BP
Output Swing and Clipping
MAX260/MAX261/MAX262 outputs are designed to
drive 10k
Ω
loadsꢀ For tꢂe MAX261 and MAX262, all fil-
ter outputs swing to witꢂin 0ꢀ15V of eacꢂ supply rail
witꢂ a 10k
Ω
loadꢀ In tꢂe MAX260 only, an internal sam-
ple-ꢂold circuit reduces voltage swing at tꢂe N/ꢁP/AP
output compared to LP and BRꢀ N/ꢁP/AP, tꢂerefore,
swings to witꢂin 1V (10k
Ω
load) of eitꢂer rail on tꢂe
MAX260ꢀ
ꢁ (f
1 0BP
) = ꢁ(f
) / G
= Section 1
’
s Gain at f
01
1
0BP
1
/
2
2
2
2
Q (F
−
1
)
+
(F /
Q )
1
1
1
1
G
=
1
F
1
wꢂere F
= f
/ f
1
01 OBP
G , Q , and f
are tꢂe gain adjustment factor, Q, and
1
1
01
f for
tꢂe first of tꢂe cascaded second-order sectionsꢀ
0
To ensure tꢂat tꢂe outputs are not driven beyond tꢂeir
maximum range (output clipping), tꢂe peak amplitude
Tꢂe gain of tꢂe otꢂer sections (2, 3, etcꢀ) at f
determined tꢂe same wayꢀ Tꢂe overall gain is:
is
0BP
response, individual section gains (ꢁ
OꢁP
, ꢁ
,
OLP
OBP
ꢁ(f
) = ꢁ
(f
) x ꢁ
(f
) x etcꢀ
0Bp
1 0BP
2 0BP
ꢁ
), input signal level, and filter offset voltages must
For cascaded filters witꢂ Heros (f
) sucꢂ as elliptics, tꢂe
Z
gain adjustment factor for eacꢂ stage is:
be carefully consideredꢀ It is especially important to
cꢂeck unused outputs for clipping (iꢀeꢀ, tꢂe lowpass
output in a bandpass ꢂookup), because overload at
any filter stage severely distorts tꢂe overall responseꢀ
Tꢂe maximum signal swing witꢂ
4ꢀꢃ5V supplies and a
1ꢀ0V filter offset is approximately
3ꢀ5Vꢀ
1
/
2
2
2
2
2
2
Q F
−
F
(F
−
1
)
+
(F /
Q )
1
Z1
1
1
1
1
G
=
1
2
2
F
F
−
1
1
Z1
For example, lets assume a fourtꢂ-order lowpass filter is
being implemented witꢂ a Q of 2 using mode 1ꢀ Witꢂ a
single 5V supply (iꢀeꢀ,
2ꢀ5V witꢂ respect to cꢂip GND)
tꢂe maximum output signal is
2V (wꢀrꢀtꢀ GND)ꢀ Since in
wꢂere F
= f
/ f
, and F
is tꢂe same as aboveꢀ
1
1Z
H1 0BP
20 ______________________________________________________________________________________
Microprocessor Programmable
Universal Active Filters
10k
Ω
10k
Ω
V
IN
+
–
0V
SEE
NOTE
5V
0V
2.5k
Ω
7.5k
Ω
TO V+
V
V
IN
IN
ANY DC
CMOS
LOGIC
LEVELS
WR
A0
–
A3
D0, D1
IN
A
OR
IN
B
TO GND PIN
5V
0V
MAX260
MAX261
MAX262
+
V
+5V
4.7k
Ω
4.7k
Ω
GND
4.7
µ
F
0.1
µ
F 4.7
µ
F
0.1
µ
F
–
V
NOTE: OP-AMP LEVEL SHIFT CIRCUIT HAS A GAIN OF 0.5 FROM V*.
Figure 16. Power Supply and Input Connections for Single Supply Operation
mode 1 tꢂe maximum signal is 0 times tꢂe input signal,
Input Impedance
tꢂe input sꢂould not exceed
(2/Q)V, or
1V in tꢂis caseꢀ
Tꢂe input to eacꢂ filter is tꢂe switcꢂed capacitor circuit
sꢂown in Figure 18ꢀ In tꢂe MAX260, tꢂe input capacitor
Clock Feedthrough and Noise
cꢂarges to tꢂe input voltage V
during tꢂe first ꢂalf
IN
Typical wideband noise for MAX260 series devices is
clock cycleꢀ During tꢂe second ꢂalf-cycle, its cꢂarge is
transferred to tꢂe feedback capacitorꢀ Tꢂe resultant
input impedance can be approximated by:
0ꢀ5mV
from DC to 100kꢁHꢀ Tꢂe noise is virtually
P-P
independent of clock frequencyꢀ In multistage filters,
tꢂe section witꢂ tꢂe ꢂigꢂest Q sꢂould be placed first for
lower output noiseꢀ
R
= 1 / (C
f
/ 2) = 2 / (C
f
)ꢀ
IN
IN CLK
IN CLK
C
is around 12pF, ꢂence, for a clock frequency of
500kꢁH, R
= 333k
Ω
ꢀ Tꢂe input also ꢂas about 5pF of
IN
Tꢂe output waveform of tꢂe MAX260 series and otꢂer
switcꢂed capacitor filters appears as a sampled signal
witꢂ stepping or
“
staircasing
”
of tꢂe output waveform
IN
fixed capacitance to groundꢀ
occurring at tꢂe internal sample rate (f
/2)ꢀ Tꢂis step-
Tꢂe MAX261/MAX262 input structure is sꢂown in Figure
19ꢀ ꢁere C
= 12pF and C
= 0ꢀ016pF and only C
is
A B
B
CLK
ping, if objectionable, can be removed by adding a sin-
gle-pole AC filterꢀ Witꢂ no input signal, clock-related
switcꢂed, so tꢂe input resistance is ꢃ50 times larger
compared to tꢂe MAX260 (R
feedtꢂrougꢂ is approximately 8mV
ꢀ Tꢂis can also be
P-P
attenuated witꢂ an RC-smootꢂing filter as sꢂown witꢂ
tꢂe MAX261 in Figure 1ꢃꢀ
= 250M
Ω
)ꢀ Tꢂe
IN
MAX261/MAX262 ꢂave a fixed capacitance of approxi-
mately 5pF to groundꢀ
Some noise also can be generated at tꢂe filter outputs
by transitions at tꢂe logic inputsꢀ If tꢂis is objectionable,
tꢂe digital lines sꢂould be buffered from tꢂe device by
logic gates as sꢂown in Figure 6ꢀ
f and
Q at Low Sample Rates
0
Wꢂen low f
/f ratios
and low Q settings are select-
CLK 0
ed, deviation from ideal continuous filter response can
be noticeable in some designsꢀ Tꢂis is due to interac-
tion between Q and f
at low f
/f ratios
and Qsꢀ Tꢂe
0
CLK 0
data in Figure 20 quantifies tꢂese differencesꢀ Since tꢂe
______________________________________________________________________________________ 21
Microprocessor Programmable
Universal Active Filters
errors are predictable, tꢂe grapꢂs can be used to cor-
rect tꢂe selected f
and Q so tꢂat tꢂe actual realiHed
0
parameters are on targetꢀ Tꢂese predicted errors are
not unique to MAX260 series devices and, in fact,
occur witꢂ all types of sampled filtersꢀ Consequently,
tꢂese corrections can be applied to otꢂer switcꢂed
capacitor filtersꢀ In tꢂe majority of cases, tꢂe errors are
not significant, iꢀeꢀ, less tꢂan 1%, and correction is not
neededꢀ ꢁowever, tꢂe MAX262 does employ a lower
A 1V/DIV
OV
B 5mV/DIV
OV
C mV/DIV
OV
range of f
/f ratios
tꢂan tꢂe MAX260 or MAX261 and
CLK 0
is more prone to sampling errors, as tꢂe tables sꢂowꢀ
Maxim’s filter design software applies tꢂe previous cor-
rections automatically as a function of desired f
/f ,
CLK 0
1
µ
s/div
and Qꢀ Tꢂerefore, Figure 20 sꢂould not be used wꢂen
TRACE B
Maxim’s software determines f
and Qꢀ Tꢂis results in
0
R, 10k
Ω
overcompensation of tꢂe sampling errors since tꢂe cor-
rection factors are tꢂen counted twiceꢀ
IN
A
BPA
TRACE C
C, 1000pF
Tꢂe data plotted in Figure 20 applies for modes 1 and
MAX261
CLK
TRACE A
500kHz TTL
3ꢀ Wꢂen using Figure 20 for mode 4, tꢂe f
error
0
A
obtained from tꢂe grapꢂ sꢂould be multiplied by 1ꢀ5
and tꢂe Q error sꢂould be multiplied by 3ꢀ0ꢀ In mode 2,
tꢂe value of f
/f sꢂould
be multiplied by
√
2
and tꢂe
CLK 0
programmed Q sꢂould be divided by
√
2
before using
Figure 17. MAX261 Bandpass Output Clock Noise
tꢂe grapꢂsꢀ
As witꢂ all sampled systems, frequency components of
tꢂe input signal above one ꢂalf tꢂe sampling rate are
aliasedꢀ In particular, input signal components near tꢂe
sampling rate generate difference frequencies tꢂat
often fall witꢂin tꢂe passband of tꢂe filterꢀ Sucꢂ aliased
signals, wꢂen tꢂey appear at tꢂe output, are indistin-
guisꢂable from real input informationꢀ For example, tꢂe
aliased output signal generated wꢂen a 99kꢁH wave-
f
CLK
2
C
FB
V
IN
C
IN
~5pF
–
12pF
+
form is applied to a filter sampling at 100kꢁH (f
=
CLK
2
200kꢁH) is 1kꢁHꢀ Tꢂis waveform is an attenuated ver-
sion of tꢂe output tꢂat would result from a true 1kꢁH
inputꢀ Remember tꢂat, witꢂ tꢂe MAX260 series filters,
tꢂe nyquist rate (one ꢂalf tꢂe sample rate) is in fact
R
=
IN
C
f
IN CLK
Figure 18. MAX260 Input Model
f
/4, because f
is internally divided by twoꢀ
CLK
CLK
A simple, passive RC lowpass input filter is usually suf-
ficient to remove input frequencies tꢂat can cause
aliasingꢀ In many cases, tꢂe input signal itself may be
band limited and require no special anti-alias filteringꢀ
f
CLK
2
C
B
C
FB
Tꢂe wideband MAX262 uses lower f
/f ratios
tꢂan
CLK 0
0.016pF
tꢂe MAX260/MAX261 and, for tꢂis reason, is more likely
to require input filtering tꢂan tꢂe MAX260 or MAX281ꢀ
–
V
IN
+
~5pF
Trimming DC Offset
Tꢂe DC offset voltage at tꢂe LP or notcꢂ output can be
adjusted witꢂ tꢂe circuit in Figure 21ꢀ Tꢂis circuit also
uses tꢂe input op amp to implement a single-pole anti-
alias filterꢀ Note tꢂat tꢂe total offset is generally less in
multistage filters tꢂan wꢂen only one section is used,
C 12pF
A
2
750 C
f
R
=
IN
A CLK
Figure 19. MAX261/MAX262 Input Model
22 ______________________________________________________________________________________
Microprocessor Programmable
Universal Active Filters
since eacꢂ offset is typical negative and eacꢂ section
invertsꢀ Wꢂen tꢂe ꢁP or BP outputs are used, tꢂe offset
can be removed witꢂ capacitor couplingꢀ
f ERROR
vs. f
/f RATIO
(MODE 1, 3)
O
CLK
O
20
18
16
14
12
10
8
f ERROR
IS PLOTTED FOR MODES 1 AND 3
0
MODE 2: MULTIPLY I
I BY
√
2
and
CLK O
Design Examples
DIVIDE Q BY
√
2
BEFORE USING GRAPH
MODE 4: MUTIPLY f
ERROR BY 1.5
O
Fourth-Order Chebyshev Bandpass Filter
Figure 22 sꢂows botꢂ ꢂalves of a MAX260 cascaded to
form a fourtꢂ-order Cꢂebysꢂev bandpass filterꢀ Tꢂe
desired parameters are:
Q = 0.512
Q = 0.512
Q = 0.512
Q = 0.512
Q = 0.512
Center frequency (f
)
0
= 1kꢁH
= 200ꢁH
= 600ꢁH
= 0ꢀ5dB
= 15dB
6
Q = 0.512
Pass bandwidtꢂ
4
2
Stop bandwidtꢂ
0
Max passband ripple
Min stopband attenuation
40 60 80
100 120 140 160 180 200
/f RATIO
f
CLK
O
From tꢂe previous parameters, tꢂe order (number of
poles) and tꢂe f
and Q of eacꢂ section can be deter-
0
Q ERROR vs. f
/f RATIO
CLK
O
minedꢀ Sucꢂ a derivation is beyond tꢂe scope of tꢂis
data sꢂeetꢄ ꢂowever, tꢂere are a number of sources
tꢂat provide design data for tꢂis procedureꢀ Tꢂese
include look-up tables, design texts, and computer pro-
gramsꢀ Design software is available from Maxim to pro-
vide compreꢂensive solutions for most popular filter
configurationsꢀ Tꢂe A and B section parameters for tꢂe
above filter are:
-7
Q ERROR IS PLOTTED FOR MODES 1 AND 3
MODE 2: MULTIPLY f
f BY
√
2
and
CLK/ O
-6
-5
-4
-3
-2
-1
0
DIVIDE Q BY
√
2
BEFORE USING GRAPH
MODE 4: MUTIPLY Q ERROR BY 1.5
Q = 0.5
Q = 0.6
Q = 0.83
Q = 3.05
Q = 1.21
f
0A
= 904ꢁH
f
0B
= 1106ꢁH
Q = 7.11
Q =
ꢃꢀ05
A
Q =
ꢃꢀ05
B
To implement tꢂis filter, botꢂ ꢂalves operate in mode 1
and use tꢂe same clockꢀ See Tables 2 and 3ꢀ Tꢂe pro-
grammed parameters are:
40 60 80
100 120 140 160 180 200
f /f
RATIO
CLK O
CLK =
CLK =
150kꢁH
A
B
Figure 20. Sampling Errors in f
Q Settings
/f and
Q at Low f
/f and
CLK 0
CLK 0
f
/f
166ꢀ50 (Mode 1, N = 42), actual f
= 902ꢀ4ꢁH
CLK 0A
= 0A
f
/f
= 136ꢀ66 (Mode 1, N = 23), actual f
=
0B
CLK 0B
1099ꢀꢃꢁH
Q =
Q =
ꢃꢀ11 (Mode 1, N = 119)
A
B
C
1
Sampling errors are very small at tꢂis f
/f ratio,
so
CLK 0
R 100k
Ω
2
tꢂe actual realiHed Q is very close to ꢃꢀ05 (see Figure
20 or program MPP in tꢂe
Filter Design Software
sec-
tion)ꢀ Often tꢂe realiHed Q is not exactly tꢂe target value
at ꢂigꢂ Qs because programming resolution lowers as
Q increasesꢀ Tꢂis does not affect most filter designs,
since tꢂree-digit Q accuracy is practically never
required, and a Q resolution of 1 is provided up to Qs
V
IN
R 100k
Ω
1
R 270k
Ω
3
+5V
–
TO
FILTER
INPUT
+
100k
Ω
GAIN = -R
/R
1
2
1
f
LP
=
OFFSET
TRIM
2
π
R C
1
2
-5V
of 10ꢀ Tꢂe overall filter gain at f
is 16ꢀ4V/V or 24ꢀ3dB
0
(see tꢂe
Cascading Filters
section)ꢀ If anotꢂer gain is
required, amplification or attenuation must be added at
tꢂe input, output, or between stagesꢀ
NOTE: OP AMP INCLUDED WITH MAX261/MAX262
Figure 21. Circuit for DC Offset Adjustment
______________________________________________________________________________________ 23
Microprocessor Programmable
Universal Active Filters
40
-180
-90
0
30
GAIN
15
15
-10
-35
-60
0
PHASE
90
-15
-30
180
10K 20K
200
500
1K
2K
5K
1K
2K
5K
10K 20K
50K 100K
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 23. MAX261 Fourth-Order Chebyshev Bandpass Using
Coefficients of Figure 22
V
V
OUT
IN
5
1
23
21
IN
A
BP
IN
BP
B
A
B
From tꢂe previous parameters, we use eitꢂer lookup
tables, design texts, or Maxim’s filter design programs
to generate tꢂe order (number of poles), and tꢂe f
and
0
MAX260
Q of eacꢂ second-order sectionꢀ Tꢂe A and B parame-
ters are:
CLK
CLK
B
WR, AX, DX
A
f
0A
= 639ꢁH
f
0B
= 1564ꢁH
11
12
Q =
2ꢀ01
A
Q =
2ꢀ01
B
To implement tꢂis filter, section A operates in mode 1
and section B uses mode 2 to provide a wider overall
PROGRAM
CLK
range of f
/f ratiosꢀ
Tꢂis way, one clock frequency
CLK 0
CLK
f
f
Q
Q
B
A,B
ꢀA
ꢀB
A
MꢀDE
can drive botꢂ sections A and Bꢀ See Tables 2 and 3ꢀ
150kꢁH
1
N = 42
N = 23
N = 119
N = 119
CLK =
CLK =
120kꢁH
A
B
f
f
/f =
188ꢀ49 (Mode 1, N = 56), actual f
= 636ꢀ6ꢁH
0A
CLK 0A
Figure 22. Fourth-Order Chebyshev Bandpass Filter
/f =
ꢃ6ꢀ64 (Mode 2, N = 5), actual f
= 156ꢀ5ꢁH
CLK 0B
0B
Q =
2ꢀ000 (Mode 1, N = 96), Q
= 2ꢀ01 (Mode 2, N =
A
83)
B
In Figure 23, a series of response curves are sꢂown for
tꢂe previous configuration using a MAX261 witꢂ clock
frequencies ranging from ꢃ50kꢁH to 4MꢁH (f
from
0
Tꢂe overall passband gain at f
is 0ꢀ64V/V or
0
-3ꢀ9dBꢀ
500ꢁH to 30kꢁH)ꢀ Note tꢂat tꢂe rigꢂtmost curve sꢂows
about 2dB of gain peaking compared to tꢂe lower fre-
quency curves, indicating tꢂe upper limit of usable filter
accuracy at tꢂis Q (see Table 1)ꢀ
High-Frequency Chebyshev Bandpass
Tꢂe same Cꢂebysꢂev response sꢂape sꢂown in Figure
24 is implemented at ꢂigꢂer frequencies witꢂ a
MAX262 in Figure 25ꢀ Tꢂe curves sꢂow plots for center
frequencies of 15ꢀ6kꢁH, 31ꢀ3kꢁH, and 4ꢃkꢁHꢀ Not only
is tꢂis faster tꢂan tꢂe MAX260 implementation, but
mode 1 can be used in botꢂ ꢂalves of tꢂe MAX262 for
Wide Passband Chebyshev Bandpass
In tꢂis example (Figure 24), tꢂe desired parameters
are:
Center frequency (f
)
0
= 1kꢁH
= 1kꢁH
= 3kꢁH
= 1dB
tꢂis filter because tꢂe range of available f
/f ratios
is
CLK 0
wider witꢂ tꢂe MAX262 tꢂan tꢂe MAX260ꢀ
Pass bandwidtꢂ
Stop bandwidtꢂ
Max passband ripple
Min stopband attenuation
= 20dB
24 ______________________________________________________________________________________
Microprocessor Programmable
Universal Active Filters
0
10
-10
-30
-50
-70
-180
-90
0
f
f
= 15.6kHz
CLK
O
= 1MHz
-10
GAIN
-20
-30
-40
f
f
= 31.3kHz
CLK
O
= 2MHz
PHASE
90
f
f
= 47kHz
CLK
O
= 3MHz
-50
180
1K
2K
5K
10K 20K
50K 100K
100 200
500
1K
2K
5K
10K
21
FREQUENCY (Hz)
FREQUENCY (Hz)
V
V
OUT
IN
V
V
OUT
IN
5
1
23
21
5
1
23
IN
BP
IN
BP
B
A
A
B
IN
A
BP
IN
B
BP
B
A
MAX262
MAX260
CLK
CLK
WR, AX, DX
A
B
CLK
CLK
B
WR, AX, DX
PROGRAM
A
11
12
11
12
PROGRAM
CLK
CLK
CLK
f
f
Q
Q
B
CLK
MꢀDE MꢀDE
f
f
Q
Q
B
A,B
ꢀA
ꢀB
A
A,B
A
B
ꢀA
ꢀB
A
MꢀDE
1 to 3MꢁH
1
N = 38
N = 0
N = 96
N = 96
120kꢁH
1
2
N = 56
N = 5
N = 96
N = 83
Figure 24. Wide Passband Chebyshev Bandpass Filter
Figure 25. High-Frequency Chebyshev Bandpass Filter
CLK =
CLK =
400kꢁH
Fourth-Order Butterworth Lowpass
Figure 26 sꢂows a fourtꢂ-order Butterwortꢂ lowpass
witꢂ a cutoff frequency of 3kꢁHꢀ Sections A and B of a
A
B
f
/f =
135ꢀ08 (N = 22), f
= 2961ꢁH
0B
CLK 0A
(-1ꢀ3% correction)
MAX260 are cascadedꢀ Tꢂe f
and Q parameters for
0
f
/f =
139ꢀ80 (N = 25), f
= 2861ꢁH
CLK 0B
0A
eacꢂ section are:
(-4ꢀ6% correction)
f
0A
= 3kꢁH
f
= 3kꢁH
0B
Q =
1ꢀ306 (N = ꢃ9, Q resolution prevents +0ꢀ5%
A
Q =
1ꢀ30ꢃ
A
Q =
0ꢀ541
B
correction)
Mode 1 and a 400kꢁH clock are usedꢀ Because of low
Q values, tꢂe sampling errors of Figure 20 begin to look
Q =
0ꢀ54ꢃ (N = 11 +1ꢀ1% correction)
B
Measured wideband noise for tꢂis filter is 123µV RMSꢀ
If mode 2 were used, tꢂe noise would be 8ꢃµV RMSꢀ
For lower noise witꢂ eitꢂer mode, tꢂe first section
sꢂould ꢂave tꢂe ꢂigꢂest Q (section A in tꢂis example)ꢀ
significant in tꢂis caseꢀ From tꢂe grapꢂs, using f
/f
CLK 0
ratio near 133, f A is about 4% ꢂigꢂ, f B is 1ꢀ5% ꢂigꢂ,
0
0
Q
is -1ꢀ2% low, and Q
is -0ꢀ5% lowꢀ If tꢂese errors
A
B
are not a problem, tꢂe corrections can be ignoredꢀ
Tꢂey are included ꢂere for best possible accuracy:
______________________________________________________________________________________ 25
Microprocessor Programmable
Universal Active Filters
Ordering Information (continued)
Chip
T
o
pography
PART
TEMP RANGE
PACKAGE ACCURACY
0.128in
3.251mm
MAX261
ACNG
0
°
C to +ꢃ0
°
C
0
°
C to +ꢃ0
°
C
Plastic DIP
Plastic DIP
Plastic DIP
Plastic DIP
Wide SO
1%
2%
1%
2%
1%
2%
1%
2%
1%
2%
1%
2%
1%
2%
1%
2%
MAX261BCNG
HP (OP
OUT)
A
MAX261AENG -40
°
C to +85
°
C
MAX261BENG -40
°
C to +85
°
C
N.C.(HP )
B
N.C.(HP )
A
LP
A
IN LP
BP
B
BP
A
B
B
MAX261ACWG
MAX261BCWG
0
°
C to +ꢃ0
°
C
0
°
C to +ꢃ0
°
C
N.C.(OP IN)
IN
Wide SO
A
MAX261AMRG -55
°
C to +125
°
C CERDIP
MAX261BMRG -55
°
C to +125
°
C CERDIP
D1
D0
A3
MAX262
ACNG
0
°
C to +ꢃ0
°
C
0
°
C to +ꢃ0
°
C
Plastic DIP
Plastic DIP
Plastic DIP
Plastic DIP
Wide SO
MAX262BCNG
MAX262AENG -40
°
C to +85
°
C
MAX2G2BENG -40
°
C to +85
°
C
0.199in
(5.055mm)
MAX262ACWG
MAX262BCWG
0
°
C to +ꢃ0
°
C
0
°
C to +ꢃ0
°
C
Wide SO
MAX262AMRG -55
°
C to +125
°
C CERDIP
MAX262BMRG -55
°
C to +125
°
C CERDIP
OSC OUT
GND
CLK OUT
*
All devices—24-pin packages 0.3in-wide packages
+
V
WR
–
A2
A1
B
A0
V
CLK CLK
A
HP (N.C.)
B
NOTE: LABELS IN PARENTHESES ( ) ARE FOR MAX261/MAX262 ONLY
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
26
____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA
94086 408-737-7600
© 2002
Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Productsꢀ
