Analog-Devices-LS845-SOIC-8L
| Part # | Analog-Devices-LS845-SOIC-8L |
Download  | Analog-Devices-LS845-SOIC-8L |
LS844 Series
Low Noise, Monolithic Dual N-Channel JFET Amplifier
LOW INPUT CAPACITANCE MONOLITHIC DUAL N-CHANNEL JFET
FEATURES
S2
G1
S2
G1
Ultra-Low Noise
Low Leakage
e
n
=2.5nV/Hz @1kHz TYP.
I
G
=15pA TYPs.
D2
D1
D2
D1
Low Drift
I V
GS1-2
/TI=5µV/ºC max.
IV
GS1-2
I=1mV max.
G2
S1
Ultra-Low Offset Voltage
G2
S1
ABSOLUTE MAXIMUM RATINGS
1
@ 25°C (unless otherwise noted)
Maximum Temperatures
TO-71 6L
Top View
TO-78 6L
Top View
Storage Temperature
-55º to +150°C
-55º to +150°C
Operating Junction Temperature
Maximum Voltage and Current for Each Transistor
1
-V
GSS
Gate Voltage to Drain or Source
60V
I
G(f)
Gate Forward Current
50mA
SOIC-A 8L
Top View
SOT-23 6L
Top View
PDIP 8L
Top View
Maximum Power Dissipation
2
Device Dissipation
2
@ Free Air – Total
400mW T
A
=+25°C
* For equivalent single version, see LSK189
Features
Benefits
Applications
•
Low Noise: e
n
= 2.5nV/
√
Hz (typ),
f
= 1kHz, NBW = 1Hz
•
Very Low Common Source Input
Capacitance of C
ISS
= 3pF
–
typ and
8pF- max
•
Tight Differential Voltage Match vs. Current
•
Improved Op Amp Speed Settling Time
Accuracy
•
Minimum Input Error Trimming Error Voltage
•
Lower Intermodulation Distortion
•
Wideband Differential Amplifiers
•
High Speed Temperature
Compensated Single Ended Input
Amplifier Amps
•
High Speed Comparators
•
Impedance Converters
•
Sonobouys and Hydrophones
•
Acoustic Sensors
•
High Slew Rate
•
Low Offset/Drift Voltage
•
Low Gate Leakage I
GSS
and I
G
•
High CMRR 102 dB
Description
The LS844 Series provides an increase in capabilities for a wide
range of low-noise applications.
The LS844 Series
is the industry’s lowest input capacitance
and
low-noise monolithic dual N-Channel JFET. Low input
capacitance substantially reduces intermodulation distortion. In
addition, these dual JFETs feature tight offset voltage and low
drift over temperature range, and are targeted for use in a wide
range of precision instrumentation and sensor applications.
The most significant aspect of the LS844 Series is how it
combines a noise level comparable with the LSK389 while having
much lower gate-to-drain capacitance, 4pF versus the 25pF. The
slightly higher noise of the LS844 Series, versus the LSK389, is
The LS844 Series is available in surface mount plastic SOIC 8L,
not significant in most instances, while the much lower
capacitance enables designers to produce simpler, more elegant
circuit designs with fewer devices that cost less in production.
PDIP 8L and SOT-23 6L packages. Additionally, it is offered in
thru-hole metal cans; the TO-71 6L and TO-78 6L package.
For an equivalent single N-Channel version refer to the LSK189
Like the Linear Systems LSK389, the LS844 Series features a
datasheet. LS844 Series TO-71 6L and SOIC 8L are fit, form and
unique design construction of interleaving both JFETs on the same
piece of silicon to provide excellent matching and thermal tracking,
as well a low-noise profile having nearly zero popcorn noise.
pin compatible to the same LSK389 product.
Doc 201144
05/13/2022 Rev#
A16 ECN#
LS844 Series
Page | 1
LS844 Series
Low Noise, Low Capacitance, Monolithic Dual N-Channel JFET Amplifier
Electrical Characteristics @ 25ºC (unless otherwise noted)
SYMBOL
CHARACTERISTIC
Drift vs. Temperature
Offset Voltage
LS843 LS844
LS845 UNITS
CONDITIONS
V
DG
= 10V
I
D
= 500µA
I
D
= 500µA
I V
GS1-2
/ TI max.
IV
GS1-2
I max.
5
1
10
5
25
15
µV/ºC
mV
T
A
= -55ºC to +125ºC
V
GS
= 10V
SYMBOL
BV
GSS
CHARACTERISTIC
Breakdown Voltage
MIN.
-60
TYP. MAX.
UNITS CONDITIONS
—
—
—
—
V
V
V
DS
= 0
I
D
= -1nA
BV
GGO
Gate-to-Gate Breakdown
±60
I
GGO
= ±1µA
I
D
= 0
I
S
= 0
TRANSCONDUCTANCE
Full Conduction
G
fss
1500
1000
—
—
—
—
3
µS
µS
%
V
DS
= 15V
V
DS
= 15V
V
GS
= 0
f = 1kHz
G
fs
Typical Conduction
Mismatch
1500
0.6
I
D
= 500µA
│
G
fs1-2
/G
fs1
│
DRAIN CURRENT
Full Conduction
I
DSS
1.5
—
5
1
15
5
mA
%
V
DS
= 15V
V
GS
= 0
│I
DSS1-2
/I
DSS
V
GS
(off)
V
GS
│
Mismatch at Full Conduction
GATE VOLTAGE
Pinchoff Voltage
-1
—
—
-3.5
-3.5
V
V
V
DS
= 15V
V
DS
= 15V
I
D
= 1nA
Operating Range
-0.5
I
D
= 500µA
GATE CURRENT
Operating
-I
G
—
—
—
—
15
—
50
50
pA
nA
pA
pA
V
DG
= 15V
V
DG
= 15V
V
DG
= 3V
I
D
= 500µA
-I
G
High Temperature
Reduced VDG
I
D
= 500µA
T
A
=+125ºC
I
D
= 500µA
-I
G
5
30
-I
GSS
At Full Conduction
—
100
V
GS
= 15V
V
GS
= 0
OUTPUT CONDUCTANCE
Full Conduction
G
OSS
—
—
—
—
40
2.7
0.2
µS
µS
µS
V
DS
= 15V
V
DS
= 15V
V
GS
= 0
2.0
G
OS
│G
OS 1-2
Operating
Differential
I
D
= 200µA
│
0.02
Doc 201144
05/13/2022 Rev#
A16 ECN#
LS844 Series
Page | 2
LS844 Series
Low Noise, Low Capacitance, Monolithic Dual N-Channel JFET Amplifier
SYMBOL
CHARACTERISTIC
MIN.
TYP. MAX.
UNITS
CONDITIONS
COMMON MODE REJECTION
CMRR
90
—
100
85
—
—
dB
dB
V
DS
= 10 to 20V
I
D
= 500µA
I
D
= 500µA
–
20 log │∆V
GS1-2
/ ∆V
DS
│
CMRR
V
DS
= 5 to 10V
V
DS
= 15V
I
D
= 2.0mA
f= 1kHz
e
n
Voltage
—
—
—
—
3.0
7.0
nV/Hz
nV/Hz
NBW= 1Hz
V
DS
= 15V
I
D
= 2.0mA
f= 10Hz
e
n
Voltage
NBW= 1Hz
CAPACITANCE
Input
C
ISS
—
—
—
—
—
8
3
—
pF
pF
pF
V
DS
= 15V
V
DD
= 15V
I
D
= 500µA
f= 1mHz
I
D
= 500µA
f= 1mHz
C
RSS
C
DD
Reverse Transfer
Drain-to-Drain
0.5
Notes:
1. Absolute
maximum ratings are limiting values above which serviceability may be impaired.
2.
Pulse width ≤
2
ms
.
3. All
MIN/TYP/MAX Limits are absolute values.
Negative signs indicate electrical polarity only.
4. Derate
2.4 mW/°C above 25°C.
5. Derate
4 mW/°C above 25°C.
Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is
assumed for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license
is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.
Doc 201144
05/13/2022 Rev#
A16 ECN#
LS844 Series
Page | 3
LS844 Series
Low Noise, Low Capacitance, Monolithic Dual N-Channel JFET Amplifier
Typical Characteristics
Doc 201144
05/13/2022 Rev#
A16 ECN#
LS844 Series
Page | 4
LS844 Series
Low Noise, Low Capacitance, Monolithic Dual N-Channel JFET Amplifier
Typical Characteristics Continued
Doc 201144
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A16 ECN#
LS844 Series
Page | 5
LS844 Series
Low Noise, Low Capacitance, Monolithic Dual N-Channel JFET Amplifier
Typical Characteristics Continued
Doc 201144
05/13/2022 Rev#
A16 ECN#
LS844 Series
Page | 6
LS844 Series
Low Noise, Low Capacitance, Monolithic Dual N-Channel JFET Amplifier
Typical Characteristics Continued
Doc 201144
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A16 ECN#
LS844 Series
Page | 7
LS844 Series
Low Noise, Low Capacitance, Monolithic Dual N-Channel JFET Amplifier
Package Dimensions:
TO-71
6 Lead
TO-78
6 Lead
PDIP
8 Lead
SOT-23
6 Lead
0.95
0.35
0.50
1
2
3
6
5
4
2.80
3.00
1.90
SOIC
1.50
1.75
8 Lead
0.90
1.30
2.60
3.00
0.09
0.20
0.10
0.60
0.00
0.15
BOTTOM
VIEW
BOTTOM
VIEW
*All DIMENSIONS IN INCHES EXCEPT FOR THE SOT-23 6L PACKAGE,
WHICH IS IN MILLIMETERS
Ordering Information:
Standard Part Call-Out
LS845 TO-71 6L RoHS
LS845 TO-78 6L RoHS
LS843 TO-71 6L RoHS
LS843 TO-78 6L RoHS
LS843 SOT-23 6L RoHS
LS843 SOIC 8L RoHS
LS843 PDIP 8L RoHS
LS844 TO-71 6L RoHS
LS844 TO-78 6L RoHS
LS844 SOT-23 6L RoHS
LS844 SOIC 8L RoHS
LS844 PDIP 8L RoHS
LS845 SOT-23 6L RoHS
LS845 SOIC 8L RoHS
LS845 PDIP 8L RoHS
Custom Part Call-Out
(Custom Parts Include SEL + 4 Digit Numeric Code)
LS845 TO-71 6L RoHS SELXXXX
LS845 TO-78 6L RoHS SELXXXX
LS843 TO-71 6L RoHS SELXXXX
LS843 TO-78 6L RoHS SELXXXX
LS843 SOT-23 6L RoHS SELXXXX
LS843 SOIC 8L RoHS SELXXXX
LS843 PDIP 8L RoHS SELXXXX
LS844 TO-71 6L RoHS SELXXXX
LS844 TO-78 6L RoHS SELXXXX
LS844 SOT-23 6L RoHS SELXXXX
LS844 SOIC 8L RoHS SELXXXX
LS844 PDIP 8L RoHS SELXXXX
LS845 SOT-23 6L RoHS SELXXXX
LS845 SOIC 8L RoHS SELXXXX
LS845 PDIP 8L RoHS SELXXXX
Doc 201144
05/13/2022 Rev#
A16 ECN#
LS844 Series
Page | 8
