ANHI-ASW65R072EFDA

Part #ANHI-ASW65R072EFDA
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ANHI-ASW65R072EFDA
ASW65R072EFDA  
MOSFET Silicon N-Channel MOS  
1. Applications  
Soft Switching Boost PFC switch, Half bridge or Asymmetric half bridge or  
Series resonance half bridge and full bridge topologies.  
Such as phase-shift-bridge(ZVS),LLC Application-Server Power,  
Telecom Power, EV Charging, Solar inverter.  
2. Features  
Low drain-source on-resistance: RDS(ON) = 0.060
Ω (typ.)  
Easy to control Gate switching  
Enhancement mode: Vth = 3 to 5 V  
Table 1
 
Key Performance Parameters  
Parameter  
V

DS

@ T

j,max  

R

DS(on),max  

Q

g,typ  

Value  
700  
72  
Unit  
V
m
Ω  
nC  
A
93.87  
162  
I

D,pulse  

Body diode dv/dt  
50  
V/ns  
3. Packaging
 
and Internal Circuit  
Part Name  
Package  
Marking  
ASW65R072EFDA  
TO247  
ASW65R072EFDA  
TO247  

ASW65R072EFDA  
1
Maximum ratings  
at
T
j
= 25°C, unless otherwise specified  
Table 2
 
Maximum ratings  
Values  
Typ.  
Parameter  
Symbol  
Unit Note
 
/ Test Condition  
Min.  
Max.  
Continuous drain current

1)  

Pulsed drain current

2)  

I

D  

A
–
–
54  
T

C

=25°C  
T

C

=25°C  
I

D,pulse  

–
–
162  
A
Tc=25℃, V

DD

=50V, L=10mH,  
RG=25Ω  
Avalanche energy, single pulse  
E

AS  

–
793  
mJ  
V

DS

=0…400V  
static;  
MOSFET dv/dt ruggedness  
Gate source voltage (static)  
Gate source voltage (dynamic)  
Power dissipation  
dv/dt  
V

GS  

V

GS  

P

tot  

T

stg  

T

j  

–
–
–
–
–
–
–
36  
V/ns  
V
-20  
-30  
–
20  
30  
V
AC (f>1 Hz)  
T

C

=25°C  
172  
150  
150  
W
Storage temperature  
-55  
-55  
°C  
°C  
Operating junction temperature  
V

R

=400V,
I

F

=25 A, d
i

F

/d
t
=100A/µs;  
see table 8  
Reverse diode dv/dt

3)  

dv/dt  
–
–
50  
V/s  

1)

Limited by T

j,max

. Maximum Duty Cycle D = 0.50  

2)

Pulse width t

p

limited by T

j,max  

3)

Identical low side and high side switch with identical R
G  

ASW65R072EFDA  
2
Thermal characteristics  
Table 3
 
Thermal characteristics  
Values  
Parameter  
Symbol  
Unit Note
 
/ Test Condition  
Min.  
Typ.  
Max.  
0.73  
62  
Thermal resistance, junction – case  
Thermal resistance, junction – ambient  
R

thJC  

R

thJA  

–
–
–
–
°C/W  
–
°C/W device
 
on PCB, minimal footprint  

ASW65R072EFDA  
3
Electrical characteristics  
at
T
j
=25°C, unless otherwise specified  
Table 4
 
Static characteristics  
Values  
Typ.  
–
Parameter  
Symbol  
Unit Note
 
/ Test Condition  
Min.  
655  
3
Max.  
V

GS

=0V,
I

D

=250uA  
Drain-source breakdown voltage  
Gate threshold voltage  
V

(BR)DSS  

V

(GS)th  

I

DSS  

I

GSS  

–
V
V
V

DS

=
V

GS

,
I

D

=250uA  
5
V

DS

=650V,
V

GS

=0V,
T

j

=25°C  
uA  
nA  
Ω
–
–
–
–
–
Zero gate voltage drain current  
Gate-source leakage current  
2
V

GS

=30V,
V

DS

=0V  
100  
0.060 0.072  
V

GS

=10V,
I

D

=14A,
T

j

=25°C  
R

DS(on)  

R

G  

Drain-source on-state resistance  
Gate resistance  
Ω
–
1
–
f
=1MHz, open drain  
Table 5
 
Dynamic characteristics  
Values  
Typ.  
Parameter  
Symbol  
Unit Note
 
/ Test Condition  
Min.  
Max.  
V

GS

=0V,
V

DS

=50V,
f
=1MHz  
V

GS

=0V,
V

DS

=50V,
f
=1MHz  
V

GS

=0V,
V

DS

=50V,
f
=1MHz  
Input capacitance  
C

iss  

C

oss  

C

rss  

–
–
4528  
414.3  
3.08  
–
–
pF  
pF  
pF  
Output capacitance  
Reverse transfer capacitance  
V

GS

=13V,  
R

G

=5.3
Ω
;
see table 9  
V

DD

=400V,  
I

D

=17.1A,  
Turn-on delay time  
Rise time  
t

d(on)  

t

r  

t

d(off)  

t

f  

–
–
–
–
21.6  
10.7  
86.6  
8.6  
–
–
–
–
ns  
ns  
ns  
ns  
V

GS

=13V,  
V

DD

=400V,  
R

G

=5.3
Ω
;
see table 9  
I

D

=17.1A,  
V

GS

=13V,  
V

DD

=400V,  
R

G

=5.3
Ω
;
see table 9  
V

GS

=13V,  
I

D

=17.1A,  
Turn-off delay time  
Fall time  
V

DD

=400V,  
R

G

=5.3
Ω
;
see table 9  
I

D

=17.1A,  
Table 6
 
Gate charge characteristics  
Values  
Typ.  
Parameter  
Symbol  
Unit Note
 
/ Test Condition  
Min.  
Max.  
V

DD

=400V,
I

D

=17.1A,
V

GS

=0 to 10V  
V

DD

=400V,
I

D

=17.1A,
V

GS

=0 to 10V  
Gate to source charge  
Gate to drain charge  
Gate charge total  
Q

gs  

–
–
–
–
24.79  
34.94  
93.87  
6.01  
–
–
–
–
nC  
nC  
nC  
V
Q

gd  

V

DD

=400V,
I

D

=17.1A,
V

GS

=0 to 10V  
V

DD

=400V,
I

D

=17.1A,
V

GS

=0 to 10V  
Q

g  

Gate plateau voltage  
V

plateau  

ASW65R072EFDA  
Table 7
 
Reverse diode characteristics  
Values  
Typ.  
Parameter  
Symbol  
Unit Note
 
/ Test Condition  
Min.  
Max.  
Diode forward voltage  
Reverse recovery time  
V

SD  

t

rr  

–
0.64  
–
V
V

GS

=0V,
I

F

=1A,
T

j

=25°C  
V

R

=400V,
I

F

=33A, d
i

F

/d
t
=60A/µs;  
see table 8  
–
–
–
224.4  
1.09  
8.89  
–
–
–
ns  
V

R

=400V,
I

F

=33A, d
i

F

/d
t
=60A/µs;  
see table 8  
Reverse recovery charge  
Q

rr  

I

rrm  

uC  
V

R

=400V,
I

F

=33A, d
i

F

/d
t
=60A/µs;  
see table 8  
Peak reverse recovery current  
A

ASW65R072EFDA  
4
Electrical characteristics diagram  
Diagram 1: Typ. Output characteristics  
Diagram 2: Typ. Drain Current De-rating  
I

D

=f(
V

DS

);
T

j

=25 °C; parameter:
V

GS  

Id
=f(
T

C

);  
Diagram 3: Typ. Rdson vs. Drain Current  
Diagram 4: Typ. Rdson
–
Junction Temperature  
R

ds(on)

=f(
Id
);Vgs=10V  
R

ds(on)

=f(
T

j

);Vgs=10V/
I

D

=14A  
Diagram 5: Typ. transfer characteristics  
Diagram 6: Typ. Capacitance vs. Vds  
I

D

=f(
V

DS

);
T

j

=25 °C; parameter:
V

GS  

C
=f(
V

DS

);
V

GS

=0V;
f
=1MHz  

ASW65R072EFDA  
Diagram 7: Typ. BVDSS voltage vs. Temperature  
Diagram 8: Typ. Source-Drain Diode Forward  
V

GS

=f(
Tj
);
I

D

=250uA  
I

SD

=f(V

DS

); T

C

=25 °C;  
Diagram 9: Typ. Gate charge  
Diagram 10: Typ. Maximum Safe Operating Area  
V

GS

=f(
Q

gate

);
I

D

=17.1A pulsed; parameter:
V

DD  

I

D

=f(V

DS

); T

C

=25 °C; V

GS

> 7V; D=0; parameter tp  
Diagram 11: Typ. Power Dissipation  
Diagram 12: Normalized Transient Impedance  
P

tot
)

=f(
T

C

);  

ASW65R072EFDA  
5
Test Circuits  
Table 8
 
Diode characteristics  
Table 9
 
Switching times  
Table 10
 
Unclamped inductive load  

ASW65R072EFDA  
6
Package Outlines  
Figure
:
Outline PG‐TO247
(HT)  

ASW65R072EFDA  
Revision History  
Revision
Date  
Subjects (major changes since last revision)  
Preliminary version  
1.0  
2023-07-25