BORN-SI2333
| Part # | BORN-SI2333 |
| Download | BORN-SI2333 |
SI
2333
P
-Channel MOSFET
»
Feature
s
»
Pin Configurations
V
DS
=
-12
V
I
D
=
-5.1
A
R
R
@V =
-4.5
V,
TYP
=
28m
Ω
GS
DS(ON)
DS(ON)
@V =
-2.5
V,
TYP
=
38m
Ω
GS
»
General Description
Advanced tr
ench process technology
High Density Cell Design For Ultra Low
On-Resistance
SOT-23 for Surface Mount Package.
Absolute Maximum Ratings
@T
A
=25
℃
unless otherwise noted
»
C
h
a racteristic
Symbol
Max
U
i
n t
Drai
n
– S
o
u
r
ce
V
o
ltage
Gate- S
o
u
r
ce
V
o
lta
e
g
Drain C
u
r
re
n
t (c
o
n
t
i
o
n
u
s
Drain C
u
r
re
n
t (
p
u
l
se
)
d
Total De
v
i
ce Dissi
a
p
ti
n
o
BV
DSS
V
GS
–
2
1
V
V
+8
)
I
D
–
.
5
1
–
0
2
A
A
I
DM
P
5
2
1
0
mW
D
T
=
2
5
℃
A
T
J
J
u
n
c ti
o
n
0
5
1
℃
℃
T
stg
St
o
r a
g
e
Tem
p
e rat
r
u
e
–
t
5
+
o
5
1
0
Revision 2018
1 /
5
SI2333
Electrical Characteristics
@T
A
=25
℃
unless otherwise noted
»
C
h
a racteristic
Drai
n
– S
o
u
r
ce Brea
k
o
d
w
n
V
o
lta
g
e
Sym
l
o
b
Min
–
2
1
Typ
—
Max
—
U
i
n t
BV
V
V
V
DSS
(I
D
= –
2
5
0
u
A
,
V =
0
V
)
GS
Gate T
h
r
es
h
o
l d
V
o
lta
e
g
(I
D
= –
2
5
0
u
A
,
V =
V )
Di
o
d
e F
o
r
ward
V
o
lta
g
e
Dr
o
p
V
GS(t
)
h
–
.
0
4
—
—
-1
–
.
1
2
GS
DS
V
SD
—
(I
S
= -1 A,V
=0V)
GS
Zero Gate
V
o
lta
e
g
Drain C
r
u re
t
n
I
I
—
—
—
—
—
8
2
-1
+
0
1
5
3
u
A
n
A
DSS
(V =0
V,
V =
–
2
1
V )
GS
DS
Gate B
o
d
y
Lea
k
a
g
e
(V =+8
V,
V =
0
V
)
GSS
GS
DS
Static Drai
n
–
S
o
u
r ce
O
–
n State Resista
c
n e
R
DS(ON)
mΩ
mΩ
(I
D
= –
5
.
1
A
,
V =
–
4
.
5
V )
GS
Static Drai
n
–
S
o
u
r ce
O
–
n State Resista
c
n e
—
—
—
8
3
0
5
5
4
R
DS(ON)
R
DS(ON)
(I
D
= –
4
.
5
A
,
V =
–
2
5
. V)
GS
Static Drai
n
–
S
o
u
r ce
O
–
n State Resista
c
n e
mΩ
F
p
9
5
(I
D
= -2 A
,
V
= –
1
8
.
V)
GS
In
p
u
t Ca
p
a
cita
n
c e
C
0
2
9
—
—
ISS
(V =0
V,
V =
–
0
1
V,
f=1MHz)
GS
DS
O
u
t
p
u
t
Ca
p
a cita
n
c e
(V =0
V,
V =
–
0
1
V,
f=1MHz)
C
—
—
—
0
2
F
p
OSS
GS
DS
Tur
n
– ON
Time
(V =
–
1
0
V,
I =
-2A, R
t
(
n
o
)
—
—
s
n
s
n
8
0
6
=6
Ω
)
GEN
=6
Ω
)
GEN
DS
D
Tur
n
– OFF
Time
t
(
f
o f)
(V =
–
1
0
V,
I =
-2A, R
DS
D
Notes :
*Pulse Test : Pulse Width
≤
300µs, Duty Cycle
≤
2%.
Revision 2018
2
/
5
SI2333
»
Typical Performance Characteristics
(
(TJ = 25 °C, unless otherwise noted)
)
20
15
10
5
2.0
1.5
1.0
0.5
0.0
V
= 5
V
thr
u
2.5
V
GS
V
= 2
V
GS
T
= 25 °C
C
V
GS
= 1.5
V
T
C
= 125 °C
0.6
V
GS
= 1
V
T
C
= – 55 °C
0
0.0
0.5
1.0
1.5
2.0
0.0
0.3
0.9
1.2
1.5
V
– Drain-to-So
u
rce
V
oltage (
V
)
V
GS
– Gate-to-So
u
rce
V
oltage (
V
)
DS
Output Characteristics
Transfer Characteristics
0.10
0.0
8
0.06
0.04
0.02
0.00
2400
1
8
00
1200
600
0
C
iss
V
GS
= 1.
8 V
V
= 2.5
V
GS
V
GS
= 4.5
V
C
oss
C
rss
0
5
10
15
20
0
3
9
12
On-Resistance vs. Drain Current and Gate Voltage
Capacitance
8
6
4
2
0
1.6
1.4
1.2
1.0
0.
8
0.6
I
= 5.1 A
I
= 5.1 A
D
D
V
= 3
V
DS
V
GS
= 2.5
V
V
DS
= 6
V
V
GS
= 4.5
V
V
DS
= 9
V
0
5
10
15
20
25
– 50
– 25
0
25
50
75
100 125 150
Q
g
–
T
o
tal Gate Charge (nC)
Gate Charge
Revision 2018
3
/
5
SI2333
100
10
0.14
0.12
0.10
0.0
8
0.06
0.04
0.02
0.00
I
= 5.1 A
D
T
J
= 150 °C
1
T
= 25 °C
J
0.1
T
J
= 125 °C
T
J
= – 55 °C
0.01
0.001
T
J
= 25 °C
3
0.0
0.2
0.4
0.6
0.
8
1.0
1.2
0
1
2
5
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
0.4
0.3
10
8
I
= 250
µ
A
D
0.2
6
I
= 1 mA
D
0.1
4
0.0
2
T =
25 °C
A
– 0.1
– 0.2
0
– 50
– 25
0
25
50
75
100 125 150
0.01
0.1
1
10
100
1000
Single Pulse Power
Threshold Voltage
100
Limited
b
y R
*
DS(on)
100
µ
s
10
1
1 ms
10 ms
100 ms
0.1
1 s, 10 s
100 s, DC
T
= 25 °C
A
Single P
u
lse
B
V
DSS
Limited
0.01
0.1
1
10
100
V
DS
– Drain-to-So
u
rce
V
oltage (
V
)
Safe Operating Area
Revision 2018
4
/
5
SI2333
»
Package Information
SOT-23
»
Ordering information
Order code
Package
SO
T-23
Base qty
Deliver
y
m
ode
Tape and reel
Marking
2333
SI2333
3K
Revision 2018
5
/
5
