CET-Chino-Excel-Tech-CEC3172

Part #CET-Chino-Excel-Tech-CEC3172
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CET-Chino-Excel-Tech-CEC3172
CEC3172  
N-Channel Enhancement Mode Field Effect Transistor  
FEATURES  
PRELIMINARY  
D
30V, 26A, R

DS(ON)

= 20m
Ω
@V

GS

= 10V.  
R

DS(ON)

= 32m
Ω
@V

GS

= 4.5V.  
Super High dense cell design for extremely low R

DS(ON)  

High power and current handing capability.  
Lead-free plating ; RoHS compliant.  
.
G
S
D
D
D
D
6
7
5
8
Bottom View  
DFN3*3  
3
2
1
4
G S
 
S S  
ABSOLUTE MAXIMUM RATINGS
 
T

A

= 25 C unless otherwise noted  
Parameter  
Symbol  
V

DS  

V

GS  

I

D  

Limit  
Units  
Drain-Source Voltage  
30  
V
V
A
A
A
Gate-Source Voltage  
Drain Current-Continuous@R
θ
Jc  
@R
θ
JA  
±
20  
26  
I

D  

9
Drain Current-Pulsed

a

@R
θ
Jc  
I

DM  

92  
@R
θ
JA  
I

DM  

36  
A
W
C
Maximum Power Dissipation  
P

D  

2.5  
Operating and Store Temperature Range  
T
J
,T
stg  
-55 to 150  
Thermal Characteristics  
Parameter  
Symbol  
R
θ
Jc  
Limit  
6
Units  
C/W  
C/W  
Thermal Resistance, Junction-to-Case

b  

Thermal Resistance, Junction-to-Ambient

b  

R
θ
JA  
50  
This is preliminary information on a new product in development now .  
Details are subject to change without notice .  
Rev 1.
 
2013.Feb  
1

CEC3172  
Electrical Characteristics
 
T =
 
25 C unless otherwise noted  
c
Parameter  
Off Characteristics  
Symbol  
Test Condition  
Min  
Typ  
Max  
Units  
Drain-Source Breakdown Voltage  
Zero Gate Voltage Drain Current  
Gate Body Leakage Current, Forward  
Gate Body Leakage Current, Reverse  
On Characteristics

b  

BV

DSS  

I

DSS  

V

GS

= 0
V
,
I

D

= 250
µ
A  
V

DS

= 30
V
,
 
V

GS

= 0V  
V

GS

= 20
V
,
 
V

DS

= 0V  
V

GS

= -20
V
,
V

DS

= 0V  
30  
V
1
µ
A  
nA  
nA  
I

GSSF  

I
GSSR  
100  
-100  
Gate Threshold Voltage  
Static Drain-Source  
V

GS(th)  

R

DS(on)  

V

GS

= V

DS

, I

D

= 250
µ
A  
V
GS
= 10
V
,
I
D
= 6.3A  
V
GS
= 4.5
V
,
I
D
=5A  
1
3
V
14  
24  
20  
32  
m
Ω
 
m
Ω  
On-Resistance  
Dynamic Characteristics

c  

Input Capacitance  
C

iss  

C

oss  

C

rss  

590  
125  
95  
pF  
pF  
pF  
V

DS

= 15
V
,
V

GS

= 0
V
,  
f = 1.0 MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Switching Characteristics

c  

Turn-On Delay Time  
t

d(on)  

t

r  

t

d(off)  

t

f  

10  
4
ns  
ns  
V

DD

= 15
V
,
I

D

= 7A,  
V

GS

= 10
V
,
R

GEN

= 3
Ω  
Turn-On Rise Time  
Turn-Off Delay Time  
25  
4
ns  
Turn-Off Fall Time  
ns  
T
o
tal Gate Charge  
Q

g  

13  
2
nC  
nC  
nC  
V

DS

= 15
V
,
I

D

= 7A,  
V

GS

= 10V  
Gate-Source Charge  
Q

gs  

Q

gd  

Gate-Drain Charge  
3.5  
Drain-Source Diode Characteristics and Maximun Ratings  
Drain-Source Diode Forward Current  
Drain-Source Diode Forward Voltage

b  

I

S  

1.25  
1.2  
A
V
V

SD  

V

GS

= 0
V
,
I

S

= 2A  
Notes :  
a.Repetitive Rating : Pulse width limited by maximum junction temperature  
b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%.  
c.Guaranteed by design, not subject to production testing.  
2

CEC3172  
25  
20  
15  
10  
15  
12  
9
25 C  
V

GS

=10,8,6V  
V

GS

=4V  
6
V

GS

=3V  
3
5
0
T

J

=125 C  
-55 C  
0
0
1
2
3
4
5
0
1
2
3
4
5
V
DS
, Drain-to-Source Voltage (V)  
V
GS
, Gate-to-Source Voltage (V)  
Figure 1. Output Characteristics  
Figure 2. Transfer Characteristics  
2.2  
1.9  
1.6  
1.3  
1.0  
0.7  
0.4  
900  
750  
600  
450  
300  
150  
0
I

D

=30A  
V

GS

=10V  
C
iss  
C
oss  
C
rss  
-100  
-50  
0
50  
100  
150  
200  
0
3
6
9
12  
15  
V
DS
, Drain-to-Source Voltage (V)  
T
J
, Junction Temperature( C)  
Figure 3. Capacitance  
Figure 4. On-Resistance
V
a
riation  
with
T
e
mperature  
1.3  
1.2  
1.1  
1.0  
0.9  
0.8  
0.7  
0.6  
V

DS

=V

GS  

I

D

=250µA  
V

GS

=0V  
10

2  

10

1  

10

0  

0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
-50 -25  
0
25 50 75 100 125 150  
T
J
, Junction Temperature( C)  
V
SD
, Body Diode Forward Voltage (V)  
Figure 5. Gate Threshold Variation  
with Temperature  
Figure 6. Body Diode Forward Voltage  
Variation with Source Current  
3

CEC3172  
10

2  

10

1  

10

0  

10

-1  

10

-2  

10  
8
V

DS

=15V  
I

D

=7A  
R

DS(ON)

Limit  
10ms  
100ms  
1s  
6
DC  
4
2
T

A

=25 C  
T

J

=150 C  
Single Pulse  
0
10

-2  

10

-1  

10

0  

10

1  

10

2  

0
3
6
9
12  
15  
Qg, Total Gate Charge (nC)  
V
DS
, Drain-Source Voltage (V)  
Figure 7. Gate Charge  
Figure 8. Maximum Safe  
Operating Area  
V

DD  

on  
t
t
off  
d(off)  
t
r
t
d(on)  
OUT  
R
L  
t
f
t
V

IN  

90%  
10%  
90%  
D
OUT  
V
V
V
GS  
10%  
INVERTED  
R

GEN  

G
90%  
50%  
50%  
S
IN  
V
10%  
PULSE WIDTH  
Figure 10. Switching Waveforms  
Figure 9. Switching Test Circuit  
10

0  

D=0.5  
0.2  
10

-1  

0.1  
0.05  
0.02  
P
DM  
t
1  
t
2  
0.01  
10

-2  

1. R
θ
JA
(t)=r (t) * R
θ
JA  
2. R
θ
JA
=See Datasheet  
3. T
JM-
T
A
= P* R
θ
JA
(t)  
4. Duty Cycle, D=t1/t2  
Single Pulse  
10

-3  

10

-4  

10

-3  

10

-2  

10

-1  

10

0  

10

1  

10

2  

Square Wave Pulse Duration (sec)  
Figure 10. Normalized Thermal Transient Impedance Curve  
4