CET-Chino-Excel-Tech-CEM3178

Part #CET-Chino-Excel-Tech-CEM3178
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CET-Chino-Excel-Tech-CEM3178
CEM3178  
PRELIMINARY  
Dual N-Channel Enhancement Mode Field Effect Transistor  
FEATURES  
30V, 7.6A, R

DS(ON)

= 22m
Ω
@V

GS

= 10V.  
R

DS(ON)

= 33m
Ω
@V

GS

= 4.5V.  
Super high dense cell design for extremely low R

DS(ON)  

.
High power and current handing capability.  
Lead free product is acquired.  
Surface mount Package.  
D
1  
8
D
1  
7
D
2  
6
D
2  
5
SO-8  
1
2
3
4
1
S
1  
G
1  
S
2  
G
2  
ABSOLUTE MAXIMUM RATINGS
 
T

A

= 25 C unless otherwise noted  
Parameter  
Symbol  
V

DS  

V

GS  

I

D  

Limit  
Units  
Drain-Source Voltage  
30  
±
20  
7.6  
30  
V
V
A
A
Gate-Source Voltage  
Drain Current-Continuous  
Drain Current-Pulsed

a  

I

DM  

Maximum Power Dissipation  
P

D  

2.0  
W
Thermal Characteristics  
Parameter  
Symbol  
Thermal Resistance, Junction-to-Ambient

b  

R
θ
JA  
62.5  
C/W  
Rev 3.
 
2010.Apr  
Specification and data are subject to change without notice .  
1

CEM3178  
Electrical Characteristics
 
T

A

= 25 C unless otherwise noted  
Parameter  
Off Characteristics  
Symbol  
Test Condition  
Min  
Typ  
Max  
Units  
Drain-Source Breakdown Voltage  
Zero Gate Voltage Drain Current  
Gate Body Leakage Current, Forward  
Gate Body Leakage Current, Reverse  
On Characteristics

c  

BV

DSS  

I

DSS  

V

GS

= 0
V
,
I

D

= 250
µ
A  
V

DS

= 30
V
,
 
V

GS

= 0V  
V

GS

= 20
V
,
 
V

DS

= 0V  
V

GS

= -20
V
,
V

DS

= 0V  
30  
V
1
µ
A  
nA  
nA  
I

GSSF  

I
GSSR  
100  
-100  
Gate Threshold Voltage  
Static Drain-Source  
V

GS(th)  

R

DS(on)  

V

GS

= V

DS

, I

D

= 250
µ
A  
V

GS

= 10
V
,
I

D

= 6.3A  
V

GS

= 4.5
V
,
I

D

= 5.0A  
1
3
V
17  
27  
22  
33  
m
Ω
 
m
Ω  
On-Resistance  
Dynamic Characteristics

d  

Forward Transconductance  
Input Capacitance  
g

FS  

C

iss  

C

oss  

C

rss  

V

DS

= 15
V
,
I

D

= 6A  
5
S
590  
125  
95  
pF  
pF  
pF  
V

DS

= 15
V
,
V

GS

= 0
V
,  
f = 1.0 MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Switching Characteristics

d  

Turn-On Delay Time  
t

d(on)  

t

r  

t

d(off)  

t

f  

10  
4
20  
8
ns  
ns  
V

DD

= 15
V
,
I

D

= 1A,  
V

GS

= 10
V
,
R

GEN

= 6
Ω  
Turn-On Rise Time  
Turn-Off Delay Time  
25  
4
50  
8
ns  
Turn-Off Fall Time  
ns  
T
o
tal Gate Charge  
Q

g  

13  
2
17  
nC  
nC  
nC  
V

DS

= 15
V
,
I

D

= 7A,  
V

GS

= 10V  
Gate-Source Charge  
Q

gs  

Q

gd  

Gate-Drain Charge  
3.5  
Drain-Source Diode Characteristics and Maximun Ratings  
Drain-Source Diode Forward Current

b  

Drain-Source Diode Forward Voltage

c  

I

S  

1.6  
1.2  
A
V
V

SD  

V

GS

= 0
V
,
I

S

= 1.6A  
Notes :  
a.Repetitive Rating : Pulse width limited by maximum junction temperature.  
b.Surface Mounted on FR4 Board, t < 10 sec.  
c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%.  
d.Guaranteed by design, not subject to production testing.  
2

CEM3178  
25  
20  
15  
10  
15  
12  
9
V

GS

=10,8,6,5V  
V

GS

=4V  
6
25 C  
V

GS

=3V  
3
5
0
T

J

=125 C  
-55 C  
0
0
1
2
3
4
3
4
1
2
V
DS
, Drain-to-Source Voltage (V)  
V
GS
, Gate-to-Source Voltage (V)  
Figure 1. Output Characteristics  
Figure 2. Transfer Characteristics  
2.2  
1.9  
1.6  
1.3  
1.0  
0.7  
0.4  
900  
750  
600  
450  
300  
150  
0
I

D

=6.3A  
V

GS

=10V  
C
iss  
C
oss  
C
rss  
0
5
10  
15  
20  
25  
-100  
-50  
0
50  
100  
150  
200  
V
DS
, Drain-to-Source Voltage (V)  
T
J
, Junction Temperature( C)  
Figure 3. Capacitance  
Figure 4. On-Resistance
V
a
riation  
with
T
e
mperature  
1.3  
1.2  
1.1  
1.0  
0.9  
0.8  
0.7  
0.6  
V

DS

=V

GS  

I

D

=250µA  
V

GS

=0V  
10

1  

10

0  

10

-1  

-50 -25  
0
25 50 75 100 125 150  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
T
J
, Junction Temperature( C)  
V
SD
, Body Diode Forward Voltage (V)  
Figure 5. Gate Threshold Variation  
with Temperature  
Figure 6. Body Diode Forward Voltage  
Variation with Source Current  
3

CEM3178  
10

2  

10

1  

10

0  

10

-1  

10

-2  

10  
8
V

DS

=15V  
I

D

=7A  
R

DS(ON)

Limit  
1ms  
10ms  
100ms  
1s  
DC  
6
4
2
T

A

=25 C  
T

J

=150 C  
Single Pulse  
0
10

-2  

10

-1  

10

0  

10

1  

10

2  

0
4
8
12  
16  
Qg, Total Gate Charge (nC)  
V
DS
, Drain-Source Voltage (V)  
Figure 7. Gate Charge  
Figure 8. Maximum Safe  
Operating Area  
V

DD  

on  
t
t
off  
d(off)  
t
r
t
d(on)  
OUT  
R
L  
t
f
t
V

IN  

90%  
10%  
90%  
D
OUT  
V
V
V
GS  
10%  
INVERTED  
R

GEN  

G
90%  
50%  
50%  
S
IN  
V
10%  
PULSE WIDTH  
Figure 10. Switching Waveforms  
Figure 9. Switching Test Circuit  
10

0  

D=0.5  
0.2  
10

-1  

P
DM  
0.1  
t
1  
t
2  
0.05  
0.02  
1. R
θ
JA
(t)=r (t) * R
θ
JA  
2. R
θ
JA
=See Datasheet  
3. T
JM-
T
A
= P* R
θ
JA
(t)  
4. Duty Cycle, D=t1/t2  
Single Pulse  
10

-2  

10

-4  

10

-3  

10

-2  

10

-1  

10

0  

10

1  

10

2  

Square Wave Pulse Duration (sec)  
Figure 11. Normalized Thermal Transient Impedance Curve  
4