Convert-Semiconductor-CTU20N700

Part #Convert-Semiconductor-CTU20N700
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Convert-Semiconductor-CTU20N700
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Suzho
u Convert Semiconductor Co., Ltd.  
CTU20N700  
200V N-Channel Trench MOSFET  
FE
A
T
URES  
⚫
Super Low Gate Charge  
⚫
100% EAS Guaranteed  
⚫
Green Device Available  
⚫
Excellent CdV/dt effect decline  
⚫
Advanced high cell density Trench technology  
APPLIC
A
T
IONS  
⚫
Power switching application  
⚫
Uninterruptible Power Supply  
⚫
Hard switched and high frequency circuits  
Device Marking and Package Information  
Device  
Package  
Marking  
CTU20N700  
TO-251  
CTU20N700  
Absolute Maximum Ratings
at T

j

= 25ºC
 
unless otherwise noted  
Parameter  
Drain-Source Voltage (V

GS

= 0V)  
Symbol  
Value  
Unit  
V
V

DSS  

200  
Continuous Drain Current
 
T

C

= 25ºC  
Continuous Drain Current
 
T

C

= 100ºC  
Drain Current-Continuous@ Current-Pulsed  
Gate-Source Voltage (VDS=0V)  
(note1)  
(note1)  
(note2)  
2.8  
A
I

D  

1.5  
A
I

DM  

V

GSS  

E

As  

8
±
20  
A
V
Single Pulse Avalanche Energy  
(note3)  
(note4)  
8
mJ  
W
ºC  
Maximum Power Dissipation(Tc=25
℃
)  
P

D  

42  
Operating Junction and Storage Temperature Range  
T

J

, T

stg  

-55~+175  
Thermal Characteristics  
Parameter  
Symbol  
Value  
3.6  
Unit  
Thermal Resistance, Junction-to-Case  
R

θJ  

C
ºC /W  
Thermal Resistance, Junction-to-Ambient  
(note1)  
62  
R

θJ  

A
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Electrical Characteristics
T

j

= 25ºC
 
unless otherwise specified  
Value  
Parameter  
Symbol  
Test Conditions  
Unit  
Min.  
Typ.  
Max.  
Static  
Drain-Source Breakdown Voltage  
V

(BR)DSS  

I

DSS  

V

GS

= 0V, I

D

= 250µA  
V

DS

= 200V, V

GS

= 0V, T

J

= 25ºC  
V

DS

= 200V, V

GS

= 0V, T

J

= 55ºC  
V

GS

=
±
20V  
200  
—  
—  
1
V
—  
—  
—  
—  
Zero Gate Voltage Drain Current  
uA  
—  
5
Gate-Source Leakage  
I

GSS  

—  
nA  
V
±
100  
3.0  
700  
900  
Gate-Source Threshold Voltage  
V

GS(th)  

V

DS

= V

GS

, I

D

= 250µA  
V

GS

= 10V, I

D

= 1A  
1.0  
—  
2.0  
560  
650  
m
Ω
 
Ω
Drain-Source On-Resistance  
R

DS(on)  

V

GS

= 4.5V, I

D

= 1A  
—  
Dynamic  
Input Capacitance  
C

iss  

C

oss  

C

rss  

Q

g  

900  
130  
4.6  
15  
—  
—  
—  
—  
—  
—  
—  
—  
—  
—  
—  
—  
—  
—  
—  
—  
—  
—  
—  
—  
V

GS

= 0V,  
V

DS

= 25V,  
f = 1.0MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Total Gate Charge  
pF  
nC  
V

DS

= 160V, I

D

= 1A,  
V

GS

= 10V  
Gate-Source Charge  
Gate-Drain Charge  
Q

gs  

Q

gd  

t

d(on)  

t

r  

3
5.2  
22  
Turn-on Delay Time  
Turn-on Rise Time  
V

DS

= 100V, I

D

= 1A,  
34  
ns  
R

G

= 3
Ω,
V

GS

=10V,  
Turn-off Delay Time  
Turn-off Fall Time  
t

d(off)  

t

f  

45  
11  
Body Diode Characteristics  
Continuous Body Diode Current  
I

S  

—  
—  
—  
—  
—  
—  
2.8  
8
A
V
Pulsed Diode Forward Current  
Body Diode Voltage  
I

SM  

V

SD  

T

J

= 25ºC, I

SD

= 1A, V

GS

= 0V  
1.2  
I

F

= 1A  
di

F

/dt = 100A/
μs  
TJ=25
℃  
Reverse Recovery Time  
Reverse Recovery Charge  
t

rr  

85  
—  
—  
ns  
—  
—  
Q

rr  

257  
nC  
Notes  
1.The data tested by surface mounted on a 1 inch2 FR-4 board with 2OZ copper.  
2.The data tested by pulsed , pulse width
≦
300us , duty cycle
≦
2%  
3.The EAS data shows Max. rating . The test condition is VDD =25V,VGS =10V,L=0.1mH  
4.The power dissipation is limited by 175
℃
junction temperature  
5.The data is theoretically the same as ID and IDM , in real applications , should be limited by total power dissipation.  
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Typical Characteristics
 
T

J

= 25
º
C, unless otherwise noted  
Fig.1 Typical Output Characteristics  
Fig.2 On-Resistance vs. G-S Voltage  
Fig.3 Forward Characteristics of ReverseDiode  
Fig.4 Gate-Charge Characteristics  
Fig.5 Normalized VGS(th)vs. TJ  
Fig.6 Normalized RDSONvs. TJ  
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Typical Characteristics
 
T

J

= 25
º
C, unless otherwise noted  
Fig.8 Safe Operating Area  
Fig.7 Capacitance  
Fig.9 Normalized Maximum Transient Thermal Impedance  
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Figure A
:
Gate Charge Test Circuit and Waveform  
Figure B
:
Resistive Switching Test Circuit and Waveform  
Figure C
:
Unclamped Inductive Switching Test Circuit and Waveform  
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hereunder.  
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