Diodes-Incorporated-DMN2053UVTQ-13
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DMN2053UVTQ
DUAL N-CHANNEL ENHANCEMENT MODE MOSFET
Product Summary
Features and Benefits
Low On-Resistance
I
D
Device
BV
DSS
R
DS(ON)
Low Input Capacitance
T
A
= +25°C
Fast Switching Speed
Low Input/Output Leakage
4.6A
4.2A
35m
Ω
@ V
GS
= 4.5V
43m
Ω
@ V
GS
= 2.5V
N-Channel
20V
Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
Halogen and Antimony Free. “Green” Device (Note
3)
The DMN2053UVTQ is suitable for automotive applications
requiring specific change control; this part is AEC-Q101
qualified, PPAP capable, and manufactured in IATF 16949
certified facilities.
Description
This new generation MOSFET is designed to minimize the on-state
resistance (R
DS(ON)
) yet maintain superior switching performance,
making it ideal for high-efficiency power management applications.
Mechanical Data
Case: TSOT26
Applications
Case Material: Molded Plastic, “Green” Molding Compound.
UL Flammability Classification Rating 94V-0
Moisture Sensitivity: Level 1 per J-STD-020
Terminals Connections: See Diagram
Backlighting
DC-DC Converters
Power Management Functions
Terminals: Finish
—
Matte Tin Annealed over Copper Leadframe.
Solderable per MIL-STD-202, Method 208
Weight: 0.013 grams (Approximate)
e3
D2
S2
D1
G1
S2
G2
1
2
3
6
5
4
D1
S1
D2
G2
G1
TSOT26
S1
Equivalent Circuit
Ordering Information
(Note 4)
Part Number
DMN2053UVTQ-7
DMN2053UVTQ-13
Case
TSOT26
TSOT26
Packaging
3,000 / Tape & Reel
10,000 / Tape & Reel
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant.
2. See https://www.diodes.com/quality/lead-
free/ for more information about Diodes Incorporated’s definitions of Halogen
– and Antimony-free, “Green” and
Lead-free.
3. Halogen- and Antimony-free “Gre
en” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
4. For packaging details, go to our website a
t https://www.diodes.com/design/support/packaging/diodes-packaging/.
Marking Information
BR6= Product Type Marking Code
YM = Date Code Marking
Y = Year (ex: H = 2020)
M = Month (ex: 9 = September)
BR6
Date Code Key
Year
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
Code
G
H
I
J
K
L
M
N
O
P
R
S
Aug
Sep
Oct
Nov
Dec
Month
Code
Jan
Feb
Mar
Apr
May
Jun
Jul
8
9
O
N
D
1
2
3
4
5
6
7
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December 2020
© Diodes Incorporated
DMN2053UVTQ
Document number: DS41733
Rev. 2 – 2
DMN2053UVTQ
Maximum Ratings
(@T
A
= +25°C, unless otherwise specified.)
Characteristic
Drain-Source Voltage
Symbol
V
DSS
Value
20
Unit
V
Gate-Source Voltage
±12
V
V
GSS
Steady
T
A
= +25°C
T
A
= +70°C
4.6
3.7
A
Continuous Drain Current (Note 6) V
GS
= 4.5V
State
I
D
1.4
22
A
A
Maximum Continuous Body Diode Forward Current (Note 6)
Pulsed Drain Current (10µs Pulse, Duty Cycle = 1%)
I
S
I
DM
Thermal Characteristics
Characteristic
Symbol
Value
0.7
Unit
Total Power Dissipation (Note 5)
W
°C/W
W
T
A
= +25°C
Steady State
P
D
R
JA
Thermal Resistance, Junction to Ambient (Note 5)
Total Power Dissipation (Note 6)
173
1.1
T
A
= +25°C
P
D
Steady State
Thermal Resistance, Junction to Ambient (Note 6)
Thermal Resistance, Junction to Case
Operating and Storage Temperature Range
108
37
R
JA
°C/W
°C
R
JC
T
J,
T
STG
-55 to +150
Electrical Characteristics
(@T
A
= +25°C, unless otherwise specified.)
Characteristic
OFF CHARACTERISTICS (Note 7)
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate-Source Leakage
Symbol
Min
Typ
Max
Unit
Test Condition
V
GS
= 0V, I
D
= 250µA
20
—
—
—
—
—
—
1.0
V
BV
DSS
I
DSS
µA
nA
V
DS
= 20V, V
GS
= 0V
V
GS
= ±12V, V
DS
= 0V
±100
I
GSS
ON CHARACTERISTICS (Note 7)
Gate Threshold Voltage
0.4
—
—
1.0
V
m
Ω
V
V
GS(TH)
R
DS(ON)
V
SD
V
DS
= V
GS
, I
D
= 250
μA
V
GS
= 4.5V, I
D
= 5.0A
V
GS
= 2.5V, I
D
= 4.0A
V
GS
= 1.8V, I
D
= 2.0A
V
GS
= 0V, I
S
= 1A
26
31
43
35
43
56
Static Drain-Source On-Resistance
—
Diode Forward Voltage
DYNAMIC CHARACTERISTICS (Note 8)
Input Capacitance
0.7
1.2
—
—
—
—
—
—
—
—
—
—
—
—
—
369
54
—
—
—
—
—
—
—
—
—
—
—
—
—
C
iss
C
oss
C
rss
R
g
V
DS
= 10V, V
GS
= 0V
f = 1.0MHz
Output Capacitance
pF
Ω
32
Reverse Transfer Capacitance
Gate Resistance
4.1
3.6
0.4
1.0
2.6
3.0
12.5
3.6
6.0
0.9
V
DS
= 0V, V
GS
= 0V, f = 1MHz
V
GS
= 4.5V, V
DS
= 10V, I
D
= 6A
Total Gate Charge (V
GS
= 4.5V)
Gate-Source Charge
Q
g
nC
Q
gs
Q
gd
t
D(ON)
t
R
Gate-Drain Charge
Turn-On Delay Time
Turn-On Rise Time
V
DS
= 10V, V
GS
= 5V,
R
G
= 6
Ω,
I
D
= 6A
ns
Turn-Off Delay Time
t
D(OFF)
t
F
Turn-Off Fall Time
Reverse Recovery Time
Reverse Recovery Charge
ns
t
RR
I
F
= 1A, di/dt = 100A/
μ
s
nC
Q
RR
Notes:
5. Device mounted on FR-4 substrate PC board, 2oz copper, with minimum recommended pad layout.
6. Device mounted on FR-4 substrate PC board, 2oz copper, with 1inch square copper plate.
7. Short duration pulse test used to minimize self-heating effect.
8. Guaranteed by design. Not subject to production testing.
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December 2020
© Diodes Incorporated
DMN2053UVTQ
Document number: DS41733
Rev. 2 – 2
DMN2053UVTQ
20
15
10
5
15
12
9
V
= 10V
GS
V
V
= 2
.
5
V
V
= 5V
GS
DS
V
V
= 4
.
5
V
GS
GS
= 3
.
5
V
= 3V
GS
GS
V
= 2V
GS
= 4V
V
6
V
= 1
.
5
V
= 1
.
2
V
GS
T
= 85°C
A
T
= 25°C
A
3
0
T
= 125°C
A
V
T =
150°C
A
GS
T
= -55°C
A
0
0
0.5
1
1.5
2
2.5
3
0
0.5
1
1.5
2
2.5
V
DS
, DRAIN-SOURCE VOL
T
AGE
(
V)
V
GS
, GATE-SOURCE VOL
T
AGE
(
V)
Figure 1
T
y
pical Output Characteristic
Figure 2
T
y
pical Transfer Characteristics
0.07
0.06
0.5
0.4
0.3
V
= 1
.
8
V
GS
0.05
I
= 5A
D
V
= 2
.
5
V
GS
0.04
0.03
0.02
0.2
0.1
0
V
= 4
.
5
V
GS
I
= 2A
D
0.01
0
3
6
9
12
15
0
2
4
6
8
10
I
D
, DRAIN-SOURCE CURRENT (A)
Figure 3
T
y
pical On-Resistance vs.
Drain Current and Gate Voltage
V
G
S
, GATE-SOURCE VOL
T
AGE
(
V)
Figure 4
T
y
pical Drain-Source On-Resistance
vs. Gate-Source Voltage
0.08
0.07
0.06
0.05
2
V
= 4
.
5
V
GS
1.8
1.6
1.4
1.2
V
= 4
.
5
V
= 5A
GS
I
D
T
= 150°C
= 125°C
A
V
= 2
.
5
V
= 4A
GS
T
A
A
I
D
T
= 85°C
0.04
0.03
0.02
V
= 1
.
8
V
GS
T
= 25°C
A
I
= 2A
D
T
= -55°C
A
1
0.01
0
0.8
0.6
0
3
6
9
12
15
–
5
0
–
2
5
0
25
50
75 100 125
150
I
D
, DRAIN CURRENT (A)
Figure 5
T
y
pical On-Resistance vs.
Dr
a
in Current and
T
e
m
p
e
r
a
ture
T
J
, JUNCTION TEMPERATURE (
C)
Figure 6 On-Resistance Variation with
T
e
m
p
e
r
a
ture
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December 2020
© Diodes Incorporated
DMN2053UVTQ
Document number: DS41733
Rev. 2 – 2
DMN2053UVTQ
0.1
1
0.9
0.8
0.7
0.6
0.5
0.09
0.08
0.07
0.06
0.05
0.04
0.03
V
= 1
.
8
V
= 5A
GS
I
= 1mA
D
I
D
I
= 250µA
D
V
= 1
.
8
V
= 2A
GS
I
D
V
= 2
.
5
V
= 4A
GS
I
0.02
0.01
0
D
0.4
0.3
–
5
0
–
2
5
0
25
50
75 100 125 150
–
5
0
–
2
5
0
25
50
75 100
125
150
T
J
, JUNCTION TEMPERATURE (
C)
Figure 7 On-Resistance Variation with
T
e
m
p
e
r
a
ture
T
J
, JUNCTION TEMPERATURE (
C)
Figure 8 Gate Threshold Variation vs. Junction Temperature
15
12
1000
T
= 150°C
A
C
iss
T
= 125°C
= 85°C
A
9
6
3
0
100
T
A
C
o
s
s
T
= 25°C
A
C
r
s
s
T
= -55°C
A
10
0
4
8
12
16
20
0
0.3
0.6
0.9
1.2
V
DS
, DRAIN-SOURCE VOL
T
AGE
(
V)
Figure 10
T
y
pical Junction Capacitance
V
SD
, SOURCE-DRAIN VOL
T
AGE
(
V)
Figure 9 Diode Forward Voltage vs. Current
10
8
100
10
R
D
S
(
on)
Limi
t
e
d
P
= 100µs
W
V
I
= 10V
DS
6
DC
P
= 6A
D
1
4
= 10s
P
W
= 1s
W
P
= 100ms
W
0.1
T
T
V
= 150°C
= 25°C
= 4
.
5
V
2
J
(
m
a
x
)
P =
10ms
W
C
P
= 1ms
W
GS
Single Pulse
DUT on 1*MRP Board
0.01
0
0.1
1
10
100
0
2
4
6
8
V
DS
, DRAIN-SOURCE VOLTAGE (V)
Figure 12 SOA, Safe Operation Area
Q
g
, TO
T
AL GATE CHARGE (nC)
Figure 11 Gate Charge
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December 2020
© Diodes Incorporated
DMN2053UVTQ
Document number: DS41733
Rev. 2 – 2
DMN2053UVTQ
1
D = 0
.
9
D = 0
.
7
D = 0
.
5
D = 0
.
3
0.1
D = 0
.
1
D = 0
.
0
5
D = 0
.
0
2
0.01
D = 0
.
0
1
D = 0
.
0
05
R
θJA
(t) = r(t)* R
θJA
R
θJA
= 155
o
C/W
D = Single Pulse
Du
t
y
Cycle, D = t1/t2
0.001
1E
–
0
6 0.00001
0.0001 0.001
0.01
0.1
1
10
100
1000 10000
100000 1000000
t1, PULSE DURATION TIME (sec)
Figure 13 Transient Thermal Resistance
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December 2020
© Diodes Incorporated
DMN2053UVTQ
Document number: DS41733
Rev. 2 – 2
DMN2053UVTQ
Package Outline Dimensions
TSOT26
TSOT26
Min Max
1.00
D
e1
Dim
A
Typ
—
01(4x)
—
A1
A2
D
E
E1
b
0.010 0.100
0.840 0.900
2.800 3.000 2.900
2.800 BSC
1.500 1.700 1.600
0.300 0.450
0.120 0.200
—
—
E1/2
E/2
c
E1
E
Gauge Plane
Seating Plane
—
—
0
c
e
e1
L
0.950 BSC
1.900 BSC
0.50
L
L2
0.30
—
01(4x)
e
b
L2
θ
θ1
0.250 BSC
8°
0°
4°
4°
—
A2
12°
A1
All Dimensions in mm
A
Seating Plane
Suggested Pad Layout
TSOT26
C
Dimensions Value
(in mm)
C
X
Y
0.950
0.700
1.000
3.200
Y1
Y1
Y
X
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December 2020
© Diodes Incorporated
DMN2053UVTQ
Document number: DS41733
Rev. 2 – 2
DMN2053UVTQ
IMPORTANT NOTICE
DIODES INCORPORATED AND ITS SUBSIDIARIES (“DIODES”) MAKE NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
1.
WITH REGARDS TO ANY INFORMATION CONTAINED IN THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY
INTELLECTUAL PROPERTY RIGHTS (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).
2.
The Information contained herein is for informational purpose only and is provided only to illustrate the operation of Diodes products
described herein and application examples. Diodes does not assume any liability arising out of the application or use of this document or any
product described herein. This document is intended for skilled and technically trained engineering customers and users who design with Diodes
products. Diodes products may be used to facilitate safety-related applications; however, in all instances customers and users are responsible for
(a) selecting the appropriate Diodes products for their applications, (b) evaluating the suitability of the Diodes products for their intended
applications, (c) ensuring their applications, which incorporate Diodes products, comply the applicable legal and regulatory requirements as well
as safety and functional-safety related standards, and (d) ensuring they design with appropriate safeguards (including testing, validation, quality
control techniques, redundancy, malfunction prevention, and appropriate treatment for aging degradation) to minimize the risks associated with
their applications.
3.
Diodes assumes no liability for any application-related information, support, assistance or feedback that may be provided by Diodes
from time to time. Any customer or user of this document or products described herein will assume all risks and liabilities associated with such use,
and will hold Diodes and all companies whose products are represented herein or on Diodes’ websites, harmless against all dam
ages and
liabilities.
4.
Products described herein may be covered by one or more United States, international or foreign patents and pending patent
applications. Product names and markings noted herein may also be covered by one or more United States, international or foreign trademarks
and trademark applications. Diodes does not convey any license under any of its intellectual property rights or the rights of any third parties
(including third parties whose products and services may be described in this document or on Diodes’ website) under this docu
ment.
5.
Diodes
p
roducts
are
provided
subject
to
Diodes’
Standard
Terms
and
Conditions
of
Sale
(
https://www.diodes.com/about/company/terms-and-conditions/terms-and-conditions-of-sales/
)
or other applicable terms. This document does not
alter or expand the applicable warranties provided by Diodes. Diodes does not warrant or accept any liability whatsoever in respect of any
products purchased through unauthorized sales channel.
6.
Diodes products and technology may not be used for or incorporated into any products or systems whose manufacture, use or sale is
prohibited under any applicable laws and regulations. Should customers or users use Diodes products in contravention of any applicable laws or
regulations, or for any unintended or unauthorized application, customers and users will (a) be solely responsible for any damages, losses or
penalties arising in connection therewith or as a result thereof, and (b) indemnify and hold Diodes and its representatives and agents harmless
against any and all claims, damages, expenses, and attorney fees arising out of, directly or indirectly, any claim relating to any noncompliance with
the applicable laws and regulations, as well as any unintended or unauthorized application.
7.
While efforts have been made to ensure the information contained in this document is accurate, complete and current, it may contain
technical inaccuracies, omissions and typographical errors. Diodes does not warrant that information contained in this document is error-free and
Diodes is under no obligation to update or otherwise correct this information. Notwithstanding the foregoing, Diodes reserves the right to make
modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described
herein. This document is written in English but may be translated into multiple languages for reference. Only the English version of this document
is the final and determinative format released by Diodes.
8.
Any unauthorized copying, modification, distribution, transmission, display or other use of this document (or any portion hereof) is
prohibited. Diodes assumes no responsibility for any losses incurred by the customers or users or any third parties arising from any such
unauthorized use.
Copyright © 2020 Diodes Incorporated
7 of 7
December 2020
© Diodes Incorporated
DMN2053UVTQ
Document number: DS41733
Rev. 2 – 2
