Diodes-Incorporated-DMN65D8LW-7

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Diodes-Incorporated-DMN65D8LW-7
DMN65D8LW  
N-CHANNEL ENHANCEMENT MODE MOSFET  
Product Summary  
Features  
I

D  

Low On-Resistance  
V

(BR)DSS  

R

DS(ON)  

Package  
T

A

= +25°C  
Low Gate Threshold Voltage  
300mA  
260mA  
3
Ω
@ V

GS

= 10V  
4
Ω
@ V

GS

= 5V  
Low Input Capacitance  
60V  
SOT323  
Fast Switching Speed  
Small Surface Mount Package  
ESD Protected Gate, 1KV (HBM)  
Description  
Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)  
Halogen and Antimony Free. “Green” Device (Note 3)  
Qualified to AEC-Q101 Standards for High Reliability  
This new generation MOSFET has been designed to minimize the on-  
state resistance (R

DS(on)

and yet maintain superior switching  
)
performance, making it ideal for high efficiency power management  
applications.  
Mechanical Data  
Case: SOT323  
Applications  
Case Material: Molded Plastic. UL Flammability Classification  
Rating 94V-0  
DC-DC Converters  
Power Management Functions  
Moisture Sensitivity:
 
Level 1 per J-STD-020  
Terminals: Matte Tin Finish annealed over Alloy 42 leadframe  
(Lead Free Plating). Solderable per MIL-STD-202, Method 208  
Battery Operated Systems and Solid-State Relays  
Drivers: Relays, Solenoids, Lamps, Hammers, Displays,  
Memories, Transistors, etc  
e3  
Terminal Connections: See Diagram  
Drain  
Weight: 0.006 grams (approximate)  
SOT323  
D
Gate  
S
G
Gate  
Protection  
Diode  
Source  
ESD PROTECTED TO 1kV  
Top View  
Top View  
Pin Configuration  
Equivalent Circuit  
Ordering Information
(Note 4)  
Part Number  
Case  
Packaging  
DMN65D8LW
-7  
SOT323  
3000/Tape & Reel  
Notes:  
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.  
2. S

more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, “Green”  
and Lead-free.  
3. Halogen- and Antimony-free “Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and  
<1000ppm antimony compounds.  
4. For packaging details, go to our website at

Marking Information  
MM3 = Product Type Marking Code  
YM = Date Code Marking for SAT (Shanghai Assembly/ Test site)  
MM3  
MM3  
= Date Code Marking for CAT (Chengdu Assembly/ Test site)  
YM  
Y or
 
= Year (ex: A = 2013)  
Y
M = Month (ex: 9 = September)  
Chengdu A/T Site  
Shanghai A/T Site  
Date Code Key  
Year  
2011  
2012  
2013  
2014  
2015  
2016  
2017  
Code  
Y
Z
A
B
C
D
E
Month  
Code  
Jan  
1
Feb  
2
Mar  
3
Apr  
4
May  
5
Jun  
6
Jul  
7
Aug  
8
Sep  
9
Oct  
O
Nov  
N
Dec  
D
1 of 5  
September 2013  
© Diodes Incorporated  
DMN65D8LW  
Document number: DS35639
 
Rev. 5 – 2  

DMN65D8LW  
Maximum Ratings
(@T

A

= +25°C, unless otherwise specified.)  
Characteristic  
Drain-Source Voltage  
Symbol  
V

DSS  

Value  
60  
Units  
V
V
Gate-Source Voltage  
±20  
V

GSS  

T

A

= +25°C  
Steady  
State  
300  
230  
mA  
mA  
Continuous Drain Current (Note 6) V

GS

= 10V  
Continuous Drain Current (Note 6) V

GS

= 5V  
I

D  

I

D  

T

A

= +70°C  
T

A

= +25°C  
T

A

= +70°C  
Steady  
State  
260  
210  
Pulsed Drain Current (10µs pulse, duty cycle = 1%)  
Maximum Body Diode Continuous Current (Note 6)  
800  
1
mA  
A
I

DM  

I

S  

Thermal Characteristics  
Characteristic  
Symbol  
Value  
Units  
(Note 5)  
(Note 6)  
(Note 5)  
(Note 6)  
(Note 5)  
300  
432  
Total Power Dissipation  
mW  
P

D  

398  
Thermal Resistance, Junction to Ambient  
R

θ
JA  

290  
°C/W  
°C  
Thermal Resistance, Junction to Case  
142  
R

θ
JC  

Operating and Storage Temperature Range  
-55 to +150  
T

J,

T

STG  

Electrical Characteristics
(@T

A

= +25°C, unless otherwise specified.)  
Characteristic  
OFF CHARACTERISTICS (Note 7)  
Drain-Source Breakdown Voltage  
Symbol  
Min  
Typ  
Max  
Unit  
Test Condition  
60  
V
BV

DSS  

I

DSS  

1.0  
V

GS

= 0V, I

D

= 250µA  
V

DS

= 60V, V

GS

= 0V  
V

GS

= ±20V, V

DS

= 0V  
Zero Gate Voltage Drain Current  
Gate-Body Leakage  
µA  
µA  
±5.0  
I

GSS  

ON CHARACTERISTICS (Note 7)  
Gate Threshold Voltage  
1.2  
  
80  
–
2.0  
3
V
V

GS(th)  

2
V

DS

= V

GS

, I

D

= 250µA  
V

GS

= 10V, I

D

= 0.115A  
Static Drain-Source On-Resistance  
R

DS (ON)  

2.5  
290  
0.8
  
4
  
mS  
V
V

GS

= 5V, I

D

= 0.115A  
Forward Transconductance  
Diode Forward Voltage  
DYNAMIC CHARACTERISTICS (Note 8)  
Input Capacitance  
g

FS  

1.2
  
V

DS

= 10V, I

D

= 0.115A  
V

GS

= 0V, I

S

= 115mA  
V

SD  

22.0  
3.2  
C

iss  

C

oss  

C

rss  

R

G  

  
  
  
  
  
  
  
  
Output Capacitance  
pF  
V

DS

= 25V, V

GS

= 0V, f = 1.0MHz  
V

DS

= 0V, V

GS

= 0V, f = 1.0MHz  
Reverse Transfer Capacitance  
Gate Resistance  
2.0  
79.9  
0.87  
0.43  
0.11  
0.11  
2.7  
Total Gate Charge
 
V

GS

= 10V  
Total Gate Charge V

GS

= 4.5V  
Gate-Source Charge  
Q

g  

Q

g  

V

GS

= 10V, V

DS

= 30V,  
nC  
nS  
I

D

= 150mA  
Q

gs  

Q

gd  

t

D(on)  

t

r  

Gate-Drain Charge  
Turn-On Delay Time  
Turn-On Rise Time  
2.8  
V

DD

= 30V, I

D

= 0.115A, V

GEN

= 10V

,  

R

GEN

= 25
  
Turn-Off Delay Time  
12.6  
7.3  
t

D(off)  

t

f  

Turn-Off Fall Time  
Notes:  
5. Device mounted on FR-4 PC board, with minimum recommended pad layout, single sided.  
6. Device mounted on FR-4 substrate PC board, 2oz copper, with 1inch square copper pad layout.  
7 .Short duration pulse test used to minimize self-heating effect.  
8. Guaranteed by design. Not subject to production testing.  
2 of 5  
September 2013  
© Diodes Incorporated  
DMN65D8LW  
Document number: DS35639
 
Rev. 5 – 2  

DMN65D8LW  
1
0.6  
0.5  
0.4  
V
= 5.0V  
DS  
0.1  
0.3  
0.2  
T
= 150°C  
A
T
= 125°C  
A
T
= 85°C  
A
T
= 25°C  
A
0.1  
0
T
= -55°C  
A
0.01  
0
1
2
3
4
5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5
 
4.0  
V

GS

, GATE-SOURCE VOLTAGE  
Figure 2
 
Typical Transfer Characteristics  
V

DS

, DRAIN-SOURCE VOLTAGE (V)  
Figure 1
 
Typical Output Characteristic  
5.0  
4.5  
2.4  
2.2  
2.0  
4.0  
3.5  
3.0  
2.5  
V
= 10V  
GS  
I
= 115mA  
D
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
V
= 5V  
GS  
V
= 5V  
GS  
I
= 115mA  
D
V
= 10V  
2.0  
1.5  
1.0  
GS  
0.5  
0
0.6  
0.4  
0
0.1  
0.2  
0.3  
0.4  
0.5  
0.6  
50 -25  
T

J

, JUNCTION TEMPERATURE (  
Figure 4
 
On-Resistance Variation with
T
emperature  
0
25  
50  
75 100
 
125 150  
C)  
I

D

, DRAIN CURRENT  
Figure 3
 
Typical On-Resistance vs.  
Drain Current and
T
e
mperature  
5
4
2.0  
1.8  
1.6  
1.4  
1.2  
I
= 1mA  
D
V
= 5V  
GS  
3
2
I
= 250µA  
I
= 115mA  
D
D
1.0  
0.8  
0.6  
0.4  
V
= 10V  
GS  
I
= 115mA  
D
1
0
0.2  
0
– 50
 
-25  
0
25  
50  
75 100
 
125 150  
C)  
Figure 5
 
On-Resistance Variation with
T
e
mperature  
-50 -25  
T

J

, JUNCTION TEMPERATURE (  
Figure 6
 
Gate Threshold Variation vs. Ambient
T
e
mperature  
0
25  
50 75 100 125
 
150  
C)  
T

J

, JUNCTION TEMPERATURE (  
3 of 5  
September 2013  
© Diodes Incorporated  
DMN65D8LW  
Document number: DS35639
 
Rev. 5 – 2  

DMN65D8LW  
1,000  
100  
1
0.1  
T
= 150°C  
A
T
= 150°C  
A
T
= 85°C  
T
= 125°C  
A
A
T
= 125°C  
A
T
= 25°C  
10  
1
0.01  
A
T
= 85°C  
A
T
= -55°C  
T
= 25°C  
A
T
= -55°C  
A
A
0.001  
0
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
0
10  
20  
30  
40  
50  
V

SD

, SOURCE-DRAIN VOLTAGE (V)  
V

DS

, DRAIN-SOURCE VOLTAGE (V)  
Figure 7
 
Diode Forward Voltage vs. Current  
Figure 8
 
Typical Drain-Source Leakage Current vs. Voltage  
50  
45  
10  
9
f = 1MHz  
V
I
= 30V  
DS  
40  
35  
30  
25  
20  
15  
8
7
6
5
= 150mA  
D
C
iss  
4
3
2
10  
C
oss  
5
0
1
0
C
rss  
0
5
10  
15  
20  
25  
0
0.2  
0.4  
0.6  
0.8  
1.0  
V

DS

, DRAIN-SOURCE VOLTAGE (V)  
Q

g

, TO
T
A
L GATE CHARGE
 
(nC)  
Figure 9
 
Typical Junction Capacitance  
Figure 10
 
Gate Charge  
Package Outline Dimensions  
A
SOT323  
Dim  
A
Min  
Max  
0.40  
1.35  
2.20  
–
1.40  
2.20  
0.10  
1.00  
0.40  
0.18  
8°  
Typ  
0.30  
1.30  
2.10  
0.65  
1.30  
2.15  
0.05  
0.95  
0.30  
0.11  
–
0.25  
1.15  
2.00  
–
1.20  
1.80  
0.0  
0.90  
0.25  
0.10  
0°  
C
B
B
C
D
G
H
J
K
L
M
G
H
K
J
M
L
D
  
All Dimensions in mm  
4 of 5  
September 2013  
© Diodes Incorporated  
DMN65D8LW  
Document number: DS35639
 
Rev. 5 – 2  

DMN65D8LW  
Suggested Pad Layout  
Y
Dimensions Value
 
(in mm)  
Z
X
Y
C
E
2.8  
0.7  
0.9  
1.9  
1.0  
Z
C
E
X
IMPORTANT NOTICE  
DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT,  
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE  
(AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).  
Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes  
without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the  
application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or  
trademark rights, nor the rights of others.
 
Any Customer or user of this document or products described herein in such applications shall assume  
all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes Incorporated  
website, harmless against all damages.  
Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel.  
Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall indemnify and  
hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or  
indirectly, any claim of personal injury or death associated with such unintended or unauthorized application.  
Products described herein may be covered by one or more United States, international or foreign patents pending.
 
Product names and markings  
noted herein may also be covered by one or more United States, international or foreign trademarks.  
This document is written in English but may be translated into multiple languages for reference.
 
Only the English version of this document is the  
final and determinative format released by Diodes Incorporated.  
LIFE SUPPORT  
Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express  
written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:  
A. Life
 
support devices or systems are devices or systems which:  
1. are intended to implant into the body, or  
2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the  
labeling can be reasonably expected to result in significant injury to the user.  
B. A
 
critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the  
failure of the life support device or to affect its safety or effectiveness.  
Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and  
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any  
use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related  
information or support that may be provided by Diodes Incorporated.
 
Further, Customers must fully indemnify Diodes Incorporated and its  
representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems.  
Copyright © 2013, Diodes Incorporated  
5 of 5  
September 2013  
© Diodes Incorporated  
DMN65D8LW  
Document number: DS35639
 
Rev. 5 – 2