Diodes-Incorporated-ZXM61P03FTA
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ZXM61P03F
30V P-CHANNEL ENHANCEMENT MODE MOSFET
SUMMARY
V
(BR)DSS
=-30V; R
DS(ON)
=0.35
⍀
; I
D
=-1.1A
DESCRIPTION
This new generation of high density MOSFETs from Zetex utilizes a unique
structure that combines the benefits of low on-resistance with fast switching
speed. This makes them ideal for high efficiency, low voltage, power
management applications.
FEATURES
•
Low on-resistance
SOT23
•
Fast switching speed
•
Low threshold
•
Low gate drive
•
SOT23 package
APPLICATIONS
•
DC – DC converters
•
Power management functions
•
Disconnect switches
•
Motor control
ORDERING INFORMATION
Pin out
DEVICE
REEL SIZE
(inches)
TAPE WIDTH
(mm)
QUANTITY
PER REEL
ZXM61P03FTA
ZXM61P03FTC
7
8 embossed
8 embossed
3,000
13
10,000
DEVICE MARKING
P03
Top view
ISSUE 1 – OCTOBER 2005
SEMICONDUCTORS
1
ZXM61P03F
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
LIMIT
-30
UNIT
Drain-Source Voltage
V
V
V
V
DSS
GS
Gate- Source Voltage
Ϯ
20
Continuous Drain Current
(V =-10V;
T =25°C)(b)
I
-1.1
-0.9
A
GS
A
D
(V =-10V;
T =70°C)(b)
GS
A
Pulsed Drain Current (c)
I
I
I
-4.3
-0.88
-4.3
A
A
A
DM
S
Continuous Source Current (Body Diode)(b)
Pulsed Source Current (Body Diode)(c)
SM
Power Dissipation at T
=25°C (a)
A
Linear Derating Factor
P
625
5
mW
mW/°C
D
Power Dissipation at T
=25°C (b)
A
Linear Derating Factor
P
806
6.4
mW
mW/°C
D
Operating and Storage Temperature Range
T :T
-55 to +150
°C
j
stg
THERMAL RESISTANCE
PARAMETER
SYMBOL
VALUE
200
UNIT
°C/W
°C/W
Junction to Ambient (a)
Junction to Ambient (b)
NOTES:
R
R
θ
JA
θ
JA
155
(a) For a device surface mounted on 25mm x 25mm FR4 PCB with high coverage of single sided 1oz copper, in still air conditions
(b) For a device surface mounted on FR4 PCB measured at t
р
5 secs.
(c) Repetitive rating – pulse width limited by maximum junction temperature. Refer to Transient Thermal Impedance graph.
ISSUE 1 – OCTOBER 2005
SEMICONDUCTORS
2
ZXM61P03F
CHARACTERISTICS
ISSUE 1 – OCTOBER 2005
SEMICONDUCTORS
3
ZXM61P03F
ELECTRICAL CHARACTERISTICS (at T
amb
= 25°C unless otherwise stated).
PARAMETER
SYMBOL MIN.
TYP.
MAX. UNIT
CONDITIONS.
STATIC
Drain-Source Breakdown
Voltage
Zero Gate Voltage Drain Current
Gate-Body Leakage
V
I
-30
V
I =-250
µ
A, V
=0V
(BR)DSS
D
GS
-1
V
=-30V, V
=0V
DS GS
µ
A
nA
V
DSS
GSS
I
V
=
Ϯ
20V, V
=0V
Ϯ
100
GS
DS
Gate-Source Threshold Voltage
Static Drain-Source On-State Resistance (1)
V
R
-1.0
I =-250
µ
A, V
= V
GS(th)
DS(on)
DS
GS
D
0.35
0.55
V
V
=-10V, I
=-0.6A
Ω
Ω
GS
GS
D
=-4.5V, I
=-0.3A
D
Forward Transconductance (3)
DYNAMIC
(3)
g
0.44
S
V
=-10V,I =-0.3A
D
fs
DS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
SWITCHING
(2) (3)
Turn-On Delay Time
Rise Time
C
C
C
140
45
pF
pF
pF
iss
V
=-25 V, V
=0V,
DS
GS
f=1MHz
oss
rss
20
t
t
t
t
1.9
2.9
8.9
5.0
ns
ns
ns
ns
nC
d(on)
V
=-15V, I
=-0.6A
D
r
DD
G
R =6.2
Ω
, R
=25
Ω
(Refer to test circuit)
D
Turn-Off Delay Time
Fall Time
d(off)
f
Total Gate Charge
Gate-Source Charge
Gate Drain Charge
SOURCE-DRAIN DIODE
Diode Forward Voltage (1)
Q
Q
Q
4.8
g
V
=-24V,V =-10V,
GS
DS
0.62 nC
I
D
=-0.6A
gs
gd
(Refer to test circuit)
1.3
nC
V
V
-0.95
T =25°C, I
=-0.6A,
j S
V
SD
=0V
GS
Reverse Recovery Time (3)
Reverse Recovery Charge(3)
NOTES:
t
14.8
7.7
ns
T =25°C, I
=-0.6A,
j F
di/dt= 100A/
µ
s
rr
Q
nC
rr
(1) Measured under pulsed conditions. Width=300
µ
s. Duty cycle
Յ
2%.
(2) Switching characteristics are independent of operating junction temperature.
(3) For design aid only, not subject to production testing.
ISSUE 1 – OCTOBER 2005
SEMICONDUCTORS
4
ZXM61P03F
TYPICAL CHARACTERISTICS
ISSUE 1 – OCTOBER 2005
SEMICONDUCTORS
5
ZXM61P03F
TYPICAL CHARACTERISTICS
14
300
250
Vgs=0V
ID=-0.6A
f=1MHz
12
10
8
Ciss
Coss
Crss
200
150
100
50
VDS=-24V
VDS=-15V
6
4
2
0
0
0.1
1
10
100
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
-V –
Drain Source Voltage (V)
DS
Q -Charge (nC)
Capacitance v Drain-Source Voltage
Gate-Source Voltage v Gate Charge
Current
regulator
Q
G
50k
Same as
D.U.T
12V
Q
GS
Q
GD
V
G
V
DS
I
G
D.U.T
I
D
V
GS
Charge
Basic gate charge waveform
Gate charge test circuit
V
DS
90%
R
D
V
GS
V
DS
R
G
V
CC
10%
V
GS
t
r
t
d(off)
t
r
t
d(on)
t
(on)
t
(on)
Switching time waveforms
Switching time test circuit
ISSUE 1 – OCTOBER 2005
SEMICONDUCTORS
6
ZXM61P03F
PACKAGE DETAILS
PAD LAYOUT DETAILS
L
0.95
0.037
H
G
N
D
3 leads
2.0
0.079
A
0.9
M
B
0.035
C
mm
inches
0.8
0.031
K
F
PACKAGE DIMENSIONS
Millimeters
DIM
Inches
Millimeters
Inches
Max
DIM
Min
2.67
1.20
ᎏ
Max
3.05
1.40
1.10
0.53
0.15
Min
0.105
0.047
ᎏ
Max
0.120
0.055
0.043
0.021
Min
0.33
0.01
2.10
0.45
Max
0.51
0.10
2.50
0.64
Max
0.020
0.004
0.0985
0.025
A
B
C
D
F
H
K
0.013
0.0004
0.083
0.018
L
0.37
0.085
0.015
M
N
ᎏ
0.0034 0.0059
0.075 NOM
0.95 NOM
0.0375 NOM
G
1.90 NOM
ᎏ
ᎏ
© Zetex Semiconductors plc 2005
Europe
Americas
Asia Pacific
Zetex (Asia) Ltd
3701-04 Metroplaza Tower 1
Hing Fong Road, Kwai Fong
Hong Kong
Corporate Headquarters
Zetex GmbH
Zetex Inc
Zetex Semiconductors plc
Zetex Technology Park
Chadderton, Oldham, OL9 9LL
United Kingdom
Streitfeldstraße 19
D-81673 München
Germany
700 Veterans Memorial Hwy
Hauppauge, NY 11788
USA
Telefon: (49) 89 45 49 49 0
Fax: (49) 89 45 49 49 49
Telephone: (1) 631 360 2222
Fax: (1) 631 360 8222
Telephone: (852) 26100 611
Fax: (852) 24250 494
Telephone (44) 161 622 4444
Fax: (44) 161 622 4446
These offices are supported by agents and distributors in major countries world-wide.
This publication is issued to provide outline information only which (unless agreed by the Company in writing) may not be used, applied or reproduced
for any purpose or form part of any order or contract or be regarded as a representation relating to the products or services concerned. The Company
reserves the right to alter without notice the specification, design, price or conditions of supply of any product or service.
ISSUE 1 – OCTOBER 2005
SEMICONDUCTORS
7
