EPC-EPC2100

Part #EPC-EPC2100
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EPC-EPC2100
eGaN® FET DATASHEET  
EPC2100  
EPC2100 – Enhancement-Mode GaN Power  
Transistor Half-Bridge  
V

DS

, 30 V  
R

DS(on)

, 8.2
 
m
Ω
(Q1), 2.1 m
Ω
(Q2)  
I

D

, 10
 
A (Q1), 40 A (Q2)  
HAL  
Gallium Nitride’s exceptionally high electron mobility and low temperature coefficient allows very  
low R

DS(on)

, while its lateral device structure and majority carrier diode provide exceptionally low Q

G  

and zero Q

RR

. The end result is a device that can handle tasks where very high switching frequency,  
and low on-time are beneficial as well as those where on-state losses dominate.  
Maximum Ratings  

EPC2100

eGaN® ICs are supplied only in  
passivated die form with solder bumps  
Die Size: 6.05 mm x 2.3 mm  
DEVICE  
PARAMETER  
VALUE  
UNIT  
Drain-to-Source Voltage (Continuous)  
Drain-to-Source Voltage (up to 10,000 5 ms pulses at 150°C)  
Continuous (T

A

= 25°C, R

θJA

= 92°C/W)  
Pulsed (25°C, T

PULSE

= 300 µs)  
30  
V

DS  

V
36  
10  
Applications  
I

D  

A
V
100  
Q1  
• High Frequency DC-DC  
• Point-of-Load (POL) Converters  
Benefits  
Gate-to-Source Voltage  
6
V

GS  

T

J  

Gate-to-Source Voltage  
-4  
Operating Temperature  
–40 to 150  
°C  
V
T

STG

Storage Temperature  
–40 to 150  
• High
 
Frequency Operation  
• Ultra
 
High Efficiency  
• High
 
Density Footprint  
Drain-to-Source Voltage (Continuous)  
V

DS  

30  
Drain-to-Source Voltage (up to 10,000 5 ms pulses at 150°C)  
36  
Continuous (T

A

= 25°C, R

θJA

= 22°C/W)  
40  
I

D  

A
Pulsed (25°C, T

PULSE

= 300 µs)  
400  
6
Q2  
Gate-to-Source Voltage  
V

GS  

V
Gate-to-Source Voltage  
-4  
T

J  

Operating Temperature  
–40 to 150  
–40 to 150  
°C  
T

STG

Storage Temperature  
Thermal Characteristics (T

J

= 25°C unless otherwise stated)  
PARAMETER  
TYP  
0.4  
2.5  
42  
UNIT  
R

θJC  

R

θJB  

R

θJA  

Thermal Resistance, Junction-to-Case  
Thermal Resistance, Junction-to-Board  
Thermal Resistance, Junction-to-Ambient (Note 1)  
°C/W  
Note 1: R

θJA

is determined with the device mounted on one square inch of copper pad, single layer 2 oz copper on FR4 board.  
EPC – THE LEADER IN GaN TECHNOLOGY
 
|

| COPYRIGHT
 
2019 |  
|
1

eGaN® FET DATASHEET  
EPC2100  
Static Characteristics (T

J

= 25°C unless otherwise stated)  
DEVICE  
BV

DSS  

I

DSS  

PARAMETER  
TEST CONDITIONS  
V

GS

= 0 V, I

D

= 0.3 mA  
V

DS

= 24 V, V

GS

= 0 V  
V

GS

= 5 V  
MIN  
TYP  
MAX  
UNIT  
V
Drain-to-Source Voltage  
30  
Drain-Source Leakage  
0.004  
0.007  
0.004  
1.3  
0.2  
3
mA  
mA  
mA  
V
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
Gate Threshold Voltage  
I

GSS  

Q1  
V

GS

= -4 V  
0.2  
2.5  
8.2  
V

GS(TH)  

R

DS(on)  

V

SD  

V

DS

= V

GS

, I

D

= 4 mA  
V

GS

= 5 V, I

D

= 25 A  
I

S

= 0.5 A, V

GS

= 0 V  
V

GS

= 0 V, I

D

= 1 mA  
V

DS

= 24 V, V

GS

= 0 V  
V

GS

= 5 V  
0.8  
30  
Drain-Source On Resistance  
Source-Drain Forward Voltage  
Drain-to-Source Voltage  
6
mΩ  
V
1.8  
BV

DSS  

I

DSS  

V
Drain-Source Leakage  
0.015  
0.03  
0.015  
1.3  
0.8  
9
mA  
mA  
mA  
V
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
Gate Threshold Voltage  
I

GSS  

Q2  
V

GS

= -4 V  
0.8  
2.5  
2.1  
V

GS(TH)  

R

DS(on)  

V

SD  

V

DS

= V

GS

, I

D

= 16 mA  
V

GS

= 5 V, I

D

= 25 A  
I

S

= 0.5 A, V

GS

= 0 V  
0.8  
Drain-Source On Resistance  
Source-Drain Forward Voltage  
1.5  
mΩ  
V
1.7  
Dynamic Characteristics  
DEVICE  
PARAMETER  
TEST CONDITIONS  
MIN TYP  
395  
15  
MAX  
UNIT  
C

ISS  

Input Capacitance  
475  
C

RSS  

Reverse Transfer Capacitance  
Output Capacitance  
V

DS

= 15 V, V

GS

= 0 V  
C

OSS  

C

OSS(ER)  

C

OSS(TR)  

Q

G  

290  
371  
404  
3.6  
435  
pF  
Effective Output Capacitance, Energy Related (Note 2)  
Effective Output Capacitance, Time Related (Note 3)  
Total Gate Charge  
V

DS

= 0 to 15 V, V

GS

= 0 V  
Q1  
V

DS

= 15 V, V

GS

= 5 V,
 
I

D

= 25 A  
V

DS

= 15 V, I

D

= 25 A  
4.9  
9.2  
Q

GS  

Gate-to-Source Charge  
1.3  
Q

GD  

Gate-to-Drain Charge  
0.6  
nC  
pF  
nC  
Q

G(TH)  

Q

OSS  

Q

RR  

Gate Charge at Threshold  
0.9  
Output Charge  
V

DS

= 15 V, V

GS

= 0 V  
6.1  
Source-Drain Recovery Charge  
Input Capacitance  
0
C

ISS  

1630  
64  
1960  
2060  
C

RSS  

Reverse Transfer Capacitance  
Output Capacitance  
V

DS

= 15 V, V

GS

= 0 V  
C

OSS  

C

OSS(ER)  

C

OSS(TR)  

Q

G  

1370  
1740  
1900  
15  
Effective Output Capacitance, Energy Related (Note 2)  
Effective Output Capacitance, Time Related (Note 3)  
Total Gate Charge  
V

DS

= 0 to 15 V, V

GS

= 0 V  
Q2  
V

DS

= 15 V, V

GS

= 5 V,
 
I

D

= 25 A  
19  
44  
Q

GS  

Gate-to-Source Charge  
4.8  
Q

GD  

Gate-to-Drain Charge  
V

DS

= 15 V, I

D

= 25 A  
V

DS

= 15 V, V

GS

= 0 V  
2.7  
Q

G(TH)  

Q

OSS  

Q

RR  

Gate Charge at Threshold  
3.4  
Output Charge  
29  
Source-Drain Recovery Charge  
0
Note 2: C

O
SS(ER)

is a fixed capacitance that gives the same stored energy as C

OSS

while V

DS

is rising from 0 to 50% BV

DSS  

Note 3: C

OSS(TR)

is a fixed capacitance that gives the same charging time as C

OSS

while V

DS

is rising from 0 to 50% BV

DSS  

.
.
EPC – THE LEADER IN GaN TECHNOLOGY
 
|

| COPYRIGHT
 
2019 |  
| 2  

eGaN® FET DATASHEET  
EPC2100  
Fꢃꢏꢆꢂe ꢐa ꢈꢑꢐꢉꢒ Tꢓꢔꢃꢍaꢎ ꢕꢆꢇꢔꢆꢇ ꢅꢖaꢂaꢍꢇeꢂꢃꢗꢇꢃꢍꢗ aꢇ ꢘꢙꢚꢅ  
Fꢃꢏꢆꢂe ꢐꢑ ꢈꢒꢓꢉꢔ Tꢕꢖꢃꢍaꢎ ꢗꢆꢇꢖꢆꢇ ꢅꢘaꢂaꢍꢇeꢂꢃꢙꢇꢃꢍꢙ aꢇ ꢓꢚꢛꢅ  
100  
ꢀ0  
ꢁ0  
ꢂ0  
20  
0
ꢀ00  
ꢁ00  
200  
100  
0
ꢆ
ꢆ
ꢆ
ꢆ
ꢉ ꢄ ꢆ  
ꢉ ꢂ ꢆ  
ꢉ ꢅ ꢆ  
ꢉ 2 ꢆ  
ꢄ
ꢄ
ꢄ
ꢄ
ꢇ ꢃ ꢄ  
ꢇ ꢀ ꢄ  
ꢇ ꢁ ꢄ  
ꢇ 2 ꢄ  
ꢇꢈ  
ꢇꢈ  
ꢇꢈ  
ꢇꢈ  
ꢅꢆ  
ꢅꢆ  
ꢅꢆ  
ꢅꢆ  
0
0ꢃꢄ  
1ꢃ0  
1ꢃꢄ  
2ꢃ0  
2ꢃꢄ  
ꢅꢃ0  
0
0ꢂꢃ  
1ꢂ0  
1ꢂꢃ  
2ꢂ0  
2ꢂꢃ  
ꢁꢂ0  
ꢊ

DS

ꢁ
DꢂaꢃꢄꢋꢇꢌꢋSꢌꢆꢂꢍe ꢊꢌꢎꢇaꢏe ꢈꢊꢉ  
ꢊ

DS

ꢁ
DꢂaꢃꢄꢋꢇꢌꢋSꢌꢆꢂꢍe ꢊꢌꢎꢇaꢏe ꢈꢊꢉ  
Fꢃꢏꢆꢂe ꢐa ꢈꢑꢒꢉꢓ Tꢂaꢄꢔꢕeꢂ ꢅꢖaꢂaꢍꢇeꢂꢃꢔꢇꢃꢍꢔ  
Fꢃꢏꢆꢂe ꢐꢑ ꢈꢒꢐꢉꢓ Tꢂaꢄꢔꢕeꢂ ꢅꢖaꢂaꢍꢇeꢂꢃꢔꢇꢃꢍꢔ  
100  
80  
60  
40  
20  
0
400  
300  
200  
100  
0
25˚C  
125˚C  
25˚C  
125˚C  
V

DS

= 3 V  
V

DS

= 3 V  
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
ꢊ

GS

ꢁ GaꢇeꢋꢇꢌꢋSꢌꢆꢂꢍe ꢊꢌꢎꢇaꢏe ꢈꢊꢉ  
ꢊ

GS

ꢁ GaꢇeꢋꢇꢌꢋSꢌꢆꢂꢍe ꢊꢌꢎꢇaꢏe ꢈꢊꢉ  
Fꢇꢐꢊꢆe ꢑa ꢁꢒꢓꢄꢔ ꢀ

DSꢁꢂꢃꢄ

ꢕꢌꢖ ꢎ

GS

ꢗꢂꢆ ꢎaꢆꢇꢂꢊꢌ Dꢆaꢇꢃ ꢘꢊꢆꢆeꢃꢉꢌ  
Fꢇꢐꢊꢆe ꢑꢒ ꢁꢓꢔꢄꢕ ꢀ

DSꢁꢂꢃꢄ

ꢖꢌꢗ ꢎ

GS

ꢘꢂꢆ ꢎaꢆꢇꢂꢊꢌ Dꢆaꢇꢃ ꢙꢊꢆꢆeꢃꢉꢌ  
ꢈ
ꢂ
ꢃ
ꢀ
2
1
0
ꢄ

ꢅ

ꢆ 1ꢂ ꢇ  
ꢄ

ꢅ

ꢆ 2ꢂ ꢇ  
ꢄ

ꢅ

ꢆ ꢀꢂ ꢇ  
ꢄ

ꢅ

ꢆ ꢂ0 ꢇ  
20  
1ꢂ  
10  
ꢂ
ꢄ

ꢅ

ꢆ 1ꢂ ꢇ  
ꢄ

ꢅ

ꢆ 2ꢂ ꢇ  
ꢄ

ꢅ

ꢆ ꢀꢂ ꢇ  
ꢄ

ꢅ

ꢆ ꢂ0 ꢇ  
0
2ꢁꢂ  
ꢀꢁ0  
ꢀꢁꢂ  
ꢃꢁ0  
ꢃꢁꢂ  
ꢂꢁ0  
2ꢁꢂ  
ꢀꢁ0  
ꢀꢁꢂ  
ꢃꢁ0  
ꢃꢁꢂ  
ꢂꢁ0  
ꢎ

GS

ꢅ GaꢉeꢈꢉꢂꢈSꢂꢊꢆꢋe ꢎꢂꢏꢉaꢐe ꢁꢎꢄ  
ꢎ

GS

ꢅ GaꢉeꢈꢉꢂꢈSꢂꢊꢆꢋe ꢎꢂꢏꢉaꢐe ꢁꢎꢄ  
EPC – THE LEADER IN GaN TECHNOLOGY
 
|

| COPYRIGHT
 
2019 |  
| 3  

eGaN® FET DATASHEET  
EPC2100  
Fꢀꢁꢂꢃe ꢄa ꢅꢆꢇꢈꢉ ꢊ

DSꢅꢋꢌꢈ

ꢍꢎꢏ ꢐ

GS

ꢑꢋꢃ ꢐaꢃꢀꢋꢂꢎ Teꢒꢓeꢃaꢔꢂꢃeꢎ  
Fꢀꢁꢂꢃe ꢄꢅ ꢆꢇꢈꢉꢊ ꢋ

DSꢆꢌꢍꢉ

ꢎꢏꢐ ꢑ

GS

ꢒꢌꢃ ꢑaꢃꢀꢌꢂꢏ Teꢓꢔeꢃaꢕꢂꢃeꢏ  
6
5
4
3
2
1
0
20  
15  
10  
5
25˚C  
125˚C  
25˚C  
125˚C  
I

D

= 25 A  
I

D

= 25 A  
0
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
ꢐ

GS

ꢕ GaꢔeꢖꢔꢋꢖSꢋꢂꢃꢗe ꢐꢋꢘꢔaꢁe ꢅꢐꢈ  
ꢑ

GS

ꢖ GaꢕeꢗꢕꢌꢗSꢌꢂꢃꢘe ꢑꢌꢙꢕaꢁe ꢆꢑꢉ  
Fꢃꢈꢉꢊe ꢋa ꢆꢌꢍꢇꢎ ꢀaꢁaꢂꢃꢄaꢅꢂe ꢆꢏꢃꢅeaꢊ Sꢂaꢐeꢇ  
Fꢃꢈꢉꢊe ꢋꢌ ꢆꢍꢎꢇꢏ ꢀaꢁaꢂꢃꢄaꢅꢂe ꢆꢐꢑꢈ Sꢂaꢒeꢇ  
1000  
100  
10  
ꢊ00  
C

ꢂꢃꢃ

ꢄ C

ꢅꢆ

ꢇ C

ꢃꢆ  

C

ꢈꢃꢃ

ꢄ C

ꢅꢆ

ꢇ C

ꢅꢃ  

C

ꢉꢃꢃ

ꢄ C

ꢅꢆ  

ꢋ00  
ꢌ00  
200  
0
C

ꢂꢃꢃ

ꢄ C

ꢅꢆ

ꢇ C

ꢃꢆ  

C

ꢈꢃꢃ

ꢄ C

ꢅꢆ

ꢇ C

ꢅꢃ  

C

ꢉꢃꢃ

ꢄ C

ꢅꢆ  

1
0
ꢀ
10  
1ꢀ  
20  
2ꢀ  
ꢁ0  
0
ꢀ
10  
1ꢀ  
20  
2ꢀ  
ꢁ0  
ꢑ

DS

ꢒ DꢊaꢃꢅꢓꢄꢔꢓSꢔꢉꢊꢂe ꢑꢔꢐꢄaꢈe ꢆꢑꢇ  
ꢓ

DS

ꢔ DꢊaꢃꢅꢕꢄꢑꢕSꢑꢉꢊꢂe ꢓꢑꢒꢄaꢈe ꢆꢓꢇ  
Fꢃꢈꢉꢊe ꢋꢂ ꢆꢌꢍꢇꢎ ꢀaꢁaꢂꢃꢄaꢅꢂe ꢆꢏꢃꢅeaꢊ Sꢂaꢐeꢇ  
Fꢃꢈꢉꢊe ꢋꢌ ꢆꢍꢎꢇꢏ ꢀaꢁaꢂꢃꢄaꢅꢂe ꢆꢐꢑꢈ Sꢂaꢒeꢇ  
ꢈ000  
2ꢉ00  
2000  
1ꢉ00  
1000  
ꢉ00  
C

ꢀꢁꢁ

ꢂ C

ꢃꢄ

ꢅ C

ꢁꢄ  

C

ꢆꢁꢁ

ꢂ C

ꢃꢄ

ꢅ C

ꢃꢁ  

C

ꢇꢁꢁ

ꢂ C

ꢃꢄ  

1000  
100  
10  
C

ꢂꢃꢃ

ꢄ C

ꢅꢆ

ꢇ C

ꢃꢆ  

C

ꢈꢃꢃ

ꢄ C

ꢅꢆ

ꢇ C

ꢅꢃ  

C

ꢉꢃꢃ

ꢄ C

ꢅꢆ  

0
0
ꢉ
10  
1ꢉ  
20  
2ꢉ  
ꢈ0  
0
ꢀ
10  
1ꢀ  
20  
2ꢀ  
ꢁ0  
ꢑ

DS

ꢒ DꢊaꢃꢅꢓꢄꢔꢓSꢔꢉꢊꢂe ꢑꢔꢐꢄaꢈe ꢆꢑꢇ  
ꢓ

DS

ꢔ DꢊaꢃꢅꢕꢄꢑꢕSꢑꢉꢊꢂe ꢓꢑꢒꢄaꢈe ꢆꢓꢇ  
EPC – THE LEADER IN GaN TECHNOLOGY
 
|

| COPYRIGHT
 
2019 |  
| 4  

eGaN® FET DATASHEET  
EPC2100  
Figure 6a (Q1): Output Charge and C

OSS

Stored Energy  
Figure 6a: Output Charge and C

OSS

Stored Energy  
Figure 6b (Q2): Output Charge and C

OSS

Stored Energy  
Figure 6a: Output Charge and C

OSS

Stored Energy  
0ꢀ12  
0ꢀ10  
0ꢀ0ꢁ  
0ꢀ0ꢂ  
0ꢀ0ꢃ  
0ꢀ02  
0ꢀ00  
12  
10  
ꢁ
0ꢄꢀ  
0ꢄꢁ  
0ꢄꢂ  
0ꢄꢃ  
0ꢄ2  
0ꢄ1  
0ꢄ0  
ꢀ0  
ꢁ0  
ꢂ0  
ꢃ0  
20  
10  
0
ꢂ
ꢃ
2
0
0
ꢁ
10  
1ꢁ  
20  
2ꢁ  
ꢃ0  
0
ꢄ
10  
1ꢄ  
20  
2ꢄ  
ꢅ0  
V

DS

– Drain-to-Source Voltage (V)  
V

DS

– Drain-to-Source Voltage (V)  
Fꢀꢁꢂꢃe ꢄa ꢅꢆꢇꢈꢉ Gaꢊe ꢋꢌaꢃꢁe  
Fꢀꢁꢂꢃe ꢄꢅ ꢆꢇꢈꢉꢊ Gaꢋe ꢌꢍaꢃꢁe  
ꢅ
ꢀ
ꢇ
ꢈ
2
1
0
ꢂ

ꢃ

ꢄ 2ꢅ ꢆ  
ꢁ

ꢂ

ꢃ 2ꢀ ꢄ  
ꢅ

ꢂꢆ

ꢃ 1ꢀ ꢅ  
ꢁ
ꢀ
2
1
0
ꢇ

ꢃꢈ

ꢄ 1ꢅ ꢇ  
0
1
2
ꢀ
ꢁ
0
ꢀ
10  
1ꢀ  
ꢆ

G

ꢎ Gaꢊe ꢋꢌaꢃꢁe ꢅꢓꢋꢈ  
ꢇ

G

ꢏ Gaꢋe ꢌꢍaꢃꢁe ꢆꢔꢌꢉ  
Fꢈꢏꢃꢄe ꢐa ꢋꢑꢒꢌꢓ ꢔeꢕeꢄꢖe DꢄaꢈꢉꢆSꢂꢃꢄꢅe ꢊꢗaꢄaꢅꢇeꢄꢈꢖꢇꢈꢅꢖ  
Fꢈꢏꢃꢄe ꢐꢑ ꢋꢒꢓꢌꢔ ꢕeꢖeꢄꢗe DꢄaꢈꢉꢆSꢂꢃꢄꢅe ꢊꢘaꢄaꢅꢇeꢄꢈꢗꢇꢈꢅꢗ  
100  
80  
60  
40  
20  
0
400  
300  
200  
100  
0
25˚C  
125˚C  
25˚C  
125˚C  
V

GS

=
0
V  
V

GS

=
0
V  
0
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
0
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
ꢍ

SD

ꢁ SꢂꢃꢄꢅeꢆꢇꢂꢆDꢄaꢈꢉ ꢍꢂꢎꢇaꢏe ꢋꢍꢌ  
ꢍ

SD

ꢁ SꢂꢃꢄꢅeꢆꢇꢂꢆDꢄaꢈꢉ ꢍꢂꢎꢇaꢏe ꢋꢍꢌ  
EPC – THE LEADER IN GaN TECHNOLOGY
 
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| COPYRIGHT
 
2019 |  
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5

eGaN® FET DATASHEET  
EPC2100  
Fꢀꢁꢂꢃe ꢄa ꢅꢆꢇꢈꢉ  
Nꢊꢃꢋaꢌꢀꢍeꢎ ꢏꢐꢑSꢒaꢒe ꢓeꢔꢀꢔꢒaꢐꢕe ꢖꢔꢗ Teꢋꢘeꢃaꢒꢂꢃe  
Fꢀꢁꢂꢃe ꢄꢅ ꢆꢇꢈꢉꢊ  
Nꢋꢃꢌaꢍꢀꢎeꢏ ꢐꢑꢒSꢓaꢓe ꢔeꢕꢀꢕꢓaꢑꢖe ꢗꢕꢘ Teꢌꢙeꢃaꢓꢂꢃe  
2ꢈ0  
1ꢈꢉ  
1ꢈꢊ  
1ꢈꢋ  
1ꢈ2  
1ꢈ0  
0ꢈꢉ  
2ꢈ0  
1ꢈꢉ  
1ꢈꢊ  
1ꢈꢋ  
1ꢈ2  
1ꢈ0  
0ꢈꢉ  
ꢀ

ꢁ

ꢂ 2ꢃ ꢄ  
ꢅ

ꢆꢇ

ꢂ ꢃ ꢅ  
ꢀ

ꢁ

ꢂ 2ꢃ ꢄ  
ꢅ

ꢆꢇ

ꢂ ꢃ ꢅ  
0
2ꢃ  
ꢃ0  
ꢌꢃ  
100  
12ꢃ  
1ꢃ0  
0
2ꢃ  
ꢃ0  
ꢌꢃ  
100  
12ꢃ  
1ꢃ0  
T

ꢙ

ꢚ ꢙꢂꢐꢕꢒꢀꢊꢐ Teꢋꢘeꢃaꢒꢂꢃe ꢅꢛꢜꢈ  
T

ꢚ

ꢛ ꢚꢂꢑꢖꢓꢀꢋꢑ Teꢌꢙeꢃaꢓꢂꢃe ꢆꢜꢝꢉ  
Fꢀꢁꢂꢃe ꢄꢅa ꢆꢇꢄꢈꢉ  
Nꢊꢃꢋaꢌꢀꢍeꢎ Tꢏꢃeꢐꢏꢊꢌꢎ ꢑꢊꢌꢒaꢁe ꢓꢐꢔ Teꢋꢕeꢃaꢒꢂꢃe  
Fꢀꢁꢂꢃe ꢄꢅꢆ ꢇꢈꢉꢊꢋ  
Nꢌꢃꢍaꢎꢀꢏeꢐ Tꢑꢃeꢒꢑꢌꢎꢐ ꢓꢌꢎꢔaꢁe ꢕꢒꢖ Teꢍꢗeꢃaꢔꢂꢃe  
1ꢀꢁ  
1ꢀꢂ  
1ꢀ2  
1ꢀ1  
1ꢀ0  
0ꢀꢃ  
0ꢀꢄ  
0ꢀꢅ  
0ꢀꢆ  
1ꢀꢁ  
1ꢀꢂ  
1ꢀ2  
1ꢀ1  
1ꢀ0  
0ꢀꢃ  
0ꢀꢄ  
0ꢀꢅ  
0ꢀꢆ  
ꢈ

ꢉ

ꢊ ꢁ ꢋꢌ  
ꢈ

ꢉ

ꢊ 1ꢆ ꢋꢌ  
0
2ꢇ  
ꢇ0  
ꢅꢇ  
100  
12ꢇ  
1ꢇ0  
0
2ꢇ  
ꢇ0  
ꢅꢇ  
100  
12ꢇ  
1ꢇ0  
T

ꢖ

ꢗ ꢖꢂꢘꢙꢒꢀꢊꢘ Teꢋꢕeꢃaꢒꢂꢃe ꢆꢚꢛꢈ  
T

ꢘ

ꢙ ꢘꢂꢚꢛꢔꢀꢌꢚ Teꢍꢗeꢃaꢔꢂꢃe ꢇꢜꢝꢊ  
Fꢃꢏꢆꢂe ꢝꢝa ꢈꢞꢝꢉꢟ Saꢠe ꢡꢢeꢂaꢇꢃꢄꢏ Aꢂea  
Fꢃꢏꢆꢂe ꢝꢝꢞ ꢈꢟꢘꢉꢠ Saꢡe ꢢꢣeꢂaꢇꢃꢄꢏ Aꢂea  
1000  
100  
10  
1000  
100  
10  
ꢁꢂꢃꢂꢄꢅꢆ ꢇꢈ ꢉ

ꢊꢋꢌꢍꢎꢏ  

ꢁꢂꢃꢂꢄꢅꢆ ꢇꢈ ꢉ

ꢊꢋꢌꢍꢎꢏ  

Pꢒꢓꢐꢅ ꢔꢂꢆꢄꢕ  
Pꢑꢒꢐꢅ ꢓꢂꢆꢄꢔ  
1 ꢃꢐ  
2ꢖ0 ꢑꢐ  
1 ꢃꢐ  
1
1
2ꢕ0 ꢖꢐ  
100 ꢑꢐ  
10 ꢑꢐ  
100 ꢖꢐ  
0ꢀ1  
0ꢀ1  
0ꢀ1  
0ꢀ1  
1
10  
100  
1
10  
100  
ꢊ

DS

ꢁ DꢂaꢃꢄꢋSꢌꢆꢂꢍe ꢊꢌꢎꢇaꢏe ꢈꢊꢉ  
T

ꢐ

ꢑ ꢒaꢓ ꢔaꢇeꢕꢖ T

ꢅ

ꢑ ꢗꢘꢙꢚꢅꢖ Sꢃꢄꢏꢎe ꢛꢆꢎꢜe  
ꢊ

DS

ꢁ DꢂaꢃꢄꢋSꢌꢆꢂꢍe ꢊꢌꢎꢇaꢏe ꢈꢊꢉ  
T

ꢐ

ꢑ ꢒaꢓ ꢔaꢇeꢕꢖ T

ꢅ

ꢑ ꢗꢘꢙꢚꢅꢖ Sꢃꢄꢏꢎe ꢛꢆꢎꢜe  
EPC – THE LEADER IN GaN TECHNOLOGY
 
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| COPYRIGHT
 
2019 |  
| 6  

eGaN® FET DATASHEET  
EPC2100  
Figure 12a  
Transient Thermal  
Response Curves  
Junction-to-Board  
1
0ꢄ1  
Duty Cycle:  
0.5  
0.2  
0.1  
0.05  
0.02  
P

DM  

t

1  

0.01  
0ꢄ01  
t

2  

Notes:  
Duty Factor: D = t

1

/t

2  

Single Pulse  
Peak T

J

= P

DM

x Z

θJB

x R

θJB

+ T

B  

0ꢄ001  
10

ꢀꢁ  

10

ꢀꢂ  

10

ꢀꢃ  

10

ꢀ2  

10

ꢀ1  

1
10

1  

t

p

, Rectangular Pulse Duration, seconds  
Junction-to-Case  
Figure 12b  
1
0ꢅ1  
Transient Thermal  
Response Curves  
Duty Cycle:  
0.5  
0.2  
0.1  
0.05  
P

DM  

0.02  
t

1  

0ꢅ01  
0.01  
Notes:  
Duty Factor: D = t

1

/t

2  

Peak T

J

= P

DM

x Z

θJC

x R

θJC

+ T

C  

Single Pulse  
0ꢅ001  
10

ꢀꢁ  

10

ꢀꢂ  

10

ꢀꢃ  

10

ꢀꢄ  

10

ꢀ2  

10

ꢀ1  

1
t

p

, Rectangular Pulse Duration, seconds  
Figure 13  
Typical Application Circuit  
ꢇ

ꢈꢁ  

ꢉ
eGaN
IC  
Gaꢀe ꢁꢂꢃꢄeꢂꢅ  
ꢆꢇꢈꢀꢂꢇꢉꢉeꢂ  
ꢇ

ꢈꢁ  

ꢊ
ꢇꢔ  
ꢓ

1  

ꢀꢃꢄꢅ 1  
ꢇ

ꢋꢌꢍ  

ꢉ
ꢕꢋ  
ꢇꢑ  
ꢀꢆ1  
ꢇ

ꢑꢒ  

ꢇCC  
ꢎꢋ  
ꢆ

ꢎꢏꢃꢐ  

ꢓ

2  

ꢀꢃꢄꢅ 2  
ꢀꢁꢂ  
P

ꢀꢁꢂ  

ꢊ
EPC – THE LEADER IN GaN TECHNOLOGY
 
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| COPYRIGHT
 
2019 |  
| 7  

eGaN® FET DATASHEET  
EPC2100  
TAꢀE AND ꢁEEꢂ ꢃꢄNFꢅGꢆꢁATꢅꢄN  
ꢀꢁꢁ ꢂꢃꢄꢅꢆꢇ 12ꢁꢁ ꢈꢃꢉꢊ ꢄꢋꢂꢊ ꢌꢍ ꢎꢏ ꢐꢊꢊꢑ  
ꢙꢌꢋꢉꢊꢉ ꢚꢋꢂꢊ ꢛꢊꢊꢉ ꢒꢃꢐꢊꢅꢄꢃꢌꢍ  
ꢜꢋꢄꢊ ꢕꢝꢁꢂꢓ ꢋꢐꢊ ꢋꢑꢌꢍꢞ ꢄꢆꢃꢓ ꢊꢉꢞꢊ ꢌꢗ ꢄꢆꢊ ꢉꢃꢊ  
d
e
f
g
7
ꢏ
reel  
b
ꢒꢃꢊ  
ꢌꢐꢃꢊꢍꢄꢋꢄꢃꢌꢍ  
ꢉꢌꢄ  
Z Z Z
 
Z  
Y Y Y  
2 1 0 0  
c
a
Y
ꢒꢃꢊ ꢃꢓ ꢂꢑꢋꢅꢊꢉ ꢃꢍꢄꢌ ꢂꢌꢅꢔꢊꢄ  
ꢓꢌꢑꢉꢊꢐ ꢕꢋꢑꢑ ꢓꢃꢉꢊ ꢉꢌꢈꢍ  
ꢖꢗꢋꢅꢊ ꢓꢃꢉꢊ ꢉꢌꢈꢍꢘ  
EPC2100 (note 1)  
Dimension (mm)
 
target min
 
max  
a
12.00 11.70
 
12.30  
1.75 1.65
 
1.85  
5.50 5.45
 
5.55  
4.00 3.90
 
4.10  
4.00 3.90
 
4.10  
2.00 1.95
 
2.05  
1.50 1.50
 
1.60  
b
c (see
 
note)  
d
e
Note 1: MSL 1 (moisture sensitivity level 1) classiꢀed according to IPC/JEDEC industry standard.  
Note 2:
 
Pocket position is relative to the sprocket hole measured as true position of the pocket,  
not the pocket hole.  
f (see
 
note)  
g
DIE MARKINGS  
Laser Markings  
2100  
YYYY  
ZZZZ  
Part  
Pꢀꢁꢂ ꢃ  
ꢄꢀꢁꢅꢆꢇꢈ ꢉꢆꢇꢊ 1  
ꢉꢋꢂꢌꢍꢀꢂꢊ Cꢋꢎꢊ  
ꢄꢀꢁꢅꢆꢇꢈ ꢉꢆꢇꢊ 2  
ꢉꢋꢂꢌꢍꢀꢂꢊ Cꢋꢎꢊ  
ꢄꢀꢁꢅꢆꢇꢈ ꢉꢆꢇꢊ ꢏ  
Number  
EPC2100  
2100  
YYYY  
ZZZZ  
ꢍꢆꢊ ꢋꢁꢆꢊꢇꢂꢀꢂꢆꢋꢇ ꢎꢋꢂ  
ꢐꢀꢂꢊ ꢑꢒꢓꢔꢕ ꢀꢁꢊ ꢀꢖꢋꢇꢈ ꢂꢗꢆꢕ ꢊꢎꢈꢊ ꢋꢘ ꢂꢗꢊ ꢎꢆꢊ  
EPC – THE LEADER IN GaN TECHNOLOGY
 
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| COPYRIGHT
 
2019 |  
| 8  

eGaN® FET DATASHEET  
EPC2100  
DIE OUTLINE  
DIM  
A
B
c
d
MIN  
6020  
2270  
400  
450  
210  
Nominal  
6050  
2300  
400  
450  
225  
MAX  
6080  
2330  
400  
450  
240  
Solder Bump View  
A
40  
39  
38  
37  
36  
5
4
3
2
1
10  
9
15  
14  
13  
12  
11  
20  
19  
18  
17  
16  
25  
24  
23  
22  
21  
30  
29  
28  
27  
26  
35  
34  
33  
32  
31  
45  
44  
43  
42  
41  
50  
49  
48  
47  
55  
54  
53  
52  
51  
60  
59  
58  
57  
56  
65  
64  
63  
62  
61  
70  
69  
68  
67  
66  
75  
74  
73  
72  
71  
e
f
187  
208  
240  
8
Pad 2 is Gate1 (high side)
;
Pad 4 is Gate2 (low side)
;  
Pad 3 is HS Gate Return;  
7
6
46  
f
Pads 5, 12, 13, 14, 15, 22, 23, 24, 25, 32, 33, 34, 35,  
42, 43, 44, 45, 52, 53, 54, 55, 62, 63, 64, 65, 72, 73,  
74, 75 are Ground;  
e
c
Pads 1, 11, 21, 31, 41, 51, 61, 71 are V

IN  

;
Pads 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 26, 27, 28, 29,  
30, 36, 37, 38, 39, 40, 46, 47, 48, 49, 50, 56, 57, 58,  
59, 60, 66, 67, 68, 69, 70 are Switch Node  
Side View  
Seating plane  
RECOMMENDED LAND PATTERN  
(measurements in µm)  
6050  
The land pattern is solder mask defined.  
Suggest SMD Pads at 200 +20/–10 µm.  
190 µm minimum.  
1
2
3
4
5
6
7
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
50  
51  
52  
53  
54  
55  
56  
57  
58  
59  
60  
61  
62  
63  
64  
65  
66  
67  
68  
69  
70  
71  
72  
73  
74  
75  
8
9
10  
400  
RECOMMENDED STENCIL DRAWING  
(measurements in µm)  
6050  
Recommended stencil should be 4 mil (100 µm)  
thick, must be laser cut, openings per drawing.  
Intended for use with SAC305 Type 4 solder,  
reference 88.5% metals content.  
225  
Additional assembly resources available at:  
400  
Efficient Power Conversion Corporation (EPC) reserves the right to make changes without further notice to any products herein to  
improve reliability, function or design. EPC does not assume any liability arising out of the application or use of any product or circuit  
described herein; neither does it convey any license under its patent rights, nor the rights of others.  
Information subject to  
change without notice.  
eGaN® is a registered trademark of Efficient Power Conversion Corporation.  
Revised August 2019  
EPC – THE LEADER IN GaN TECHNOLOGY
 
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| COPYRIGHT
 
2019 |  
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