Infineon-Technologies-AUIRF1404ZSTRL
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AUIRF1404Z
AUIRF1404ZS
AUIRF1404ZL
AUTOMOTIVE GRADE
HEXFET
®
Power MOSFET
Features
V
DSS
40V
Advanced Process Technology
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
R
DS(on)
max.
3.7m
180A
160A
I
D (Silicon Limited)
I
D (Package Limited)
D
D
Description
Specifically designed for Automotive applications, this HEXFET®
Power MOSFET utilizes the latest processing techniques to
achieve extremely low on-resistance per silicon area.
Additional
features of this design
are a 175°C junction operating temperature,
fast switching speed and improved repetitive avalanche rating .
These features combine to make this design an extremely efficient
and reliable device for use in Automotive applications and a wide
variety of other applications.
S
D
S
S
G
D
G
G
G
D
S
Gate
Drain
Source
Standard Pack
Form
Tube
Tube
Base part number
Package Type
Orderable Part Number
Quantity
50
AUIRF1404Z
AUIRF1404ZL
TO-220
TO-262
AUIRF1404Z
AUIRF1404ZL
50
Tube
Tape and Reel Left
50
800
AUIRF1404ZS
AUIRF1404ZSTRL
AUIRF1404ZS
D
2
-Pak
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
These are stress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless
otherwise specified.
Symbol
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
D
@ T
C
= 25°C
Parameter
Max.
180
120
Units
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Package Limited)
A
160
I
DM
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
710
200
1.3
P
D
@T
C
= 25°C
W
W/°C
V
V
GS
E
AS
Gate-to-Source Voltage
Single Pulse Avalanche Energy (Thermally Limited)
± 20
330
mJ
E
AS
(tested)
Single Pulse Avalanche Energy Tested Value
Avalanche Current
480
I
AR
See Fig.15,16, 12a, 12b
A
E
AR
T
J
Repetitive Avalanche Energy
Operating Junction and
mJ
-55 to
+ 175
T
STG
Storage Temperature Range
°C
Soldering Temperature, for 10 seconds (1.6mm from case)
Mounting torque, 6-32 or M3 screw
300
10 lbf•in (1.1N•m)
Thermal Resistance
Symbol
Parameter
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Typ.
–––
0.50
–––
Max.
0.75
–––
Units
R
JC
R
CS
R
JA
R
JA
°C/W
62
Junction-to-Ambient ( PCB Mount, steady state)
40
HEXFET® is a registered trademark of Infineon.
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AUIRF1404Z/S/L
Static @ T
J
= 25°C (unless otherwise specified)
Parameter
Min. Typ.
Max. Units
40 –––
–––
––– 0.033 ––– V/°C
Reference to 25°C, I
D
= 1mA
Conditions
V
(BR)DSS
V
(BR)DSS
/
T
J
R
DS(on)
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
V
V
GS
= 0V, I
D
= 250µA
–––
2.0
2.7
3.7
4.0
V
GS
= 10V, I
D
= 75A
m
V
V
GS(th)
–––
V
DS
= V
GS
, I
D
= 250µA
V
DS
= 25V, I
D
= 75A
V
DS
=40 V, V
GS
= 0V
V
DS
=40V,V
GS
= 0V,T
J
=125°C
V
GS
= 20V
gfs
Forward Trans conductance
170 ––– –––
––– –––
20
––– ––– 250
––– ––– 200
––– –––
-200
S
I
DSS
I
GSS
Drain-to-Source Leakage Current
µA
nA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
V
GS
= -20V
Dynamic Electrical
Characteristics @ T
J
= 25°C (unless otherwise specified)
Q
g
Q
gs
Q
gd
t
d(on)
t
r
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Turn-On Delay Time
Rise Time
––– 100 150
I
D
= 75A
nC V
DS
= 32V
–––
–––
–––
31
42
18
–––
–––
–––
V
GS
= 10V
V
DD
= 20V
––– 110 –––
I
D
= 75A
R
G
= 3.0
ns
t
d(off)
t
f
Turn-Off Delay Time
Fall Time
–––
–––
36
58
–––
–––
V
GS
= 10V
Between lead,
6mm (0.25in.)
from package
and center of die contact
L
D
L
S
Internal Drain Inductance
Internal Source Inductance
–––
–––
4.5
7.5
–––
–––
nH
C
iss
C
oss
C
rss
C
oss
C
oss
C
oss eff.
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
––– 4340 –––
––– 1030 –––
––– 550 –––
––– 3300 –––
––– 920 –––
––– 1350 –––
V
GS
= 0V
V
DS
= 25V
ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 1.0V ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 32V ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 32V
pF
Effective Output Capacitance
Diode Characteristics
Parameter
Min. Typ.
Max. Units
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
T
J
= 25°C,I
S
= 75A,V
GS
= 0V
Continuous Source Current
(Body Diode)
I
S
––– ––– 160
A
––– ––– 750
Pulsed Source Current
(Body Diode)
I
SM
V
SD
t
rr
Q
rr
t
on
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
––– –––
1.3
42
51
V
–––
–––
28
34
ns T
J
= 25°C ,I
F
= 75A, V
DD
= 20V
nC di/dt
= 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Notes:
Repetitive rating;
pulse width limited by max. junction temperature. (See fig. 11)
Limited by T
Jmax,
starting T
J
= 25°C, L = 0.11mH, R
G
= 25
, I
AS
= 75A, V
GS
=10V. Part not recommended for use above this value.
Pulse width
1.0ms; duty cycle
2%.
C
oss
eff. is
a fixed capacitance that gives the same charging time as C
oss
while V
DS
is rising from 0 to 80% V
DSS
Limited by T
Jmax
, see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance.
.
This value determined from sample failure population, starting T
J
= 25°C, L = 0.11mH, R
G
= 25
, I
AS
= 75A, V
GS
=10V.
This is only applied to TO-220AB pakcage.
This is applied to D
2
Pak When mounted on 1″ square PCB (FR-4 or G-10 Material). For recommended footprint and
soldering techniques refer to application note #AN-994
TO-220 device will have an Rth value of 0.65°C/W.
R
is measured at T
J
approximately 90°C.
Calculated continuous current based on maximum allowable junction temperature. Package limitation current limit is 160A.
Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements.
(Refer to AN-1140)
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AUIRF1404Z/S/L
1000
100
10
1000
100
10
VGS
15V
VGS
15V
TOP
TOP
10V
8.0V
7.0V
6.0V
5.5V
5.0V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
BOTTOM 4.5V
4.5V
1
4.5V
20µs PULSE WIDTH
Tj = 175°C
20µs PULSE WIDTH
Tj = 25°C
0.1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig. 2
Typical Output Characteristics
Fig. 1
Typical Output Characteristics
200
160
120
80
1000
100
10
T
= 175°C
T
= 25°C
J
J
T
= 175°C
J
T
= 25°C
J
40
V
= 15V
DS
20µs PULSE WIDTH
V
= 15V
DS
20µs PULSE WIDTH
0
1
0
40
80
120
160
4.0
5.0
V
6.0
7.0
8.0
9.0
10.0
11.0
I
Drain-to-Source Current (A)
D,
, Gate-to-Source Voltage (V)
GS
Fig. 4
Typical Forward Trans conductance
Fig. 3
Typical Transfer Characteristics
vs. Drain Current
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AUIRF1404Z/S/L
20
16
12
8
8000
6000
4000
2000
0
V
C
= 0V,
f = 1 MHZ
I =
75A
GS
D
= C
+ C
, C
SHORTED
iss
gs gd
ds
V
= 32V
DS
VDS= 20V
C
= C
gd
rss
C
= C
+ C
oss
ds
gd
Ciss
4
Coss
Crss
0
0
40
80
120
160
1
10
, Drain-to-Source Voltage (V)
100
Q
Total Gate Charge (nC)
V
G
DS
Fig 5.
Typical Capacitance vs.
Fig 6.
Typical Gate Charge vs.
Drain-to-Source Voltage
Gate-to-Source Voltage
10000
1000
100
10
1000.0
100.0
10.0
1.0
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
T
= 175°C
J
100µsec
1msec
T
= 25°C
J
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
10msec
100
GS
1.4
, Source-toDrain Voltage (V)
1
0.1
0
1
10
1000
0.2
0.6
SD
1.0
1.8
V
, Drain-toSource Voltage (V)
V
DS
Fig. 7
Typical Source-to-Drain Diode
Fig 8.
Maximum Safe Operating Area
2015-11-11
Forward Voltage
4
AUIRF1404Z/S/L
200
150
100
50
2.0
1.5
1.0
0.5
I
= 75A
D
Limited By Package
V
= 10V
GS
0
-60 -40 -20
T
0
20 40 60 80
100 120 140 160 180
25
50
75
100
125
150
175
T
, Case Temperature (°C)
, Junction Temperature (°C)
C
J
Fig 10.
Normalized On-Resistance
Fig 9.
Maximum Drain Current vs. Case Temperature
vs. Temperature
1
D = 0.50
0.20
0.1
0.10
0.05
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
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AUIRF1404Z/S/L
15V
600
500
400
300
200
100
0
ID
DRIVER
+
L
V
DS
TOP
31A
53A
BOTTOM 75A
D.U.T
AS
R
G
V
DD
–
I
A
20V
0.01
t
p
Fig 12a.
Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
25
50
75
100
125
150
175
Starting T
, Junction Temperature (°C)
J
Fig 12c.
Maximum Avalanche Energy
I
AS
vs. Drain Current
Fig 12b.
Unclamped Inductive Waveforms
Id
Vds
Vgs
4.0
Vgs(th)
I
= 250µA
D
3.0
2.0
1.0
Qgs1
Qgs2
Qgd
Qgodr
Fig 13a.
Gate Charge Waveform
-75 -50 -25
0
25 50 75
100 125 150 175
, Temperature ( °C )
T
J
Fig 14.
Threshold Voltage vs. Temperature
Fig 13b.
Gate Charge Test Circuit
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AUIRF1404Z/S/L
10000
1000
100
10
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming Tj
= 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
Duty Cycle = Single Pulse
0.01
0.05
0.10
1
1.0E-08
1.0E-07
1.0E-06
1.0E-05
tav (sec)
1.0E-04
1.0E-03
1.0E-02
1.0E-01
Fig 15.
Typical Avalanche Current vs. Pulse width
400
300
200
100
0
Notes on Repetitive Avalanche Curves , Figures 15, 16:
TOP
BOTTOM 10%
Duty Cycle
= 75A
Single Pulse
I
D
1. Avalanche
failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe
operation in Avalanche is allowed as long as T
jmax
is not exceeded.
3. Equation
below based on circuit and waveforms shown in Figures 12a, 12b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV
= Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. I
av
= Allowable avalanche current.
7.
T
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as
25°C in Figure 15, 16).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche =
t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
25
50
75
100
125
150
175
Starting T
, Junction Temperature (°C)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
T/ Z
thJC
I
av
= 2
T/ [1.3·BV·Z
th
]
J
E
AS (AR)
= P
D (ave)
·t
av
Fig 16.
Maximum Avalanche Energy
vs. Temperature
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AUIRF1404Z/S/L
Fig 17.
Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
Fig 18a.
Switching Time Test Circuit
Fig 18b.
Switching Time Waveforms
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AUIRF1404Z/S/L
TO-220AB Package Outline
(Dimensions are shown in millimeters (inches))
TO-220AB Part Marking Information
Part Number
AUIRF1404Z
Date Code
Y= Year
WW= Work Week
IR Logo
Lot Code
TO-220AB package
is not recommended for Surface Mount Application.
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AUIRF1404Z/S/L
D
2
Pak (TO-263AB) Package Outline
(Dimensions are shown in millimeters (inches))
D
2
Pak (TO-263AB) Part Marking Information
Part Number
AUIRF1404ZS
Date Code
Y= Year
WW= Work Week
IR Logo
Lot Code
10
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AUIRF1404Z/S/L
TO-262 Package Outline
(Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
Part Number
AUIRF1404ZL
Date Code
Y= Year
IR Logo
WW= Work Week
Lot Code
11
2015-11-11
AUIRF1404Z/S/L
D
2
Pak (TO-263AB) Tape & Reel Information
(Dimensions are shown in millimeters (inches))
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
0.368 (.0145)
0.342 (.0135)
FEED DIRECTION
TRL
11.60 (.457)
11.40 (.449)
1.85 (.073)
1.65 (.065)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
NOTES :
1. COMFORMS
TO EIA-418.
2. CONTROLLING
DIMENSION: MILLIMETER.
3. DIMENSION
MEASURED @ HUB.
4. INCLUDES
FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
4
3
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AUIRF1404Z/S/L
Qualification Information
Qualification Level
Automotive
(per AEC-Q101)
Comments: This part number(s) passed Automotive qualification. Infineon’s
Industrial and Consumer qualification level is granted by extension of the higher
Automotive level.
TO-220AB
N/A
Moisture Sensitivity Level
TO-262
D
2
-Pak
MSL1
Class M4
†
Machine Model
AEC-Q101-002
Class H1C
†
AEC-Q101-001
Class C3
†
Human Body Model
ESD
Charged Device Model
AEC-Q101-005
Yes
RoHS Compliant
† Highest
passing voltage.
Revision History
Date
Comments
Updated datasheet with corporate template
Corrected ordering table on page 1.
11/11/2015
Published by
Infineon Technologies AG
81726 München, Germany
©
Infineon Technologies AG 2015
All Rights Reserved.
IMPORTANT NOTICE
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third
party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of
the product of Infineon Technologies in customer’s applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of
customer’s technical departments to evaluate the suitability of the product for the intended application and the
completeness of the product information given in this document with respect to such application.
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest
WARNINGS
Due to technical requirements products may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies office.
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.
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