Infineon-Technologies-AUIRF3205Z

Part #Infineon-Technologies-AUIRF3205Z
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Infineon-Technologies-AUIRF3205Z
AUIRF3205Z  
AUTOMOTIVE GRADE  
AUIRF3205ZS  
HEXFET

®

Power MOSFET  
Features  
V

DSS  

55V  
Advanced Process Technology  
Ultra Low On-Resistance  
175°C Operating Temperature  
Fast Switching  
Repetitive Avalanche Allowed up to Tjmax  
Lead-Free, RoHS Compliant  
Automotive Qualified *  
R

DS(on)

max.  
I

D (Silicon Limited)  

I

D (Package Limited)  

6.5m
 
110A  
75A  
D
Description  
S
Specifically designed for Automotive applications, this HEXFET® Power  
MOSFET utilizes the latest processing techniques to achieve extremely low  
on-resistance per silicon area.
 
Additional features of this design
 
are a 175°C  
junction operating temperature, fast switching speed and improved repetitive  
avalanche rating . These features combine to make this design an extremely  
efficient and reliable device for use in Automotive applications and a wide  
variety of other applications.  
S
D
G
G

G
D
S
Gate  
Drain  
Source  
Standard Pack  
Form  
Tube  
Base part number  
AUIRF3205Z  
Package Type  
TO-220  
Orderable Part Number  
Quantity  
50  
50  
800  
AUIRF3205Z  
AUIRF3205ZS  
AUIRF3205ZSTRL  
Tube  
Tape and Reel Left  
AUIRF3205ZS  
D

2

-Pak  
Absolute Maximum Ratings  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress  
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance  
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless  
otherwise specified.  
Symbol  
Parameter  
Max.  
Units  
I

D

@ T

C

= 25°C  
Continuous Drain Current, V

GS

@ 10V (Silicon Limited)  
110  
I

D

@ T

C

= 100°C  
I

D

@ T

C

= 25°C  
Continuous Drain Current, V

GS

@ 10V (Silicon Limited)  
Continuous Drain Current, V

GS

@ 10V (Package Limited)  
78  
75  
A
I

DM  

Pulsed Drain Current
 
Maximum Power Dissipation  
Linear Derating Factor  
440  
170  
1.1  
P

D

@T

C

= 25°C  
W
W/°C  
V
V

GS  

E

AS  

Gate-to-Source Voltage  
Single Pulse Avalanche Energy (Thermally Limited)
  
± 20  
180  
mJ  
E

AS

(tested)  
Single Pulse Avalanche Energy Tested Value
  
Avalanche Current
  
250  
I

AR  

See Fig.15,16, 12a, 12b  
A
E

AR  

T

J  

Repetitive Avalanche Energy
  
mJ  
Operating Junction and  
-55 to
 
+ 175  
T

STG  

Storage Temperature Range  
°C  
Soldering Temperature, for 10 seconds (1.6mm from case)  
Mounting torque, 6-32 or M3 screw
  
300  
10 lbf•in (1.1N•m)  
Thermal Resistance  
Symbol  
Parameter  
Junction-to-Case
  
Typ.  
–––  
Max.  
0.90  
–––  
62  
Units  
R

JC  

R

CS  

R

JA  

R

JA  

Case-to-Sink, Flat, Greased Surface
  
Junction-to-Ambient
  
0.50  
–––  
°C/W  
Junction-to-Ambient ( PCB Mount, steady state)
  
40  
HEXFET® is a registered trademark of Infineon.  
*
Qualification standards can be found at

1
2015-11-13  

AUIRF3205Z/S  
Static @ T

J

= 25°C (unless otherwise specified)  
Parameter  
Min. Typ. Max.
 
Units  
55 ––– –––  
––– 0.051 –––
 
V/°C Reference
 
to 25°C, I

D

= 1mA  
Conditions  
V

GS

= 0V, I

D

= 250µA  
V

(BR)DSS  

V

(BR)DSS

/
T

J  

R

DS(on)  

Drain-to-Source Breakdown Voltage  
Breakdown Voltage Temp. Coefficient  
Static Drain-to-Source On-Resistance  
Gate Threshold Voltage  
V
––– 4.9  
2.0 ––– 4.0  
71 ––– –––  
6.5  
V

GS

= 10V, I

D

= 66A
  
V

DS

= V

GS

, I

D

= 250µA  
V

DS

= 25V, I

D

= 66A  
m
  
V
V

GS(th)  

gfs  
Forward Trans conductance  
S
––– –––  
20  
V

DS

= 55V, V

GS

= 0V  
I

DSS  

I

GSS  

Drain-to-Source Leakage Current  
µA  
nA  
––– ––– 250  
––– ––– 200  
––– ––– -200  
V

DS

= 55V,V

GS

= 0V,T

J

=125°C  
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
V
V

GS

= 20V  

GS

= -20V  
Dynamic Electrical
 
Characteristics @ T

J

= 25°C (unless otherwise specified)  
Q

g  

Q

gs  

Q

gd  

t

d(on)  

t

r  

Total Gate Charge  
Gate-to-Source Charge  
Gate-to-Drain Charge  
Turn-On Delay Time  
Rise Time  
––– 76  
––– 21  
––– 30  
––– 18  
––– 95  
––– 45  
––– 67  
110  
–––  
–––  
–––  
–––  
–––  
–––  
I

D

= 66A  
nC V

DS

= 44V  

GS

= 10V
  
V
V

DD

= 28V  
I

D

= 66A  
R

G

= 6.8
  
ns  
t

d(off)  

t

f  

Turn-Off Delay Time  
Fall Time  
V

GS

= 10V
  
Between lead,  
6mm (0.25in.)  
from package  
L

D  

L

S  

Internal Drain Inductance  
Internal Source Inductance  
––– 4.5 –––  
––– 7.5 –––  
nH  
and center of die contact  
C

iss  

C

oss  

Input Capacitance  
Output Capacitance  
––– 3450 –––  
––– 550 –––  
V

GS

= 0V  
V

DS

= 25V  
ƒ = 1.0MHz  
C

rss  

Reverse Transfer Capacitance  
Output Capacitance  
Output Capacitance  
––– 310 –––  
––– 1940 –––  
––– 430 –––  
––– 640 –––  
pF  
C

oss  

C

oss  

V

GS

= 0V, V

DS

= 1.0V ƒ = 1.0MHz  
V

GS

= 0V, V

DS

= 44V ƒ = 1.0MHz  
V

GS

= 0V, V

DS

= 0V to 44V
  
C

oss eff.  

Effective Output Capacitance  
Diode Characteristics  
Parameter  
Min. Typ. Max.
 
Units  
––– –––
 
75  
Conditions  
MOSFET symbol  
showing the  
integral reverse  
p-n junction diode.  
Continuous Source Current  
(Body Diode)  
I

S  

A
Pulsed Source Current  
(Body Diode)
  
I

SM  

––– ––– 440  
––– –––
 
1.3  
V

SD  

t

rr  

Q

rr  

Diode Forward Voltage  
Reverse Recovery Time  
Reverse Recovery Charge  
Forward Turn-On Time  
V
T

J

= 25°C,I

S

= 66A,V

GS

= 0V
  
––– 28  
––– 25  
42  
38  
ns  
T

J

= 25°C ,I

F

= 66A , V

DD

= 25V  
nC di/dt
 
= 100A/µs
  
Intrinsic turn-on time is negligible (turn-on is dominated by L

S

+L

D

)  
t

on  

Notes:
 
Repetitive rating;
 
pulse width limited by max. junction temperature. (See fig.11)  
Limited by T

Jmax,

starting T

J

= 25°C, L = 0.08mH, R

G

= 25
, I

AS

= 66A, V

GS

=10V. Part not recommended for use above this value.  
Pulse width

1.0ms; duty cycle
2%.  
C

oss

eff. is
 
a fixed capacitance that gives the same charging time as C

oss

while V

DS

is rising from 0 to 80% V

DSS  

Limited by T

Jmax

, see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance.  
.
This value determined from sample failure population, starting
 
T

J

= 25°C, L = 0.08mH, R

G

= 25
, I

AS

= 66A, V

GS

=10V.  

This is only applied to TO-220AB package.
  
This is applied to D

2

Pak, When mounted on 1″ square PCB (FR-4 or G-10 Material). For recommended footprint and soldering  
techniques refer to application note #AN-994  

R

is measured at T

J

of approximately 90°C  
2
2015-11-13  

AUIRF3205Z/S  
1000  
100  
10  
1000  
100  
10  
VGS  
15V  
VGS  
15V  
TOP  
TOP  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
BOTTOM 4.5V  
BOTTOM 4.5V  
4.5V  
4.5V  
20µs PULSE WIDTH  
Tj = 25°C  
20µs PULSE WIDTH  
Tj = 175°C  
1
0.1  
1
10  
100  
0.1  
1
10  
100  
V
, Drain-to-Source Voltage (V)  
V
, Drain-to-Source Voltage (V)  
DS  
DS  
Fig. 2
Typical Output Characteristics  
Fig. 1
Typical Output Characteristics  
120  
100  
80  
60  
40  
20  
0
1000  
100  
10  
T
= 175°C  
J
T
= 25°C  
J
T
= 175°C  
J
T
= 25°C  
J
V
= 10V  
DS  
20µs PULSE WIDTH  
V
= 25V  
20µs PULSE WIDTH  
DS  
1
0
20  
D,  
40  
60  
80  
100  
4.0  
5.0  
6.0  
7.0  
8.0  
9.0  
10.0  
11.0  
I
Drain-to-Source Current (A)  
V
, Gate-to-Source Voltage (V)  
GS  
Fig. 3
Typical Transfer Characteristics  
Fig. 4
Typical Forward Trans conductance  
vs. Drain Current  
3
2015-11-13  

AUIRF3205Z/S  
6000  
5000  
4000  
3000  
2000  
1000  
0
V
= 0V,  
f = 1 MHZ  
20  
16  
12  
8
GS  
I =
 
66A  
D
C
C
C
= C
 
+ C
 
, C  
SHORTED  
ds  
iss  
gs  
gd  
= C  
V
= 44V  
rss  
oss  
gd  
DS  
= C
 
+ C  
ds  
gd  
VDS= 28V  
VDS= 11V  
Ciss  
4
Coss  
Crss  
0
1
10  
, Drain-to-Source Voltage (V)  
100  
0
20  
40  
60  
80  
100  
120  
V
DS  
Q
Total Gate Charge (nC)  
G
Fig 6.
 
Typical Gate Charge vs. Gate-to-Source Voltage  
Fig 5.
 
Typical Capacitance vs. Drain-to-Source Voltage  
10000  
1000.0  
OPERATION IN THIS AREA  
LIMITED BY R  
(on)  
DS  
1000  
100  
10  
T
= 175°C  
100.0  
10.0  
1.0  
J
100µsec  
T
= 25°C  
J
1msec  
1
Tc = 25°C  
Tj = 175°C  
Single Pulse  
10msec  
V
= 0V  
GS  
0.1  
0.1  
1
10  
100  
1000  
0.2  
0.6  
1.0  
1.4  
1.8  
2.2  
V
, Drain-toSource Voltage (V)  
V
, Source-toDrain Voltage (V)  
DS  
SD  
Fig. 7
Typical Source-to-Drain Diode  
Fig 8.
 
Maximum Safe Operating Area  
Forward Voltage  
4
2015-11-13  

AUIRF3205Z/S  
2.5  
2.0  
1.5  
1.0  
0.5  
120  
100  
80  
60  
40  
20  
0
I
= 66A  
LIMITED BY PACKAGE  
D
V
= 10V  
GS  
25  
50  
75  
100  
125  
150  
175  
-60 -40 -20  
T
0
20 40 60 80
 
100 120 140 160 180  
T
, Case Temperature (°C)  
, Junction Temperature (°C)  
C
J
Fig 9.
 
Maximum Drain Current vs.  
Fig 10.
 
Normalized On-Resistance  
Case Temperature  
vs. Temperature  
1
D = 0.50  
0.20  
0.1  
0.01  
0.10  
0.05  
0.02  
0.01  
SINGLE PULSE  
( THERMAL RESPONSE )  
Notes:  
1. Duty Factor D = t1/t2  
2. Peak Tj = P dm x Zthjc + Tc  
0.001  
1E-006  
1E-005  
0.0001  
0.001  
0.01  
0.1  
t
, Rectangular Pulse Duration (sec)  
1
Fig 11.
 
Maximum Effective Transient Thermal Impedance, Junction-to-Case  
5
2015-11-13  

AUIRF3205Z/S  
15V  
DRIVER  
+
L
V
DS  
350  
300  
250  
200  
150  
100  
50  
ID  
TOP  
27A  
47A  
D.U.T  
AS  
R
G
V
BOTTOM 66A  
DD  
–
I
A
20V  
0.01  
t
p
Fig 12a.
 
Unclamped Inductive Test Circuit  
V
(BR)DSS  
t
p
0
25  
50  
75  
100  
125  
150  
175  
Starting T
 
, Junction Temperature (°C)  
J
I
AS  
Fig 12b.
 
Unclamped Inductive Waveforms  
Fig 12c.
Maximum Avalanche Energy vs. Drain Current  
4.0  
I
= 250µA  
D
3.0  
2.0  
1.0  
Fig 13a.
 
Gate Charge Test Circuit  
Id  
Vds  
Vgs  
Vgs(th)  
-75 -50 -25  
0
25 50 75
 
100 125 150 175  
, Temperature ( °C )  
T
J
Qgs1  
Qgs2  
Qgd  
Qgodr  
Fig 14.
Threshold Voltage vs. Temperature  
Fig 13b.
 
Gate Charge Waveform  
6
2015-11-13  

AUIRF3205Z/S  
1000  
100  
10  
Duty Cycle = Single Pulse  
0.01  
Allowed avalanche Current vs  
avalanche pulsewidth, tav  
assuming
Tj = 25°C due to  
avalanche losses. Note: In no  
case should Tj be allowed to  
exceed Tjmax  
0.05  
0.10  
1
0.1  
1.0E-08  
1.0E-07  
1.0E-06  
1.0E-05  
1.0E-04  
1.0E-03  
1.0E-02  
1.0E-01  
tav (sec)  
Fig 15.
 
Avalanche Current vs. Pulse width  
Notes on Repetitive Avalanche Curves , Figures 15, 16:  
(For further info, see AN-1005 at www.infineon.com)  
1. Avalanche
 
failures assumption:  
Purely a thermal phenomenon and failure occurs at a temperature far in  
excess of T
jmax
. This is validated for every part type.  
2. Safe
 
operation in Avalanche is allowed as long as T
jmax
is not exceeded.  
3. Equation
 
below based on circuit and waveforms shown in Figures 12a, 12b.  
4. P
D (ave)
= Average power dissipation per single avalanche pulse.  
5. BV
 
= Rated breakdown voltage (1.3 factor accounts for voltage increase  
during avalanche).  
200  
160  
120  
80  
TOP  
BOTTOM 10%
 
Duty Cycle  
= 66A  
Single Pulse  
I
D
6. I
av
= Allowable avalanche current.  
7.
T
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as  
25°C in Figure 14, 15).  
t
av =
Average time in avalanche.  
D = Duty cycle in avalanche =
 
t
av
·f  
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)  
40  
P

D (ave)

= 1/2 ( 1.3·BV·I

av

) =
T/ Z

thJC  

I

av

= 2
T/ [1.3·BV·Z

th

]  
0
25  
50  
75  
100  
125  
150  
175  
Starting T
 
, Junction Temperature (°C)  
J
E

AS (AR)

= P

D (ave)

·t

av  

Fig 16.
 
Maximum Avalanche Energy vs. Temperature  
7
2015-11-13  

AUIRF3205Z/S  
Fig 17.
Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs  
Fig 18a.
 
Switching Time Test Circuit  
Fig 18b.
 
Switching Time Waveforms  
8
2015-11-13  

AUIRF3205Z/S  
TO-220AB Package Outline
(Dimensions are shown in millimeters (inches))  
TO-220AB Part Marking Information  
Part Number  
AUIRF3205Z  
Date Code  
IR Logo  
Y= Year  
WW= Work Week  
Lot Code  
Note: For the most current drawing please refer to IR website at

9
2015-11-13  

AUIRF3205Z/S  
D

2

Pak (TO-263AB) Package Outline
(Dimensions are shown in millimeters (inches))  
D

2

Pak (TO-263AB) Part Marking Information  
Part Number  
AUIRF3205ZS  
Date Code  
IR Logo  
Y= Year  
WW= Work Week  
Lot Code  
Note: For the most current drawing please refer to IR website at

10  
2015-11-13  

AUIRF3205Z/S  
D

2

Pak (TO-263AB) Tape & Reel Information
(Dimensions are shown in millimeters (inches))  
TRR  
1.60 (.063)  
1.50 (.059)  
1.60 (.063)  
4.10 (.161)  
1.50 (.059)  
0.368 (.0145)  
0.342 (.0135)  
3.90 (.153)  
FEED DIRECTION  
TRL  
11.60 (.457)  
11.40 (.449)  
1.85 (.073)  
1.65 (.065)  
24.30 (.957)  
23.90 (.941)  
15.42 (.609)  
15.22 (.601)  
1.75 (.069)  
1.25 (.049)  
10.90 (.429)  
10.70 (.421)  
4.72 (.136)  
4.52 (.178)  
16.10 (.634)  
15.90 (.626)  
FEED DIRECTION  
13.50 (.532)  
12.80 (.504)  
27.40 (1.079)  
23.90 (.941)  
4
330.00  
(14.173)  
MAX.  
60.00 (2.362)  
MIN.  
30.40 (1.197)  
MAX.  
NOTES :  
1. COMFORMS
 
TO EIA-418.  
2. CONTROLLING
 
DIMENSION: MILLIMETER.  
3. DIMENSION
 
MEASURED @ HUB.  
4. INCLUDES
 
FLANGE DISTORTION @ OUTER EDGE.  
26.40 (1.039)  
24.40 (.961)  
4
3
Note: For the most current drawing please refer to IR website at

11  
2015-11-13  

AUIRF3205Z/S  
Qualification Information  
Qualification Level  
Automotive  
(per AEC-Q101)  
Comments: This part number(s) passed Automotive qualification. Infineon’s  
Industrial and Consumer qualification level is granted by extension of the higher  
Automotive level.  
TO-220 Pak  
D

2

-Pak  
N/A  
Moisture Sensitivity Level  
MSL1  
Class M4 (+/- 425V)

†  

AEC-Q101-002  
Class H1C (+/- 2000V)

†  

AEC-Q101-001  
Class C5 (+/- 1125V)

†  

AEC-Q101-005  
Yes  
Machine Model  
Human Body Model  
ESD  
Charged Device Model  
RoHS Compliant  
† Highest
 
passing voltage.  
Revision History  
Date  
Comments  

Updated datasheet with corporate template  

Corrected ordering table on page 1.  
11/13/2015  
Published by  
Infineon Technologies AG  
81726 München, Germany  
©
Infineon Technologies AG 2015  
All Rights Reserved.  
IMPORTANT NOTICE  
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics  
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any  
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and  
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third  
party.  
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this  
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of  
the product of Infineon Technologies in customer’s applications.  
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of  
customer’s technical departments to evaluate the suitability of the product for the intended application and the  
completeness of the product information given in this document with respect to such application.  
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest  
Infineon Technologies office (

).  
WARNINGS  
Due to technical requirements products may contain dangerous substances. For information on the types in question  
please contact your nearest Infineon Technologies office.  
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized  
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a  
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.  
12  
2015-11-13