Infineon-Technologies-AUIRF7484QTR

Part #Infineon-Technologies-AUIRF7484QTR
Download 
Infineon-Technologies-AUIRF7484QTR
AUTOMOTIVE GRADE  
AUIRF7484Q  
HEXFET

®

Power MOSFET  
40V  
Features  
Advanced Planar Technology  
Low On-Resistance  
150°C Operating Temperature  
Fast Switching  
A
V

DSS  

A
1
2
3
4
8
7
S
S
S
G
D
D
R

DS(on)

max.  
I

D  

6
5
D
D
10m
  
Fully Avalanche Rated  
Top View  
14A  
Repetitive Avalanche Allowed up to Tjmax  
Lead-Free, RoHS Compliant  
Automotive Qualified *  
Description  
Specifically designed for Automotive applications, this Stripe  
Planar design of HEXFET® Power MOSFETs utilizes the latest  
processing techniques to achieve low on-resistance per silicon  
area. This benefit combined with the fast switching speed and  
ruggedized device design that HEXFET power MOSFETs are  
well known for, provides the designer with an extremely efficient  
and reliable device for use in Automotive and a wide variety of  
other applications.  
G
D
S
Gate  
Drain  
Source  
Standard Pack  
Form  
Tape and Reel  
Base part number  
Package Type  
Orderable Part Number  
Quantity  
4000  
AUIRF7484Q  
SO-8  
AUIRF7484QTR  
Absolute Maximum Ratings  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
 
These are stress  
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance  
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless  
otherwise specified.  
Symbol  
I

D

@ T

A

= 25°C  
Parameter  
Max.  
14  
Units  
A
Continuous Drain Current  
I

D

@ T

A

= 70°C  
I

DM  

Continuous Drain Current  
11  
110  
2.5  
Pulsed Drain Current
 
P

D

@T

A

= 25°C  
Maximum Power Dissipation
 
  
W
Linear Derating Factor  
0.02  
W/°C  
V
mJ  
A
V

GS  

E

AS  

Gate-to-Source Voltage  
Single Pulse Avalanche Energy (Thermally Limited)
  
± 8.0  
230  
I

AR  

Avalanche Current
  
See Fig.19,20, 16b, 16c  
E

AR  

T

J  

T

STG  

Repetitive Avalanche Energy
  
Operating Junction and  
Storage Temperature Range  
mJ  
-55 to
 
+ 150  
°C  
Thermal Resistance  
Symbol  
Parameter  
Junction-to-Drain Lead  
Typ.  
–––  
–––  
Max.  
20  
Units  
R

JL  

R

JA  

°C/W  
Junction-to-Ambient
  
50  
HEXFET® is a registered trademark of Infineon.  
*
Qualification standards can be found at

1
2015-11-16  

AUIRF7484Q  
Static @ T

J

= 25°C (unless otherwise specified)  
Parameter  
Min. Typ.
 
Max. Units  
40 –––
 
–––  
––– 0.040 ––– V/°C
 
Reference to 25°C, I

D

= 1mA  
Conditions  
V

(BR)DSS  

V

(BR)DSS

/
T

J  

R

DS(on)  

Drain-to-Source Breakdown Voltage  
Breakdown Voltage Temp. Coefficient  
Static Drain-to-Source On-Resistance  
Gate Threshold Voltage  
V
V

GS

= 0V, I

D

= 250µA  
––– –––  
10  
V

GS

= 7.0V, I

D

= 14A
  
m
  
V
S
V

GS(th)  

1.0  
40  
–––  
––– –––  
20  
2.0  
V

DS

= V

GS

, I

D

= 250µA  
gfs  
Forward Trans conductance  
V
V

DS

= 10V, I

D

= 14A  

DS

=40V, V

GS

= 0V  
––– –––  
I

DSS  

I

GSS  

Drain-to-Source Leakage Current  
µA  
nA  
––– ––– 250  
––– ––– 200  
––– –––
 
-200  
V

DS

= 32V,V

GS

= 0V,T

J

=125°C  
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
V

GS

= 8.0V  

GS

= -8.0V  
V
Dynamic Electrical
 
Characteristics @ T

J

= 25°C (unless otherwise specified)  
Q

g  

Total Gate Charge  
Gate-to-Source Charge  
Gate-to-Drain Charge  
Turn-On Delay Time  
Rise Time  
–––  
–––  
–––  
–––  
–––  
69  
9.0  
16  
9.3  
5.0  
100  
–––  
–––  
–––  
–––  
I

D

= 14A  
nC V

DS

= 32V  

GS

= 7.0V  
Q

gs  

Q

gd  

t

d(on)  

t

r  

t

d(off)  

t

f  

V
V

DD

= 20V  
I

D

= 1.0A  
R

G

= 6.2
  
ns  
Turn-Off Delay Time  
Fall Time  
––– 180 –––  
––– 58 –––  
V

GS

= 7.0V
  
C

iss  

C

oss  

C

rss  

Input Capacitance  
Output Capacitance  
Reverse Transfer Capacitance  
––– 3520 –––  
––– 660 –––  
V

GS

= 0V  
pF V

DS

= 25V  
ƒ = 1.0MHz  
–––  
76  
–––  
Diode Characteristics  
Parameter  
Min. Typ.
 
Max. Units  
––– ––– 2.3  
––– ––– 110  
Conditions  
MOSFET symbol  
showing the  
integral reverse  
p-n junction diode.  
T

J

= 25°C,I

S

= 2.3A,V

GS

= 0V
  
Continuous Source Current  
(Body Diode)  
I

S  

A
V
Pulsed Source Current  
(Body Diode)
  
I

SM  

V

SD  

t

rr  

Q

rr  

t

on  

Diode Forward Voltage  
Reverse Recovery Time  
Reverse Recovery Charge  
Forward Turn-On Time  
––– –––  
––– 59  
1.3  
89  
ns T

J

= 25°C ,I

F

= 2.3A,  
––– 110 170  
nC di/dt
 
= 100A/µs
  
Intrinsic turn-on time is negligible (turn-on is dominated by L

S

+L

D

)  
Notes:
 
Repetitive rating;
 
pulse width limited by max. junction temperature.  
Pulse width

400µs; duty cycle
2%.  
Surface mounted on 1″ in square Cu board.  
Starting T

J

= 25°C, L = 2.3mH, R

G

= 25
, I

AS

= 14A. (See Fig. 12)  
Limited by T

Jmax

, see Fig.16b, 16c, 19, 20 for typical repetitive avalanche performance.  
2
2015-11-16  

AUIRF7484Q  
100000  
10000  
1000  
100  
10000  
1000  
100  
10  
VGS  
7.5V  
VGS  
7.5V  
TOP  
TOP  
7.0V  
4.5V  
3.0V  
2.5V  
2.3V  
2.0V  
7.0V  
4.5V  
3.0V  
2.5V  
2.3V  
2.0V  
BOTTOM 1.8V  
BOTTOM 1.8V  
10  
1.8V  
1
1
1.8V  
0.1  
20µs PULSE WIDTH  
Tj = 25°C  
20µs PULSE WIDTH  
Tj = 150°C  
0.01  
0.1  
0.1  
1
10  
100  
0.1  
1
10  
100  
V
, Drain-to-Source Voltage (V)  
V
, Drain-to-Source Voltage (V)  
DS  
DS  
Fig. 2
Typical Output Characteristics  
Fig. 1
Typical Output Characteristics  
2
.
0  
14A  
=
I
D
1000.00  
100.00  
10.00  
1.00  
1
.
5  
1
.
0  
0
.
5  
0
.
0  
T
= 150°C  
J
T
= 25°C  
V
J
= 15V  
DS  
V
= 10V  
140  
GS  
120  
20µs PULSE WIDTH  
-60  
-40  
-20  
0
20  
40  
60  
80  
100  
160  
0.10  
°
(
C
)  
T ,
 
J
unction Te
m
p
erature  
1.0  
2.0  
3.0 4.0  
J
V
, Gate-to-Source Voltage (V)  
GS  
Fig. 4
Normalized On-Resistance  
Fig. 3
Typical Transfer Characteristics  
vs. Temperature  
3
2015-11-16  

AUIRF7484Q  
8
7
6
5
4
3
2
1
0
D
I
=
14A  
100000  
10000  
1000  
100  
V
V
V
=
32V  
20V  
8V  
V
C
= 0V,  
f = 1 MHZ  
DS  
DS  
DS  
GS  
=
=
= C
 
+ C  
,
C
SHORTED  
iss  
gs  
gd  
ds  
C
= C  
rss  
gd  
C
= C
 
+ C  
oss  
ds  
gd  
Ciss  
Coss  
Crss  
10  
0
10  
20  
30  
40  
50  
60  
70  
80  
1
10  
100  
Q ,
 
T
otal Gate Charge (nC)  
G
V
, Drain-to-Source Voltage (V)  
DS  
Fig 5.
 
Typical Capacitance vs.  
Fig 6.
 
Typical Gate Charge vs.  
Drain-to-Source Voltage  
Gate-to-Source Voltage  
1000  
100  
10  
1000  
OPERATION IN THIS AREA  
LIMITED BY R
 
(on)  
DS  
100  
10  
T
= 150°C  
J
100µsec  
1msec  
T
= 25°C  
J
10msec  
1
1
Tc = 25°C  
Tj = 150°C  
Single Pulse  
V
GS  
= 0V  
0.1  
0.10  
0
1
10  
100  
1000  
0.2  
0.4  
V
0.6  
0.8  
1.0  
1.2  
1.4  
V
, Drain-toSource Voltage (V)  
DS  
, Source-to-Drain Voltage (V)  
SD  
Fig. 7
Typical Source-to-Drain Diode  
Fig 8.
 
Maximum Safe Operating Area  
2015-11-16  
Forward Voltage  
4

AUIRF7484Q  
15  
12  
9
6
Fig 10a.
 
Switching Time Test Circuit  
3
0
25  
50  
75  
100  
125  
150  
°
(
C
)  
T ,
 
C
a
s
e
T
e
m
p
erature  
C
Fig 9.
 
Maximum Drain Current vs. Case Temperature  
Fig 10b.
 
Switching Time Waveforms  
100  
D =
0
.
50  
0.20  
10  
0.10  
0.05  
P
DM  
0.02  
1
t
1
0.01  
t
2
SINGLE PULSE  
(THERMA
L
R
ESPONSE)  
Notes:  
1. Dut
y
f
actor
D
=  
t /
 
t  
1
2
2. Pea
k
T  
= P  
x Z  
+ T  
J
DM  
thJA  
A
0.1  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
t ,
 
Rectangular Pulse Duration (sec)  
1
Fig 11.
 
Maximum Effective Transient Thermal Impedance, Junction-to-Ambient  
5
2015-11-16  

AUIRF7484Q  
9.40  
9.30  
9.20  
9.10  
9.00  
8.90  
8.80  
8.70  
8.60  
16.0  
15.0  
14.0  
13.0  
12.0  
11.0  
10.0  
9.0  
I
= 14A  
V
= 7.0V  
D
GS  
8.0  
2.0  
3.0  
4.0  
5.0  
6.0  
7.0  
8.0  
0
20  
40  
I ,
 
Drain Current (A)  
D
60  
80  
100  
120  
V
Gate -to -Source Voltage
 
(V)  
GS,  
Fig 12.
 
Typical On-Resistance Vs.  
Fig 13.
 
Typical On-Resistance Vs.  
Gate Voltage  
Drain Current  
50  
40  
30  
20  
10  
0
1.8  
1.7  
1.6  
1.5  
1.4  
1.3  
1.2  
1.1  
1.0  
0.9  
0.8  
I
= 250µA  
D
1.00  
10.00  
100.00  
1000.00  
-75 -50 -25  
0
25  
50  
75 100
 
125 150  
Time (sec)  
T
, Temperature ( °C )  
J
Fig. 14.
Typical Threshold Voltage Vs. Junction  
Fig 15.
 
Typical Power Vs. Time  
Temperature  
6
2015-11-16  

AUIRF7484Q  
15V  
520  
416  
312  
208  
104  
0
I
D
TOP  
6.3A  
11A  
14A  
DRIVER  
L
V
DS  
BOTTOM  
D.U.T  
AS  
R
G
+
–
V
DD  
I
A
20V  
0.01  
t
p
Fig 16b.
 
Unclamped Inductive Test Circuit  
V
(BR)DSS  
t
p
25  
50  
75  
100  
125  
150  
°
(
Starting Tj, Junction Temperature  
C)  
Fig 16a.
Maximum Avalanche Energy  
I
vs. Drain Current  
AS  
Fig 16c.
 
Unclamped Inductive Waveforms  
Id  
Vds  
Vgs  
Vgs(th)  
Qgs1  
Qgs2  
Qgd  
Qgodr  
Fig 17.
 
Gate Charge Test Circuit  
Fig 18.
 
Basic Gate Charge Waveform  
7
2015-11-16  

AUIRF7484Q  
100  
10  
Duty Cycle = Single Pulse  
Allowed avalanche Current vs  
avalanche pulsewidth, tav  
assuming Tj
 
= 25°C due to  
avalanche losses  
0.01  
1
0.05  
0.10  
0.1  
0.01  
1.0E-06  
1.0E-05  
1.0E-04  
1.0E-03  
1.0E-02  
1.0E-01  
1.0E+00  
1.0E+01  
1.0E+02  
1.0E+03  
tav (sec)  
Fig 19.
 
Typical Avalanche Current vs. Pulse width  
250  
225  
200  
175  
150  
125  
100  
75  
TOP  
Single Pulse  
Notes on Repetitive Avalanche Curves , Figures 19, 20:  
(For further info, see AN-1005 at www.infineon.com)  
BOTTOM 10%
 
Duty Cycle  
I
= 14A  
D
1. Avalanche
 
failures assumption:  
Purely a thermal phenomenon and failure occurs at a temperature far in  
excess of T
jmax
. This is validated for every part type.  
2. Safe
 
operation in Avalanche is allowed as long as T
jmax
is not exceeded.  
3. Equation
 
below based on circuit and waveforms shown in Figures 16b, 16c.  
4. P
D (ave)
= Average power dissipation per single avalanche pulse.  
5. BV
 
= Rated breakdown voltage (1.3 factor accounts for voltage increase  
during avalanche).  
6. I
av
= Allowable avalanche current.  
50  
7.
T
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as  
25°C in Figure 11, 16).  
25  
t
av =
Average time in avalanche.  
D = Duty cycle in avalanche =
 
t
av
·f  
0
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 11)  
25  
50  
75  
100  
125  
150  
Starting T
 
, Junction Temperature (°C)  
J
P

D (ave)

= 1/2 ( 1.3·BV·I

av

) =
T/ Z

thJC  

I

av

= 2
T/ [1.3·BV·Z

th

]  
E

AS (AR)

= P

D (ave)

·t

av  

Fig 20.
 
Maximum Avalanche Energy  
vs. Temperature  
8
2015-11-16  

AUIRF7484Q  
SO-8 Package Outline
(Dimensions are shown in millimeters (inches)  
I
N
CHES  
M
I
LLI
M
E
TERS  
D
I
M  
A
D
B
M
I
N  
MAX  
.0688  
.0098  
.020  
M
I
N  
1.35  
0.10  
0.33  
0.19  
4.80  
3.80  
MAX  
1.75  
0.25  
0.51  
0.25  
5.00  
4.00  
5
.0532  
A
E
A1 .0040  
b
c
.013  
8
1
7
2
6
3
5
4
.0075  
.189  
.0098  
.1968  
.1574  
6
H
D
E
0.25 [.010]  
A
.1497  
e
.050 BASIC  
.025 BASIC  
1.27 BASIC  
e 1  
H
K
0.635 BASIC  
.2284  
.0099  
.016  
0°  
.2440  
5.80  
0.25  
0.40  
0°  
6.20  
0.50  
1.27  
8°  
.0196  
.050  
8°  
e
6X  
L
y
e1  
K x 45°  
A
C
y
0.10 [.004]  
8X c  
A1  
B
8X L  
8X b  
0.25 [.010]  
7
C
A
F
O
O
T
P
R
0
I N  
. 7  
T
N
1
2
3
4
5
O
T
D
C
D
O
E
S
:
.
.
.
.
I M  
O
E
N
S
I O  
N
L
I N  
I N  
G
&
T
O
E
L
E
R
A
N
C
I N  
G
P
E
R
A
S
M
E
Y
1
4
. 5  
H
M
– 1  
] .  
9
9
4
.
8
X
2
[
. 0  
2
8 ]  
N
T
R
O
L
G
D
I M  
N
S
I O  
N
:
M
I L  
L
I M  
E T E R  
I M  
U
E
N
S
I O  
N
S
A
R
E
S
H
O
W
N
I N  
M
E
I L  
L
I M  
U
E
T
E
R
S
[
I N  
C
E S  
T
L
I N  
E
C
O
N
F
O
R
M
S
T
O
J
E
D
C
O
T
L
I N  
E
M
S
– 0  
1
2
A
A
.
D
M
I M  
O
E
N
D
S
P
I O  
R
N
O
D
O
U
E
S
N
N
O
S
T
N
I N  
O
C
L
T
U
O
D
E
E
X
M
C
O
E
L
D
P
R
. 1  
O
5
T
[ . 0  
R
U
0
S
]
I O  
N
S
S
.
.
L
T
T
R
S
I O  
T
E
D
0
6
.
.
6
. 4  
6
[
. 2
 
5 5 ]  
6
7
D
M
I M  
O
E
N
D
S
P
I O  
R
N
O
D
R
O
U
E
S
N
N
O
S
T
N
I N  
O
C
L
T
U
O
D
E
E
X
M
C
O
E
L
D
P
R
. 2  
O
5
T
R
U
S
]
I O  
N
L
S
I O  
T
E
D
0
[ . 0
 
1 0  
D
A
I M  
S
E
N
B
S
S
I O  
N
A
I S  
E
T
H
E
L
E
N
G
T
H
O
F
L
E
A
D
F
O
R
S
O
L
D
E
R
I N  
G
T
O
U
T
R
T
.
3
X
1
. 2  
7
[
. 0  
5
0 ]  
8
X
1 .
 
7 8
 
[ . 0
 
7 0 ]  
SO-8 Part Marking Information  
Note: For the most current drawing please refer to IR website at

9
2015-11-16  

AUIRF7484Q  
SO-8 Tape and Reel
 
(
Dimensions are shown in millimeters (inches)  
TERMINAL NUMBER 1  
12.3 ( .484 )  
11.7 ( .461 )  
8.1 ( .318 )  
7.9 ( .312 )  
FEED DIRECTION  
NOTES:  
1. CONTROLLING
 
DIMENSION : MILLIMETER.  
2. ALL
 
DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES).  
3. OUTLINE
 
CONFORMS TO EIA-481 & EIA-541.  
330.00  
(12.992)  
MAX.  
14.40 ( .566 )  
12.40 ( .488 )  
NOTES :  
1. CONTROLLING DIMENSION : MILLIMETER.  
2. OUTLINE CONFORMS TO EIA-481 & EIA-541.  
Note: For the most current drawing please refer to IR website at

10  
2015-11-16  

AUIRF7484Q  
Qualification Information  
Qualification Level  
Automotive  
(per AEC-Q101)  
Comments: This part number(s) passed Automotive qualification. Infineon’s  
Industrial and Consumer qualification level is granted by extension of the higher  
Automotive level.  
SO-8  
MSL1  
Class M3 (+/- 300V)

†  

AEC-Q101-002  
Moisture Sensitivity Level  
Machine Model  
Class H1C (+/- 2000V)

†  

AEC-Q101-001  
Human Body Model  
ESD  
Class C5 (+/- 2000V)

†  

AEC-Q101-005  
Charged Device Model  
Yes  
RoHS Compliant  
† Highest
 
passing voltage.  
Revision History  
Date  
Comments  

Updated datasheet with corporate template  

Corrected ordering table on page 1.  
11/16/2015  
Published by  
Infineon Technologies AG  
81726 München, Germany  
©
Infineon Technologies AG 2015  
All Rights Reserved.  
IMPORTANT NOTICE  
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics  
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any  
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and  
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third  
party.  
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this  
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of  
the product of Infineon Technologies in customer’s applications.  
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of  
customer’s technical departments to evaluate the suitability of the product for the intended application and the  
completeness of the product information given in this document with respect to such application.  
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest  
Infineon Technologies office (

).  
WARNINGS  
Due to technical requirements products may contain dangerous substances. For information on the types in question  
please contact your nearest Infineon Technologies office.  
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized  
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a  
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.  
11  
2015-11-16