Infineon-Technologies-AUIRFR3504Z

Part #Infineon-Technologies-AUIRFR3504Z
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Infineon-Technologies-AUIRFR3504Z
AUTOMOTIVE GRADE  
AUIRFR3504Z  
Features  
HEXFET

®

Power MOSFET  
Advanced Process Technology  
Low On-Resistance  
175°C Operating Temperature  
Fast Switching  
Repetitive Avalanche Allowed up to Tjmax  
Lead-Free, RoHS Compliant  
Automotive Qualified *  
V

DSS  

40V  
R

DS(on)  

max.  
9.0m
  
77A  
I

D (Silicon Limited)  

I

D (Package Limited)  

42A  
D
Description  
Specifically designed for Automotive applications, this HEXFET®  
Power MOSFET utilizes the latest processing techniques to  
achieve extremely low on-resistance per silicon area.
 
Additional  
features of this design
 
are a 175°C junction operating temperature,  
fast switching speed and improved repetitive avalanche rating .  
These features combine to make this design an extremely efficient  
and reliable device for use in Automotive applications and a wide  
variety of other applications.  
S
G
G
D
S
Gate  
Drain  
Source  
Standard Pack  
Form  
Tube  
Base part number  
Package Type  
Orderable Part Number  
Quantity  
75  
3000  
AUIRFR3504Z  
AUIRFR3504ZTRL  
AUIRFR3504Z  
D-Pak  
Tape and Reel Left  
Absolute Maximum Ratings  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
 
These are stress  
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance  
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless  
otherwise specified.  
Symbol  
Parameter  
Max.  
Units  
I

D

@ T

C

= 25°C  
Continuous Drain Current, V

GS

@ 10V (Silicon Limited)  
77  
I

D

@ T

C

= 100°C  
I

D

@ T

C

= 25°C  
I

DM  

Continuous Drain Current, V

GS

@ 10V (Silicon Limited)  
Continuous Drain Current, V

GS

@ 10V (Package Limited)  
Pulsed Drain Current
 
54  
42  
A
310  
90  
P

D

@T

C

= 25°C  
Maximum Power Dissipation  
W
W/°C  
V
Linear Derating Factor  
0.60  
V

GS  

E

AS  

Gate-to-Source Voltage  
Single Pulse Avalanche Energy (Thermally Limited)
  
± 20  
77  
mJ  
E

AS

(Tested)  
Single Pulse Avalanche Energy Tested Value
  
Avalanche Current
  
110  
I

AR  

See Fig.15,16, 12a, 12b  
A
E

AR  

T

J  

Repetitive Avalanche Energy
  
mJ  
Operating Junction and  
Storage Temperature Range  
Soldering Temperature, for 10 seconds (1.6mm from case)  
-55 to
 
+ 175  
300  
T

STG  

°C  
Thermal Resistance  
Symbol  
Parameter  
Junction-to-Case
  
Typ.  
–––  
–––  
–––  
Max.  
1.66  
50  
Units  
R

JC  

R

JA  

R

JA  

Junction-to-Ambient ( PCB Mount)
  
Junction-to-Ambient  
°C/W  
110  
HEXFET® is a registered trademark of Infineon.  
*
Qualification standards can be found at

1
2015-11-23  

AUIRFR3504Z  
Static @ T

J

= 25°C (unless otherwise specified)  
Parameter  
Min. Typ.
 
Max. Units  
40 –––
 
–––  
––– 0.032 ––– V/°C
 
Reference to 25°C, I

D

= 1mA  
Conditions  
V

(BR)DSS  

V

(BR)DSS

/
T

J  

R

DS(on)  

Drain-to-Source Breakdown Voltage  
Breakdown Voltage Temp. Coefficient  
Static Drain-to-Source On-Resistance  
Gate Threshold Voltage  
V
V

GS

= 0V, I

D

= 250µA  
––– 8.23 9.0  
V

GS

= 10V, I

D

= 42A
  
m
  
V
S
V

GS(th)  

2.0  
32  
–––  
––– –––  
20  
4.0  
V

DS

= V

GS

, I

D

= 250µA  
gfs  
Forward Trans conductance  
V

DS

= 10V, I

D

= 42A
  
––– –––  
V

DS

= 40V, V

GS

= 0V  
I

DSS  

I

GSS  

Drain-to-Source Leakage Current  
µA  
nA  
––– ––– 250  
––– ––– 200  
––– –––
 
-200  
V

DS

= 40V,V

GS

= 0V,T

J

=125°C  
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
V

GS

= 20V  

GS

= -20V  
V
Dynamic Electrical
 
Characteristics @ T

J

= 25°C (unless otherwise specified)  
Q

g  

Q

gs  

Q

gd  

t

d(on)  

t

r  

Total Gate Charge  
Gate-to-Source Charge  
Gate-to-Drain Charge  
Turn-On Delay Time  
Rise Time  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
30  
9.6  
12  
15  
74  
30  
38  
45  
I

D

= 42A  
nC V

DS

= 32V  

GS

= 10V
  
–––  
–––  
–––  
–––  
–––  
–––  
V
V

DD

= 20V  
I

D

= 42A  
R

G

= 15
  
ns  
t

d(off)  

t

f  

Turn-Off Delay Time  
Fall Time  
V

GS

= 10V
  
Between lead,  
6mm (0.25in.)  
from package  
and center of die contact  
L

D  

L

S  

Internal Drain Inductance  
Internal Source Inductance  
–––  
–––  
4.5  
7.5  
–––  
–––  
nH  
C

iss  

C

oss  

C

rss  

C

oss  

C

oss  

C

oss eff.  

Input Capacitance  
Output Capacitance  
Reverse Transfer Capacitance  
Output Capacitance  
Output Capacitance  
––– 1510 –––  
––– 340 –––  
––– 190 –––  
––– 1100 –––  
––– 340 –––  
––– 460 –––  
V

GS

= 0V  
V

DS

= 25V  
ƒ = 1.0MHz, See Fig.5  
V

GS

= 0V, V

DS

= 1.0V ƒ = 1.0MHz  
V

GS

= 0V, V

DS

= 32V ƒ = 1.0MHz  
V

GS

= 0V, V

DS

= 0V to 32V  
pF  
Effective Output Capacitance  
Diode Characteristics  
Parameter  
Continuous Source Current  
(Body Diode)  
Pulsed Source Current  
(Body Diode)
  
Diode Forward Voltage  
Reverse Recovery Time  
Reverse Recovery Charge  
Forward Turn-On Time  
Min. Typ.
 
Max. Units  
––– –––
 
42  
Conditions  
MOSFET symbol  
showing the  
integral reverse  
p-n junction diode.  
T

J

= 25°C,I

S

= 42A, V

GS

= 0V
  
I

S  

A
I

SM  

––– ––– 310  
V

SD  

t

rr  

Q

rr  

t

on  

––– –––  
1.3  
27  
14  
V
–––  
–––  
18  
9.2  
ns T

J

= 25°C ,I

F

= 42A, V

DD

= 20V  
nC di/dt
 
= 100A/µs
  
Intrinsic turn-on time is negligible (turn-on is dominated by L

S

+L

D

)  
Notes:
 
Repetitive rating;
 
pulse width limited by max. junction temperature. (See fig. 11)  
Limited by T

Jmax ,

starting T

J

= 25°C, L = 0.09mH, R

G

= 25
, I

AS

= 42A, V

GS

=10V. Part not recommended for use above this value.  
Pulse width

1.0ms; duty cycle
2%.  
C

oss

eff. is a fixed capacitance that gives the same charging time as C

oss

while V

DS

is rising from 0 to 80% V

DSS  

Limited by T

Jmax

, see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance.  
This value determined from sample failure population, starting
 
T

J

= 25°C, L = 0.09mH, R

G

= 25
, I

AS

= 42A, V

GS

=10V.  
When mounted on 1″ square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to  
application note #AN-994  
R

is measured at T

J

approximately 90°C.  
2
2015-11-23  

AUIRFR3504Z  
1000  
100  
10  
1000  
100  
10  
VGS  
15V  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
4.5V  
VGS  
15V  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
4.5V  
TOP  
TOP  
BOTTOM  
BOTTOM  
4.5V  
1
4.5V  
30µs PULSE WIDTH  
Tj = 175°C  
30µs PULSE WIDTH  
Tj = 25°C  
1
0.1  
0.1  
1
10  
100  
0.1  
1
10  
100  
V
, Drain-to-Source Voltage (V)  
V
, Drain-to-Source Voltage (V)  
DS  
DS  
Fig. 2
Typical Output Characteristics  
Fig. 1
Typical Output Characteristics  
60  
50  
40  
30  
20  
10  
0
1000.0  
100.0  
10.0  
1.0  
T
= 175°C  
= 25°C  
J
T
= 175°C  
T
J
J
T
= 25°C  
J
V
= 10V  
DS  
380µs PULSE WIDTH  
V
= 20V  
DS  
30µs PULSE WIDTH  
0.1  
0
10  
D,  
20  
30  
40  
50  
4.0  
5.0  
6.0  
7.0  
8.0  
9.0  
10.0  
I
Drain-to-Source Current (A)  
V
, Gate-to-Source Voltage (V)  
GS  
Fig. 4
Typical Forward Trans conductance  
Fig. 3
Typical Transfer Characteristics  
Vs. Drain Current  
3
2015-11-23  

AUIRFR3504Z  
20  
16  
12  
8
2500  
2000  
1500  
1000  
500  
I =
 
42A  
V
= 0V,  
f = 1 MHZ  
GS  
D
C
C
C
= C
 
+ C
 
, C  
SHORTED  
ds  
iss  
gs  
gd  
V
= 32V  
DS  
= C  
rss  
oss  
gd  
VDS= 20V  
VDS= 8.0V  
= C
 
+ C  
ds  
gd  
Ciss  
Coss  
Crss  
4
FOR TEST CIRCUIT  
SEE FIGURE 13  
0
0
0
10  
20  
30  
40  
50  
1
10  
, Drain-to-Source Voltage (V)  
100  
Q
Total Gate Charge (nC)  
G
V
DS  
Fig 5.
 
Typical Capacitance vs.  
Fig 6.
 
Typical Gate Charge vs.  
Drain-to-Source Voltage  
Gate-to-Source Voltage  
1000.0  
100.0  
10.0  
1.0  
1000  
100  
10  
OPERATION IN THIS AREA  
LIMITED BY R  
(on)  
DS  
T
= 175°C  
J
100µsec  
T
= 25°C  
J
1msec  
1
10msec  
Tc = 25°C  
Tj = 175°C  
Single Pulse  
V
= 0V  
GS  
0.1  
0.1  
0
1
10  
100  
1000  
0.2  
0.6  
1.0  
1.4  
1.8  
2.2  
V
, Source-toDrain Voltage (V)  
V
, Drain-toSource Voltage (V)  
SD  
DS  
Fig. 7
Typical Source-to-Drain Diode  
Fig 8.
 
Maximum Safe Operating Area  
2015-11-23  
Forward Voltage  
4

AUIRFR3504Z  
2.0  
1.5  
1.0  
0.5  
80  
60  
40  
20  
0
I
= 42A  
LIMITED BY PACKAGE  
D
V
= 10V  
GS  
-60 -40 -20  
T
0
20 40 60 80
 
100 120 140 160 180  
25  
50  
75  
100  
125  
150  
175  
T
, Case Temperature (°C)  
, Junction Temperature (°C)  
C
J
Fig 9.
 
Maximum Drain Current Vs.  
Fig 10.
 
Normalized On-Resistance  
Case Temperature  
Vs. Temperature  
10  
1
D = 0.50  
0.20  
0.10  
R

1  

R

1  

R

2  

R

2  

Ri (°C/W)  
1.117  
i (sec)
  
0.000536  
0.004428  

J

J  

C

C  

0.1  

1

1  

0.05  

2

2  

0.02  
0.01  
Ci=
i
Ri  
Ci=
i
Ri  
0.5422  
0.01  
Notes:  
SINGLE PULSE  
1. Duty Factor D = t1/t2  
2. Peak Tj = P dm x Zthjc + Tc  
( THERMAL RESPONSE )  
0.001  
1E-006  
1E-005  
0.0001  
0.001  
0.01  
0.1  
t
, Rectangular Pulse Duration (sec)  
1
Fig 11.
 
Maximum Effective Transient Thermal Impedance, Junction-to-Case  
5
2015-11-23  

AUIRFR3504Z  
15V  
320  
280  
240  
200  
160  
120  
80  
DRIVER  
+
L
I
V
D
DS  
TOP  
5.0A  
6.4A  
42A  
BOTTOM  
D.U.T  
AS  
R
G
V
DD  
–
I
A
20V  
0.01  
t
p
Fig 12a.
 
Unclamped Inductive Test Circuit  
V
(BR)DSS  
40  
t
p
0
25  
50  
75  
100  
125  
150  
175  
Starting T
 
, Junction Temperature (°C)  
J
Fig 12c.
Maximum Avalanche Energy  
vs. Drain Current  
I
AS  
Fig 12b.
 
Unclamped Inductive Waveforms  
4.5  
4.0  
Id  
Vds  
Vgs  
3.5  
3.0  
2.5  
2.0  
I
= 250µA  
D
Vgs(th)  
Qgs1  
Qgs2  
Qgd  
Qgodr  
Fig 13a.
 
Gate Charge Waveform  
-75 -50 -25  
0
25 50 75
 
100 125 150 175  
, Temperature ( °C )  
T
J
Fig 14.
 
Threshold Voltage Vs. Temperature  
Fig 13b.
 
Gate Charge Test Circuit  
6
2015-11-23  

AUIRFR3504Z  
1000  
100  
10  
Duty Cycle = Single Pulse  
Allowed avalanche Current vs  
avalanche pulsewidth, tav  
assuming
Tj = 25°C due to  
avalanche losses. Note: In no  
case should Tj be allowed to  
exceed Tjmax  
0.01  
0.05  
0.10  
1
0.1  
1.0E-06  
1.0E-05  
1.0E-04  
1.0E-03  
1.0E-02  
1.0E-01  
tav (sec)  
Fig 15.
 
Typical Avalanche Current Vs. Pulse width  
Notes on Repetitive Avalanche Curves , Figures 15, 16:  
80  
60  
40  
20  
0
TOP  
BOTTOM 1%
 
Duty Cycle  
= 42A  
Single Pulse  
(For further info, see AN-1005 at www.infineon.com)  
1. Avalanche
 
failures assumption:  
I
D
Purely a thermal phenomenon and failure occurs at a temperature far in  
excess of T
jmax
. This is validated for every part type.  
2. Safe
 
operation in Avalanche is allowed as long as T
jmax
is not exceeded.  
3. Equation
 
below based on circuit and waveforms shown in Figures 12a, 12b.  
4. P
D (ave)
= Average power dissipation per single avalanche pulse.  
5. BV
 
= Rated breakdown voltage (1.3 factor accounts for voltage increase  
during avalanche).  
6. I
av
= Allowable avalanche current.  
7.
T
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as  
25°C in Figure 15, 16).  
t
av =
Average time in avalanche.  
D = Duty cycle in avalanche =
 
t
av
·f  
25  
50  
75  
100  
125  
150  
175  
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)  
Starting T
 
, Junction Temperature (°C)  
J
P

D (ave)

= 1/2 ( 1.3·BV·I

av

) =
T/ Z

thJC  

I

av

= 2
T/ [1.3·BV·Z

th

]  
E

AS (AR)

= P

D (ave)

·t

av  

Fig 16.
 
Maximum Avalanche Energy  
Vs. Temperature  
7
2015-11-23  

AUIRFR3504Z  
Fig 17.
Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs  
Fig 18b.
 
Switching Time Waveforms  
Fig 18a.
 
Switching Time Test Circuit  
8
2015-11-23  

AUIRFR3504Z  
D-Pak (TO-252AA) Package Outline
(Dimensions are shown in millimeters (inches))  
D-Pak (TO-252AA) Part Marking Information  
Part Number  
AUFR3504Z  
Date Code  
Y= Year  
WW= Work Week  
IR Logo  
Lot Code  
Note: For the most current drawing please refer to IR website at

9
2015-11-23  

AUIRFR3504Z  
D-Pak (TO-252AA) Tape & Reel Information
(Dimensions are shown in millimeters (inches))  
TR  
TRL  
TRR  
16.3 ( .641 )  
15.7 ( .619 )  
16.3 ( .641 )  
15.7 ( .619 )  
12.1 ( .476 )  
11.9 ( .469 )  
8.1 ( .318 )  
7.9 ( .312 )  
FEED DIRECTION  
FEED DIRECTION  
NOTES :  
1. CONTROLLING
 
DIMENSION : MILLIMETER.  
2. ALL
 
DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).  
3. OUTLINE
 
CONFORMS TO EIA-481 & EIA-541.  
13 INCH  
16 mm  
NOTES :  
1. OUTLINE CONFORMS TO EIA-481.  
Note: For the most current drawing please refer to IR website at

10  
2015-11-23  

AUIRFR3504Z  
Qualification Information  
Qualification Level  
Automotive  
(per AEC-Q101)  
Comments: This part number(s) passed Automotive qualification. Infineon’s  
Industrial and Consumer qualification level is granted by extension of the higher  
Automotive level.  
D-Pak  
MSL1  
Class M4

†  

Moisture Sensitivity Level  
Machine Model  
AEC-Q101-002  
Class H1C

†  

AEC-Q101-001  
Class C5

†  

Human Body Model  
ESD  
Charged Device Model  
AEC-Q101-005  
Yes  
RoHS Compliant  
† Highest
 
passing voltage.  
Revision History  
Date  
Comments  

Updated datasheet with corporate template  

Corrected ordering table on page 1.  
11/23/2015  
Published by  
Infineon Technologies AG  
81726 München, Germany  
©
Infineon Technologies AG 2015  
All Rights Reserved.  
IMPORTANT NOTICE  
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics  
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any  
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and  
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third  
party.  
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this  
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of  
the product of Infineon Technologies in customer’s applications.  
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of  
customer’s technical departments to evaluate the suitability of the product for the intended application and the  
completeness of the product information given in this document with respect to such application.  
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest  
Infineon Technologies office (

).  
WARNINGS  
Due to technical requirements products may contain dangerous substances. For information on the types in question  
please contact your nearest Infineon Technologies office.  
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized  
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a  
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.  
11  
2015-11-23