Infineon-Technologies-AUIRFR8405
| Part # | Infineon-Technologies-AUIRFR8405 |
Download  | Infineon-Technologies-AUIRFR8405 |
AUIRFR8405
AUIRFU8405
AUTOMOTIVE GRADE
Features
V
DSS
R
DS(on)
40V
Advanced Process Technology
typ.
max.
1.65m
1.98m
211A
100A
New Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
I
D (Silicon Limited)
I
D (Package Limited)
D
D
Description
Specifically designed for Automotive applications, this HEXFET® Power MOSFET
utilizes the latest processing techniques to achieve extremely low on-resistance per
silicon area. Additional features of this design are a 175°C junction operating
temperature, fast switching speed and improved repetitive avalanche rating. These
features combine to make this design an extremely efficient and reliable device for
use in Automotive applications and wide variety of other applications.
S
S
D
G
G
Applications
Electric Power Steering (EPS)
Battery Switch
Start/Stop Micro Hybrid
Heavy Loads
G
D
S
Gate
Drain
Source
DC-DC Converter
Standard Pack
Form
Tube
Tube
Base part number
AUIRFU8405
Package Type
Orderable Part Number
Quantity
I-Pak
75
75
3000
AUIRFU8405
AUIRFR8405
AUIRFR8405TRL
AUIRFR8405
D-Pak
Tape and Reel Left
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
These are stress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and
power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless
otherwise specified.
Symbol
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
Parameter
Max.
211
150
Units
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
A
I
D
@ T
C
= 25°C
Continuous Drain Current, V
GS
@ 10V (Package Limited)
100
I
DM
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
804
163
P
D
@T
C
= 25°C
W
W/°C
V
1.1
V
GS
± 20
T
J
Operating Junction and
-55 to
+ 175
T
STG
Storage Temperature Range
°C
Soldering Temperature, for 10 seconds (1.6mm from case)
300
Avalanche Characteristics
E
AS
Single Pulse Avalanche Energy (Thermally Limited)
208
256
mJ
E
I
AR
E
AR
AS
(tested)
Single Pulse Avalanche Energy (Tested Limited)
Avalanche Current
See Fig. 14, 15, 24a, 24b
A
Repetitive Avalanche Energy
mJ
Thermal Resistance
Symbol
Parameter
Junction-to-Case
Typ.
–––
–––
–––
Max.
0.92
50
Units
R
JC
R
JA
R
JA
Junction-to-Ambient ( PCB Mount)
Junction-to-Ambient
°C/W
110
HEXFET® is a registered trademark of Infineon.
1
2017-10-04
AUIRFR/U8405
Static @ T
J
= 25°C (unless otherwise specified)
Parameter
Min. Typ.
Max. Units
40 –––
–––
––– 0.03 ––– V/°C
Reference to 25°C, I
D
= 5mA
Conditions
V
(BR)DSS
V
(BR)DSS
/
T
J
R
DS(on)
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
V
V
GS
= 0V, I
D
= 250µA
––– 1.65
1.98
V
GS
= 10V, I
D
= 90A**
m
V
GS(th)
2.2
––– –––
––– ––– 150
––– ––– 100
––– –––
-100
3.0
3.9
1.0
V
V
DS
= V
GS
, I
D
= 100µA
DS
= 40V, V
GS
= 0V
V
DS
= 40V,V
GS
= 0V,T
J
=125°C
V
I
DSS
Drain-to-Source Leakage Current
µA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
V
GS
= 20V
GS
= -20V
I
GSS
R
G
nA
V
–––
2.3
–––
Dynamic Electrical
Characteristics @ T
J
= 25°C (unless otherwise specified)
gfs
Q
g
Forward Trans conductance
Total Gate Charge
294 ––– –––
––– 103 155
S
V
DS
= 10V, I
D
= 90A**
I
D
= 90A**
Q
gs
Q
gd
Q
sync
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
Gate-to-Source Charge
Gate-to-Drain Charge
Total Gate Charge Sync. (Q
g
– Q
gd
)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
–––
–––
–––
–––
–––
–––
–––
26
38
65
12
80
51
51
–––
–––
–––
–––
–––
–––
–––
V
DS
= 20V
nC
V
GS
= 10V
V
DD
= 26V
I
D
= 90A**
R
G
= 2.7
ns
V
GS
= 10V
V
GS
= 0V
V
DS
= 25V
––– 5171 –––
––– 770 –––
––– 523 –––
––– 939 –––
––– 1054 –––
Output Capacitance
Reverse Transfer Capacitance
pF
ƒ = 1.0MHz, See Fig. 5
V
GS
= 0V, V
DS
= 0V to 32V
V
GS
= 0V, V
DS
= 0V to 32V
C
oss eff.
(ER) Effective
Output Capacitance (Energy Related)
C
oss eff.
(TR) Effective
Output Capacitance
(Time Related)
Diode Characteristics
Parameter
Min. Typ.
Max. Units
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
Continuous Source Current
(Body Diode)
I
S
––– –––
211
A
––– –––
804
Pulsed Source Current
(Body Diode)
I
SM
V
SD
dv/dt
t
rr
Diode Forward Voltage
Peak Diode Recovery dv/dt
Reverse Recovery Time
–––
–––
–––
–––
–––
–––
–––
0.9
2.1
28
29
19
1.3
–––
–––
–––
–––
–––
–––
V
T
J
= 25°C,I
S
= 90A** ,V
GS
= 0V
T
J
= 175°C,I
S
= 90A** ,V
DS
= 40V
V/ns
T
J
= 25°C
V
R
= 34V,
ns
T
J
= 125°C
I
F
= 90A**
Q
rr
Reverse Recovery Charge
Reverse Recovery Current
T
J
= 25°C
di/dt = 100A/µs
nC
A
20
1.1
T
J
= 125°C
I
RRM
T
J
= 25°C
Notes:
Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 100A by source
bonding technology. Note that
current limitations arising from heating of the device leads may occur with some lead mounting
arrangements. (Refer to AN-1140)
Repetitive rating;
pulse width limited by max. junction temperature. (See fig. 11)
Limited by T
Jmax ,
starting T
J
= 25°C, L = 0.051mH, R
G
= 50
, I
AS
= 90A, V
GS
=10V. Part not recommended for use above this value.
I
SD
90A, di/dt
1304A/µs, V
DD
V
(BR)DSS
, T
J
175°C.
Pulse width
400
µ
s; duty cycle
2%.
C
oss eff
. (TR) is a fixed capacitance that gives the same charging time as C
oss
while V
DS
is rising from 0 to 80% V
DSS
C
oss eff
. (ER) is a fixed capacitance that gives the same energy as
C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
.
When mounted on 1″ square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to
application note #AN-994
R
is measured at T
J
approximately 90°C
.
Pulse drain current is limited by source bonding technology.
**
All AC and DC test condition based on old Package limitation current = 90A.
2
2017-10-04
AUIRFR/U8405
1000
100
10
1000
100
10
VGS
15V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.8V
TOP
TOP
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.8V
BOTTOM
BOTTOM
4.8V
4.8V
60µs
Tj = 175°C
PULSE WIDTH
60µs
Tj = 25°C
PULSE WIDTH
1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig. 2
Typical Output Characteristics
Fig. 1
Typical Output Characteristics
2.0
1.6
1.2
0.8
0.4
1000
100
10
I
= 90A
D
V
= 10V
GS
T
= 175°C
J
T
= 25°C
J
1
V
= 10V
DS
60µs PULSE WIDTH
0.1
-60
-20
T
20
60
100
140
180
2
3
4
5
6
7
8
, Junction Temperature (°C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig. 4
Normalized On-Resistance vs. Temperature
Fig. 3
Typical Transfer Characteristics
14.0
12.0
10.0
8.0
100000
10000
1000
V
= 0V,
= C
f = 1 MHZ
GS
I
= 90A
V
D
C
C
C
+ C
, C
SHORTED
iss
gs
gd
ds
= C
rss
oss
gd
= 32V
= 20V
DS
= C
+ C
ds
gd
V
DS
C
C
iss
C
6.0
oss
rss
4.0
2.0
0.0
100
0
20
40
60
80
100 120 140
0.1
1
10
100
Q , Total
Gate Charge (nC)
V
, Drain-to-Source Voltage (V)
G
DS
Fig 5.
Typical Capacitance vs. Drain-to-Source Voltage
Fig 6.
Typical Gate Charge vs. Gate-to-Source Voltage
3
2017-10-04
AUIRFR/U8405
1000
100
10
10000
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
T
= 175°C
J
100µsec
1msec
T
= 25°C
J
Limited by Package
10msec
DC
1
1
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
GS
0.1
0.1
0.2
0.6
1.0
1.4
1.8
0.1
1
10
100
V
, Source-to-Drain Voltage (V)
V
, Drain-to-Source Voltage (V)
SD
DS
Fig. 7
Typical Source-to-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
240
48
47
46
45
44
43
42
41
40
Id = 5.0mA
Limited By
Package
210
180
150
120
90
60
30
0
-60
-20
20
60
100
140
180
25
50
75
100
125
150
175
T
, Temperature ( °C )
T
, Case Temperature (°C)
J
C
Fig. 9
Maximum Drain Current vs. Case Temperature
Fig 10.
Drain-to-Source Breakdown Voltage
900
0.8
I
D
800
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
TOP
18A
37A
BOTTOM 90A
700
600
500
400
300
200
100
0
-5
0
5
10 15 20 25 30 35 40 45
25
50
75
100
125
150
175
Starting T
, Junction Temperature (°C)
J
V
Drain-to-Source Voltage (V)
DS,
Fig. 11
Typical C
OSS
Stored Energy
Fig 12.
Maximum Avalanche Energy vs. Drain Current
2017-10-04
4
AUIRFR/U8405
10
1
D = 0.50
0.20
0.10
0.05
0.1
0.02
0.01
0.01
0.001
0.0001
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 13.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
100
10
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
Tj = 150°C and
Tstart =25°C (Single Pulse)
0.01
0.05
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14.
Typical Avalanche Current Vs. Pulse width
250
200
150
100
50
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.infineon.com)
1. Avalanche
failures assumption:
TOP
BOTTOM 1.0%
Duty Cycle
= 90A
Single Pulse
I
D
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe
operation in Avalanche is allowed as long as T
jmax
is not exceeded.
3. Equation
below based on circuit and waveforms shown in Figures 24a, 24b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV
= Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. I
av
= Allowable avalanche current.
7.
T
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as
25°C in Figure 13, 14).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche =
t
av
·f
0
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
25
50
75
100
125
150
175
Starting T
, Junction Temperature (°C)
J
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
T/ Z
thJC
I
av
= 2
T/ [1.3·BV·Z
th
]
Fig 15.
Maximum Avalanche Energy Vs. Temperature
E
AS (AR)
= P
D (ave)
·t
av
5
2017-10-04
AUIRFR/U8405
8.0
6.0
4.0
2.0
0.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
I
= 90A
D
T
T
= 125°C
= 25°C
J
ID = 100µA
ID = 250µA
ID = 1.0mA
ID = 1.0A
J
4
6
8
10
12
14 16
18
20
-75
-25
T
25
75
125
175
225
V
Gate -to -Source Voltage
(V)
, Temperature ( °C )
GS,
J
Fig. 17
– Threshold Voltage vs. Temperature
Fig 16.
On-Resistance vs. Gate Voltage
120
110
100
90
I
= 36A
F
V
9
= 34V
I
= 36A
= 34V
R
F
8
7
6
5
4
3
2
1
0
T =
25°C
J
T =
125°C
J
V
R
T =
25°C
J
T =
125°C
J
80
70
60
50
40
30
20
10
0
200
400
600
800
1000
di /dt
(A/µs)
0
200
400
600
800
1000
F
di /dt
(A/µs)
F
Fig. 18
– Typical Recovery Current vs. di
f
/dt
Fig. 19
– Typical Stored Charge vs. di
f
/dt
100
80
60
40
20
0
8
I
= 90A
= 34V
F
I
= 90A
F
V
R
7
6
5
4
3
2
1
0
V
= 34V
R
T =
25°C
J
T =
125°C
J
T =
25°C
J
T =
125°C
J
0
200
400
600
800
1000
0
200
400
600
800
1000
di /dt
(A/µs)
F
di /dt
(A/µs)
F
Fig. 21
– Typical Stored Charge vs. di
f
/dt
Fig. 20
– Typical Recovery Current vs. di
f
/dt
6
2017-10-04
AUIRFR/U8405
9.0
6.0
3.0
0.0
VGS = 5.5V
VGS = 6.0V
VGS = 7.0V
VGS = 8.0V
VGS = 10V
0
100
200
300
400
500
I
, Drain Current (A)
D
Fig 22.
Typical On-Resistance vs. Drain Current
7
2017-10-04
AUIRFR/U8405
Fig 23.
Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V
(BR)DSS
15V
t
p
DRIVER
+
L
V
DS
D.U.T
R
G
V
DD
–
I
A
AS
I
AS
20V
0.01
t
p
Fig 24b.
Unclamped Inductive Waveforms
Fig 24a.
Unclamped Inductive Test Circuit
Fig 25b.
Switching Time Waveforms
Fig 25a.
Switching Time Test Circuit
Id
Vds
Vgs
Vgs(th)
Qgs1
Qgs2
Qgd
Qgodr
Fig 26b.
Gate Charge Waveform
Fig 26a.
Gate Charge Test Circuit
8
2017-10-04
AUIRFR/U8405
D-Pak (TO-252AA) Package Outline
(Dimensions are shown in millimeters (inches))
D-Pak (TO-252AA) Part Marking Information
Part Number
AUIRFR8405
Date Code
Y= Year
WW= Work Week
IR Logo
Lot Code
9
2017-10-04
AUIRFR/U8405
I-Pak (TO-251AA)
Package Outline
(Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA)
Part Marking Information
Part Number
AUIRFU8405
Date Code
IR Logo
Y= Year
WW= Work Week
Lot Code
10
2017-10-04
AUIRFR/U8405
D-Pak (TO-252AA) Tape & Reel Information
(Dimensions are shown in millimeters (inches))
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING
DIMENSION : MILLIMETER.
2. ALL
DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE
CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
11
2017-10-04
AUIRFR/U8405
Qualification Information
Qualification Level
Automotive
(per AEC-Q101)
Comments: This part number(s) passed Automotive qualification. Infineon’s
Industrial and Consumer qualification level is granted by extension of the higher
Automotive level.
D-Pak
MSL1
I-Pak
Moisture Sensitivity Level
Class M3 (+/- 400V)
†
AEC-Q101-002
Class H1C (+/- 2000V)
†
AEC-Q101-001
Class C5 (+/- 2000V)
†
AEC-Q101-005
Yes
Machine Model
Human Body Model
ESD
Charged Device Model
RoHS Compliant
† Highest
passing voltage.
Revision History
Date
Comments
Corrected label on SOA curve Fig 8
on page 4.
Updated Package
outline on page 9 & 10
Updated datasheet with corporate template
Corrected ordering table on page 1.
10/17/2014
10/12/2015
10/03/2017
Corrected typo error on part marking on page 9 and 10.
Published by
Infineon Technologies AG
81726 München, Germany
©
Infineon Technologies AG 2015
All Rights Reserved.
IMPORTANT NOTICE
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third
party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of
the product of Infineon Technologies in customer’s applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of
customer’s technical departments to evaluate the suitability of the product for the intended application and the
completeness of the product information given in this document with respect to such application.
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest
WARNINGS
Due to technical requirements products may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies office.
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.
12
2017-10-04
