Infineon-Technologies-AUIRLS3114Z

Part #Infineon-Technologies-AUIRLS3114Z
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Infineon-Technologies-AUIRLS3114Z
AUTOMOTIVE GRADE  
AUIRLS3114Z  
HEXFET

®

Power MOSFET  
Features  
Advanced Process Technology  
Ultra Low On-Resistance  
Logic Level Gate Drive  
Enhanced dv/dt
 
and di/dt capability  
175°C Operating Temperature  
Fast Switching  
Repetitive Avalanche Allowed up to Tjmax  
Lead-Free, RoHS Compliant  
Automotive Qualified *  
V

DSS  

40V  
3.8m
 
4.9m
  
122A
 
56A  
R

DS(on)

typ.  
max.  
I

D (Silicon Limited)  

I

D (Package Limited)  

D
Description  
S
Specifically designed for Automotive applications, this HEXFET®  
Power MOSFET utilizes the latest processing techniques to achieve  
extremely low on-resistance per silicon area.
 
Additional features of  
this design
 
are a 175°C junction operating temperature, fast  
switching speed and improved repetitive avalanche rating . These  
features combine to make this design an extremely efficient and  
reliable device for use in Automotive applications and a wide variety  
of other applications.  
G

G
Gate  
D
Drain  
S
Source  
Standard Pack  
Form  
Tube  
Base part number  
Package Type  
Orderable Part Number  
Quantity  
50  
AUIRLS3114Z  
AUIRLS3114ZTRL  
AUIRLS3114Z  
D

2

-Pak  
Tape and Reel Left  
800  
Absolute Maximum Ratings  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
 
These are stress  
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance  
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless  
otherwise specified.  
Symbol  
Parameter  
Max.  
Units  
I

D

@ T

C

= 25°C  
Continuous Drain Current, V

GS

@ 10V (Silicon Limited)  
122
 
I

D

@ T

C

= 100°C  
I

D

@ T

C

= 25°C  
Continuous Drain Current, V

GS

@ 10V (Silicon Limited)  
Continuous Drain Current, V

GS

@ 10V (Wirebond Limited)  
86
  
A
56  
I

DM  

Pulsed Drain Current
  
Maximum Power Dissipation  
Linear Derating Factor  
488  
143  
0.95  
P

D

@T

C

= 25°C  
W
W/°C  
V
V

GS  

E

AS  

Gate-to-Source Voltage  
Single Pulse Avalanche Energy (Thermally Limited)
  
± 16  
168  
mJ  
E

AS (Tested)  

I

AR  

Single Pulse Avalanche Energy (Tested)  
Avalanche Current
  
518  
See Fig.15,16, 12a, 12b  
A
E

AR  

Repetitive Avalanche Energy
  
Peak Diode Recovery
  
mJ  
dv/dt  
T

J  

2.3  
V/ns  
Operating Junction and  
-55 to
 
+ 175  
T

STG  

Storage Temperature Range  
°C  
Soldering Temperature, for 10 seconds (1.6mm from case)  
300  
Thermal Resistance  
Symbol  
Parameter  
Typ.  
Max.  
Units  
Junction-to-Case
  
–––  
1.05  
R

JC  

R

JA  

°C/W  
Junction-to-Ambient (PCB Mount)
  
–––  
40  
HEXFET® is a registered trademark of Infineon.  
*
Qualification standards can be found at

1
2015-11-6  

AUIRLS3114Z  
Static @ T

J

= 25°C (unless otherwise specified)  
Parameter  
Min. Typ.
 
Max. Units  
40 –––
 
–––  
––– 0.03 –––  
Conditions  
V

(BR)DSS  

V

(BR)DSS

/
T

J  

R

DS(on)  

V

GS(th)  

Drain-to-Source Breakdown Voltage  
Breakdown Voltage Temp. Coefficient  
Static Drain-to-Source On-Resistance  
Gate Threshold Voltage  
V
V

GS

= 0V, I

D

= 250µA  
V/°C Reference
 
to 25°C, I

D

= 1mA
 
–––  
1.0  
3.8  
1.7  
4.9  
2.5  
V

GS

= 10V, I

D

= 56A
  
m
  
V
V

DS

= V

GS

, I

D

= 100µA  
Gate Threshold Voltage Coefficient  
Forward Trans conductance  
––– -6.6 –––
 
mV/°C  
V

GS(th)  

gfs  
103 ––– –––  
S
V

DS

= 10V, I

D

= 56A  
R

G(Int)  

Internal Gate Resistance  
–––  
––– –––  
––– ––– 250  
––– ––– 100  
––– –––
 
-100  
0.8  
–––  
20  
  
V
V
V
V

DS

= 40V, V

GS

= 0V  

DS

= 40V,V

GS

= 0V,T

J

=125°C  

GS

= 16V  
I

DSS  

I

GSS  

Drain-to-Source Leakage Current  
µA  
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
nA  

GS

= -16V  
Dynamic Electrical
 
Characteristics @ T

J

= 25°C (unless otherwise specified)  
Q

g  

Total Gate Charge  
Gate-to-Source Charge  
Gate-to-Drain Charge  
Turn-On Delay Time  
Rise Time  
–––  
–––  
–––  
–––  
35  
11  
16  
28  
53  
I

D

= 56A  
nC V

DS

= 20V  

GS

= 4.5V
  
Q

gs  

Q

gd  

t

d(on)  

t

r  

t

d(off)  

t

f  

–––  
–––  
–––  
V
V

DD

= 20V  
I

D

= 56A  
R

G

= 3.7
  
––– 271 –––  
–––  
–––  
ns  
Turn-Off Delay Time  
Fall Time  
43  
60  
–––  
–––  
V

GS

= 4.5V
  
C

iss  

C

oss  

C

rss  

C

oss  

C

oss  

C

oss eff.  

Input Capacitance  
––– 3617 –––  
––– 633 –––  
––– 345 –––  
––– 2378 –––  
––– 570 –––  
––– 875 –––  
V

GS

= 0V  
V

DS

= 25V  
ƒ = 1.0MHz, See Fig. 5  
V

GS

= 0V, V

DS

= 1.0V, ƒ = 1.0MHz  
V

GS

= 0V, V

DS

= 32V, ƒ = 1.0MHz  
V

GS

= 0V, V

DS

= 0V to 32V
  
Output Capacitance  
Reverse Transfer Capacitance  
Output Capacitance  
Output Capacitance  
Effective Output Capacitance  
pF  
Diode Characteristics  
Parameter  
Min. Typ.
 
Max. Units  
Conditions  
MOSFET symbol  
showing the  
integral reverse  
p-n junction diode.  
Continuous Source Current  
(Body Diode)  
I

S  

––– –––
 
122
  
A
––– ––– 488  
Pulsed Source Current  
(Body Diode)
  
I

SM  

V

SD  

t

rr  

Q

rr  

t

on  

Diode Forward Voltage  
Reverse Recovery Time  
Reverse Recovery Charge  
Forward Turn-On Time  
––– –––  
1.3  
50  
48  
V
T

J

= 25°C,I

S

= 56A,V

GS

= 0V
  
–––  
–––  
33  
32  
ns  
nC  
T

J

= 25°C ,I

F

= 56A, V

DD

= 20V  
di/dt = 100A/µs
  
Intrinsic turn-on time is negligible (turn-on is dominated by L

S

+L

D

)  
Notes:
 
Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 56A. Note that  
current limitations arising from heating of the device leads may occur with some lead mounting arrangements.  
Repetitive rating;
 
pulse width limited by max. junction temperature.  
Limited by T

Jmax,

starting T

J

= 25°C, L = 0.107mH, R

G

= 50
, I

AS

= 56A, V

GS

=10V. Part not recommended for use above this value.  
I

SD


56A, di/dt

263A/µs, V

DD


V

(BR)DSS

, T

J

175°C.  
Pulse width

1.0ms; duty cycle
2%.  
C

oss

eff. is a fixed capacitance that gives the same charging time as C

oss

while V

DS

is rising from 0 to 80% V

DSS  

.
When mounted on 1″ square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to  
application note #AN-994  
R

is measured at T

J

approximately 90°C.  
2
2015-11-6  

AUIRLS3114Z  
1000  
100  
10  
1000  
100  
10  
VGS  
15V  
10V  
8.0V  
4.5V  
3.5V  
3.0V  
2.8V  
2.5V  
TOP  
VGS  
15V  
10V  
8.0V  
4.5V  
3.5V  
3.0V  
2.8V  
2.5V  
TOP  
BOTTOM  
BOTTOM  
2.5V  
2.5V  
1
60µs PULSE WIDTH  
Tj = 175°C  
60µs PULSE WIDTH  
Tj = 25°C  
1
0.1  
0.1  
1
10  
100  
1000  
0.1  
1
10  
100  
1000  
V
, Drain-to-Source Voltage (V)  
DS  
V
, Drain-to-Source Voltage (V)  
DS  
Fig. 1
Typical Output Characteristics  
Fig. 2
Typical Output Characteristics  
1000  
175  
150  
125  
100  
75  
T
= 25°C  
J
100  
10  
1
T
= 175°C  
J
T
= 175°C  
J
T
= 25°C  
J
50  
V
= 25V  
DS  
25  
V
= 10V  
60µs PULSE WIDTH  
DS  
0.1  
0
1
2
3
4
5
6
0
20  
40  
60  
80  
I
,Drain-to-Source Current (A)  
V
, Gate-to-Source Voltage (V)  
D
GS  
Fig. 3
Typical Transfer Characteristics  
Fig. 4
Typical Forward Trans conductance  
vs. Drain Current  
3
2015-11-6  

AUIRLS3114Z  
100000  
10000  
1000  
14.0  
12.0  
10.0  
8.0  
V
= 0V,  
= C  
f = 1 MHZ  
GS  
I =
 
56A  
D
C
C
C
+ C
 
, C  
SHORTED  
iss  
gs  
gd  
ds  
= C  
rss  
oss  
gd  
V
V
= 32V  
= C
 
+ C  
ds  
DS  
DS  
gd  
= 20V  
VDS= 8V  
C
iss  
6.0  
C
oss  
4.0  
C
rss  
2.0  
100  
0.0  
1
10  
, Drain-to-Source Voltage (V)  
100  
0
10 20 30 40 50 60 70 80 90  
V
Q , Total
 
Gate Charge (nC)  
G
DS  
Fig 5.
 
Typical Capacitance vs. Drain-to-Source Voltage  
Fig 6.
 
Typical Gate Charge vs. Gate-to-Source Voltage  
1000  
10000  
OPERATION IN THIS AREA  
LIMITED BY R  
(on)  
DS  
1000  
100  
10  
T
= 175°C  
J
100  
10  
100µsec  
1msec  
10msec  
T
= 25°C  
J
1
Tc = 25°C  
Tj = 175°C  
Single Pulse  
DC  
V
= 0V  
GS  
0.1  
1.0  
0.1  
1
10  
100  
0.0  
0.5  
1.0  
1.5  
2.0  
2.5  
V
, Drain-to-Source Voltage (V)  
V
, Source-to-Drain Voltage (V)  
DS  
SD  
Fig. 7
Typical Source-to-Drain Diode  
Fig 8.
 
Maximum Safe Operating Area  
2015-11-6  
Forward Voltage  
4

AUIRLS3114Z  
2.2  
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
140  
120  
100  
80  
I
= 56A  
D
Wirebond Limitation  
V
= 10V  
GS  
60  
40  
20  
0
-60 -40 -20  
T
0
20 40 60 80
 
10
0
1
2
0
1
4
0
1
6
0
1
80  
25  
50  
75  
100  
125  
150  
175  
, Junction Temperature (°C)  
T
, Case Temperature (°C)  
J
C
Fg 9.
 
Maximum Drain Current vs.  
Fig 10.
 
Normalized On-Resistance  
Case Temperature  
vs. Temperature  
10  
1
D = 0.50  
0.20  
0.10  
0.05  
0.1  
0.01  
0.02  
0.01  
SINGLE PULSE  
( THERMAL RESPONSE )  
Notes:  
1. Duty Factor D = t1/t2  
2. Peak Tj = P dm x Zthjc + Tc  
0.001  
1E-006  
1E-005  
0.0001  
0.001  
0.01  
0.1  
t
, Rectangular Pulse Duration (sec)  
1
Fig 11.
 
Maximum Effective Transient Thermal Impedance, Junction-to-Case  
5
2015-11-6  

AUIRLS3114Z  
15V  
700  
600  
500  
400  
300  
200  
100  
0
I
DRIVER  
+
L
D
V
DS  
TOP  
9.6A  
20A  
BOTTOM 56A  
D.U.T  
AS  
R
G
V
DD  
–
I
A
20V  
0.01  
t
p
Fig 12a.
 
Unclamped Inductive Test Circuit  
V
(BR)DSS  
t
p
25  
50  
75  
100  
125  
150  
175  
Starting T
 
, Junction Temperature (°C)  
J
Fig 12c.
 
Maximum Avalanche Energy  
I
AS  
vs. Drain Current  
Fig 12b.
 
Unclamped Inductive Waveforms  
Id  
Vds  
2.6  
2.4  
2.2  
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
Vgs  
Vgs(th)  
I
= 100µA  
D
ID = 250µA  
= 1.0mA  
Qgs1  
Qgs2  
Qgd  
Qgodr  
I
D
ID = 10mA  
= 1.0A  
I
Fig 13a.
 
Gate Charge Waveform  
D
-75 -50 -25  
0
25 50 75
 
100 125 150 175  
T
, Temperature ( °C )  
J
Fig. 14
– Threshold Voltage vs. Temperature  
Fig 13b.
 
Gate Charge Test Circuit  
6
2015-11-6  

AUIRLS3114Z  
1000  
100  
10  
Allowed avalanche Current vs avalanche  
pulsewidth, tav, assuming
Tj = 150°C and  
Tstart =25°C (Single Pulse)  
Duty Cycle = Single Pulse  
0.01  
0.05  
0.10  
1
Allowed avalanche Current vs avalanche  
pulsewidth, tav, assuming

j = 25°C and  
Tstart = 150°C.  
0.1  
1.0E-06  
1.0E-05  
1.0E-04  
1.0E-03  
1.0E-02  
1.0E-01  
tav (sec)  
Fig 15.
 
Avalanche Current vs. Pulse width  
180  
160  
140  
120  
100  
80  
TOP  
BOTTOM 1.0%
 
Duty Cycle  
= 56A  
Single Pulse  
Notes on Repetitive Avalanche Curves , Figures 15, 16:  
(For further info, see AN-1005 at www.infineon.com)  
1. Avalanche
 
failures assumption:  
I
D
Purely a thermal phenomenon and failure occurs at a temperature far in  
excess of T
jmax
. This is validated for every part type.  
2. Safe
 
operation in Avalanche is allowed as long as T
jmax
is not exceeded.  
3. Equation
 
below based on circuit and waveforms shown in Figures 12a, 12b.  
4. P
D (ave)
= Average power dissipation per single avalanche pulse.  
5. BV
 
= Rated breakdown voltage (1.3 factor accounts for voltage increase  
during avalanche).  
60  
40  
6. I
av
= Allowable avalanche current.  
7.
T
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as  
25°C in Figure 11, 15).  
20  
0
t
av =
Average time in avalanche.  
25  
50  
75  
100  
125  
150  
175  
D = Duty cycle in avalanche =
 
t
av
·f  
Starting T
 
, Junction Temperature (°C)  
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)  
J
P

D (ave)

= 1/2 ( 1.3·BV·I

av

) =
T/ Z

thJC  

I

av

= 2
T/ [1.3·BV·Z

th

]  
Fig 16.
 
Maximum Avalanche Energy  
E

AS (AR)

= P

D (ave)

·t

av  

vs. Temperature  
7
2015-11-6  

AUIRLS3114Z  
Fig 17.
Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs  
Fig 18a.
 
Switching Time Test Circuit  
Fig 18b.
 
Switching Time Waveforms  
8
2015-11-6  

AUIRLS3114Z  
D

2

Pak (TO-263AB) Package Outline
(Dimensions are shown in millimeters (inches))  
D

2

Pak (TO-263AB) Part Marking Information  
Part Number  
AULS3114Z  
Date Code  
IR Logo  
Y= Year  
WW= Work Week  
Lot Code  
Note: For the most current drawing please refer to IR website at

9
2015-11-6  

AUIRLS3114Z  
D

2

Pak (TO-263AB) Tape & Reel Information
(Dimensions are shown in millimeters (inches))  
TRR  
1.60 (.063)  
1.50 (.059)  
1.60 (.063)  
4.10 (.161)  
1.50 (.059)  
0.368 (.0145)  
0.342 (.0135)  
3.90 (.153)  
FEED DIRECTION  
TRL  
11.60 (.457)  
11.40 (.449)  
1.85 (.073)  
1.65 (.065)  
24.30 (.957)  
23.90 (.941)  
15.42 (.609)  
15.22 (.601)  
1.75 (.069)  
1.25 (.049)  
10.90 (.429)  
10.70 (.421)  
4.72 (.136)  
4.52 (.178)  
16.10 (.634)  
15.90 (.626)  
FEED DIRECTION  
13.50 (.532)  
12.80 (.504)  
27.40 (1.079)  
23.90 (.941)  
4
330.00  
(14.173)  
MAX.  
60.00 (2.362)  
MIN.  
30.40 (1.197)  
MAX.  
NOTES :  
1. COMFORMS
 
TO EIA-418.  
2. CONTROLLING
 
DIMENSION: MILLIMETER.  
3. DIMENSION
 
MEASURED @ HUB.  
4. INCLUDES
 
FLANGE DISTORTION @ OUTER EDGE.  
26.40 (1.039)  
24.40 (.961)  
4
3
Note: For the most current drawing please refer to IR website at

10  
2015-11-6  

AUIRLS3114Z  
Qualification Information  
Qualification Level  
Automotive  
(per AEC-Q101)  
Comments: This part number(s) passed Automotive qualification. Infineon’s  
Industrial and Consumer qualification level is granted by extension of the higher  
Automotive level.  
Moisture Sensitivity Level  
D

2

-Pak  
MSL1  
Class M4 (+/- 600V)

†  

AEC-Q101-002  
Class H1C (+/- 2000V)

†  

AEC-Q101-001  
Class C5 (+/- 2000V)

†  

AEC-Q101-005  
Yes  
Machine Model  
Human Body Model  
ESD  
Charged Device Model  
RoHS Compliant  
† Highest
 
passing voltage.  
Revision History  
Date  
Comments  

Added “Logic
 
Level Gate Drive” bullet in the features section on page 1  

Updated data sheet with new IR corporate template  
3/3/2014  

Updated datasheet with corporate template  

Corrected ordering table on page 1.  
11/6/2015  
Published by  
Infineon Technologies AG  
81726 München, Germany  
©
Infineon Technologies AG 2015  
All Rights Reserved.  
IMPORTANT NOTICE  
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics  
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any  
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and  
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third  
party.  
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this  
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of  
the product of Infineon Technologies in customer’s applications.  
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of  
customer’s technical departments to evaluate the suitability of the product for the intended application and the  
completeness of the product information given in this document with respect to such application.  
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest  
Infineon Technologies office (

).  
WARNINGS  
Due to technical requirements products may contain dangerous substances. For information on the types in question  
please contact your nearest Infineon Technologies office.  
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized  
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a  
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.  
11  
2015-11-6