Infineon-Technologies-BSC010N04LS6
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BSC010N04LS6
MOSFET
OptiMOS
TMꢀ
6ꢀPower-Transistor,ꢀ40ꢀV
TDSON-8ꢀFLꢀ(enlargedꢀsourceꢀinterconnection)
8
7
6
5
Features
•ꢀOptimizedꢀforꢀsynchronousꢀapplication
•ꢀVeryꢀlowꢀon-resistanceꢀ
R
DS(on)
•ꢀ100%ꢀavalancheꢀtested
•ꢀSuperiorꢀthermalꢀresistance
•ꢀN-channel
•ꢀPb-freeꢀleadꢀplating;ꢀRoHSꢀcompliant
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21
•ꢀ175ꢀ°Cꢀrated
1
5
2
6
7
3
4
8
4
3
2
1
ProductꢀValidation
Qualifiedꢀforꢀindustrialꢀapplicationsꢀaccordingꢀtoꢀtheꢀrelevantꢀtestsꢀof
JEDEC47/20/22
S 1
S 2
S 3
G 4
8 D
7 D
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters
6 D
5 D
Parameter
Value
Unit
V
DS
40
V
R
DS(on),max
I
D
1
m
Ω
A
100
73
Q
oss
nC
nC
nC
Q
G
(0V..10V)
Q
G
(0V..4.5V)
67
32
Typeꢀ/ꢀOrderingꢀCode
Package
Marking
RelatedꢀLinks
BSC010N04LS6
TDSON-8 FL
10N04LS6
–
Final Data Sheet
1
Rev.ꢀ2.1,ꢀꢀ2019-04-02
OptiMOS
TMꢀ
6ꢀPower-Transistor,ꢀ40ꢀV
BSC010N04LS6
TableꢀofꢀContents
Description .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
Thermal characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
Electrical characteristics diagrams
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
Package Outlines
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
Revision History
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
Trademarks .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
Disclaimer .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
Final Data Sheet
2
Rev.ꢀ2.1,ꢀꢀ2019-04-02
OptiMOS
TMꢀ
6ꢀPower-Transistor,ꢀ40ꢀV
BSC010N04LS6
1ꢀꢀꢀꢀꢀMaximumꢀratings
atꢀ
T
A
=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
V
GS
=10ꢀV,ꢀ
T
C
=25ꢀ°C
V
GS
=10ꢀV,ꢀ
T
C
=100ꢀ°C
V
GS
=4.5ꢀV,ꢀ
T
C
=25ꢀ°C
–
–
–
–
–
–
–
–
–
–
100
100
100
100
40
Continuous drain current
I
D
A
V
GS
=4.5ꢀV,ꢀ
T
C
=100ꢀ°C
V
GS
=10ꢀV,ꢀ
T
A
=25ꢀ°C,
R
THJA
=50ꢀ°C/W
1)
Pulsed drain current
2)
Avalanche energy, single pulse
3)
I
D,pulse
E
AS
–
–
–
–
400
376
20
A
T
A
=25ꢀ°C
–
mJ
V
I
D
=50ꢀA,ꢀ
R
GS
=25ꢀ
Ω
Gate source voltage
V
GS
-20
–
–
–
–
–
150
3.0
T
C
=25ꢀ°C
Power dissipation
P
tot
W
T
A
=25ꢀ°C,ꢀ
R
THJA
=50ꢀ°C/W
1)
IEC climatic category; DIN IEC 68-1:
55/175/56
Operating and storage temperature
T
j
,ꢀ
T
stg
-55
–
175
°C
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Thermal resistance, junction – case,
bottom
R
thJC
R
thJC
R
thJA
–
–
–
–
1
°C/W –
°C/W –
°C/W –
Thermal resistance, junction – case,
top
–
–
20
50
Device on PCB,
6 cm² cooling area
1)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm
2
(one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
2)
See Diagram 3 for more detailed information
3)
See Diagram 13 for more detailed information
Final Data Sheet
3
Rev.ꢀ2.1,ꢀꢀ2019-04-02
OptiMOS
TMꢀ
6ꢀPower-Transistor,ꢀ40ꢀV
BSC010N04LS6
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics
atꢀ
T
j
=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
40
Typ.
Max.
–
Drain-source breakdown voltage
Gate threshold voltage
V
(BR)DSS
V
GS(th)
–
–
V
V
V
GS
=0ꢀV,ꢀ
I
D
=1ꢀmA
1.3
2.3
V
DS
=
V
GS
,ꢀ
I
D
=250ꢀµA
–
–
0.1
10
1
100
V
DS
=40ꢀV,ꢀ
V
GS
=0ꢀV,ꢀ
T
j
=25ꢀ°C
V
DS
=40ꢀV,ꢀ
V
GS
=0ꢀV,ꢀ
T
j
=125ꢀ°C
Zero gate voltage drain current
Gate-source leakage current
Drain-source on-state resistance
I
DSS
µA
nA
I
GSS
–
10
100
V
GS
=20ꢀV,ꢀ
V
DS
=0ꢀV
–
–
0.89
1.1
1.0
1.4
V
GS
=10ꢀV,ꢀ
I
D
=50ꢀA
V
GS
=4.5ꢀV,ꢀ
I
D
=50ꢀA
R
DS(on)
m
Ω
Gate resistance
R
G
g
fs
–
–
1
–
–
Ω
–
Transconductance
250
S
|
V
DS
|
≥
2|
I
D
|
R
DS(on)max
,ꢀ
I
D
=50ꢀA
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics
Values
Typ.
4600
1500
38
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Input capacitance
1)
Output capacitance
1)
Reverse transfer capacitance
1)
C
iss
C
oss
C
rss
–
–
–
–
–
–
pF
pF
pF
V
GS
=0ꢀV,ꢀ
V
DS
=20ꢀV,ꢀ
f
=1ꢀMHz
V
GS
=0ꢀV,ꢀ
V
DS
=20ꢀV,ꢀ
f
=1ꢀMHz
V
GS
=0ꢀV,ꢀ
V
DS
=20ꢀV,ꢀ
f
=1ꢀMHz
V
DD
=20ꢀV,ꢀ
V
GS
=10ꢀV,ꢀ
I
D
=20ꢀA,
R
G,ext
=1.6ꢀ
Ω
Turn-on delay time
Rise time
t
d(on)
t
r
t
d(off)
t
f
–
–
–
–
7
–
–
–
–
ns
ns
ns
ns
V
DD
=20ꢀV,ꢀ
V
GS
=10ꢀV,ꢀ
I
D
=20ꢀA,
R
G,ext
=1.6ꢀ
Ω
5.0
29
8
V
DD
=20ꢀV,ꢀ
V
GS
=10ꢀV,ꢀ
I
D
=20ꢀA,
R
G,ext
=1.6ꢀ
Ω
Turn-off delay time
Fall time
V
DD
=20ꢀV,ꢀ
V
GS
=10ꢀV,ꢀ
I
D
=20ꢀA,
R
G,ext
=1.6ꢀ
Ω
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics
2)
ꢀ
Values
Typ.
12
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Gate to source charge
Gate charge at threshold
Gate to drain charge
1)
Switching charge
Q
gs
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
nC
nC
nC
nC
nC
V
V
DD
=20ꢀV,ꢀ
I
D
=50ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=20ꢀV,ꢀ
I
D
=50ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=20ꢀV,ꢀ
I
D
=50ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=20ꢀV,ꢀ
I
D
=50ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=20ꢀV,ꢀ
I
D
=50ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=20ꢀV,ꢀ
I
D
=50ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=20ꢀV,ꢀ
I
D
=50ꢀA,ꢀ
V
GS
=0ꢀtoꢀ4.5ꢀV
V
DS
=0.1ꢀV,ꢀ
V
GS
=0ꢀtoꢀ4.5ꢀV
Q
g(th)
Q
gd
7.3
8.1
13
Q
sw
Gate charge total
1)
Q
g
67
Gate plateau voltage
Gate charge total
V
plateau
Q
g
2.7
32
nC
nC
nC
Gate charge total, sync. FET
Output charge
1)
Q
g(sync)
Q
oss
28
73
V
DD
=20ꢀV,ꢀ
V
GS
=0ꢀV
1)
Defined by design. Not subject to production test.
2)
See
″
Gate charge waveforms
″
for parameter definition
Final Data Sheet
4
Rev.ꢀ2.1,ꢀꢀ2019-04-02
OptiMOS
TMꢀ
6ꢀPower-Transistor,ꢀ40ꢀV
BSC010N04LS6
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Typ.
–
Max.
Diode continuous forward current
Diode pulse current
I
S
–
–
–
–
–
100
A
T
C
=25ꢀ°C
I
S,pulse
V
SD
t
rr
–
400
A
T
C
=25ꢀ°C
Diode forward voltage
0.80
30
97
1
–
V
V
GS
=0ꢀV,ꢀ
I
F
=50ꢀA,ꢀ
T
j
=25ꢀ°C
V
R
=20ꢀV,ꢀ
I
F
=10ꢀA,ꢀd
i
F
/d
t
=400ꢀA/µs
V
R
=20ꢀV,ꢀ
I
F
=10ꢀA,ꢀd
i
F
/d
t
=400ꢀA/µs
Reverse recovery time
1)
Reverse recovery charge
1)
ns
nC
Q
rr
–
1)
Defined by design. Not subject to production test.
Final Data Sheet
5
Rev.ꢀ2.1,ꢀꢀ2019-04-02
OptiMOS
TMꢀ
6ꢀPower-Transistor,ꢀ40ꢀV
BSC010N04LS6
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams
Diagramꢀ1:ꢀPowerꢀdissipation
Diagramꢀ2:ꢀDrainꢀcurrent
160
350
package limit
silicon limit
140
120
100
80
300
250
200
150
100
50
60
40
20
0
0
0
25
50
75
100
125
150
175
200
0
25
50
75
100
125
150
175
200
T
C
ꢀ[°C]
T
C
ꢀ[°C]
P
tot
=f(
T
C
)
I
D
=f(
T
C
);ꢀ
V
GS
≥
10ꢀV
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance
10
3
10
1
single pulse
0.01
0.02
1 µs
10 µs
10 ms
0.05
10
2
0.1
0.2
DC
100 µs
0.5
10
0
10
-1
10
-2
10
1
10
0
1 ms
10
-1
10
-2
10
-1
10
0
10
1
10
2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
V
DS
ꢀ[V]
t
p
ꢀ[s]
I
D
=f(
V
DS
);ꢀ
T
C
=25ꢀ°C;ꢀ
D
=0;ꢀparameter:ꢀ
t
p
Z
thJC
=f(
t
p
);ꢀparameter:ꢀ
D
=
t
p
/
T
Final Data Sheet
6
Rev.ꢀ2.1,ꢀꢀ2019-04-02
OptiMOS
TMꢀ
6ꢀPower-Transistor,ꢀ40ꢀV
BSC010N04LS6
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
400
2.8
3 V
3.5 V
4.5 V
350
2.4
2.0
1.6
1.2
0.8
0.4
0.0
10 V
4 V
300
5 V
250
3.5 V
4 V
200
150
100
3 V
4.5 V
5 V
10 V
2.8 V
50
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
0
25
50
75
100
125
150
175
200
V
DS
ꢀ[V]
I
D
ꢀ[A]
I
D
=f(
V
DS
),ꢀ
T
j
=25ꢀ°C;ꢀparameter:ꢀ
V
GS
R
DS(on)
=f(
I
D
),ꢀ
T
j
=25ꢀ°C;ꢀparameter:ꢀ
V
GS
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics
Diagramꢀ8:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
400
2.8
350
300
250
200
150
100
2.4
2.0
175 °C
1.6
1.2
0.8
0.4
0.0
25 °C
50
175 °C
25 °C
0
0
1
2
3
4
5
0
2
4
6
8
10
V
GS
ꢀ[V]
V
GS
ꢀ[V]
I
D
=f(
V
GS
),ꢀ|
V
DS
|>2|
I
D
|
R
DS(on)max
;ꢀparameter:ꢀ
T
j
R
DS(on)
=f(
V
GS
),ꢀ
I
D
=50ꢀA;ꢀparameter:ꢀ
T
j
Final Data Sheet
7
Rev.ꢀ2.1,ꢀꢀ2019-04-02
OptiMOS
TMꢀ
6ꢀPower-Transistor,ꢀ40ꢀV
BSC010N04LS6
Diagramꢀ9:ꢀNormalizedꢀdrain-sourceꢀonꢀresistance
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage
2.0
2.4
2.0
1.6
1.2
0.8
0.4
0.0
1.6
1.2
0.8
0.4
0.0
2500 µA
250 µA
-80
-40
0
40
80
120
160
200
-80
-40
0
40
80
120
160
200
T
j
ꢀ[°C]
T
j
ꢀ[°C]
R
DS(on)
=f(
T
j
),ꢀ
I
D
=50ꢀA,ꢀ
V
GS
=10ꢀV
V
GS(th
=f(
T
j
),ꢀ
V
GS
=
V
DS
;ꢀparameter:ꢀ
I
D
Diagramꢀ11:ꢀTyp.ꢀcapacitances
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode
10
4
10
3
25 °C
25 °C, max
175 °C
Ciss
175 °C, max
10
3
10
2
10
1
10
2
10
1
10
0
Coss
Crss
0
5
10
15
20
25
30
35
40
0.00
0.25
0.50
0.75
1.00
1.25
1.50
V
DS
ꢀ[V]
V
SD
ꢀ[V]
C
=f(
V
DS
);ꢀ
V
GS
=0ꢀV;ꢀ
f
=1ꢀMHz
I
F
=f(
V
SD
);ꢀparameter:ꢀ
T
j
Final Data Sheet
8
Rev.ꢀ2.1,ꢀꢀ2019-04-02
OptiMOS
TMꢀ
6ꢀPower-Transistor,ꢀ40ꢀV
BSC010N04LS6
Diagramꢀ13:ꢀAvalancheꢀcharacteristics
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge
10
2
10
8 V
20 V
32 V
8
6
4
2
0
25 °C
10
1
100 °C
150 °C
10
0
10
0
10
1
10
2
10
3
0
10
20
30
40
50
60
70
t
AV
ꢀ[µs]
Q
gate
ꢀ[nC]
I
AS
=f(
t
AV
);ꢀ
R
GS
=25ꢀ
Ω
;ꢀparameter:ꢀ
T
j,start
V
GS
=f(
Q
gate
),ꢀ
I
D
=50ꢀAꢀpulsed,ꢀ
T
j
=25ꢀ°C;ꢀparameter:ꢀ
V
DD
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage
Diagram Gate charge waveforms
44
43
42
41
40
39
38
-80
-40
0
40
80
120
160
200
T
j
ꢀ[°C]
V
BR(DSS)
=f(
T
j
);ꢀ
I
D
=1ꢀmA
Final Data Sheet
9
Rev.ꢀ2.1,ꢀꢀ2019-04-02
OptiMOS
TMꢀ
6ꢀPower-Transistor,ꢀ40ꢀV
BSC010N04LS6
5ꢀꢀꢀꢀꢀPackageꢀOutlines
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀTDSON-8ꢀFL,ꢀdimensionsꢀinꢀmm/inches
Final Data Sheet
10
Rev.ꢀ2.1,ꢀꢀ2019-04-02
OptiMOS
TMꢀ
6ꢀPower-Transistor,ꢀ40ꢀV
BSC010N04LS6
Figureꢀ2ꢀꢀꢀꢀꢀOutlineꢀBoardpadsꢀ(TDSON-8ꢀFL)
Final Data Sheet
11
Rev.ꢀ2.1,ꢀꢀ2019-04-02
OptiMOS
TMꢀ
6ꢀPower-Transistor,ꢀ40ꢀV
BSC010N04LS6
RevisionꢀHistory
BSC010N04LS6
Revision:ꢀ2019-04-02,ꢀRev.ꢀ2.1
Previous Revision
Revision Date
Subjects (major changes since last revision)
2.0
2.1
Release of final version
Update Marking
2018-07-31
2019-04-02
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Final Data Sheet
12
Rev.ꢀ2.1,ꢀꢀ2019-04-02
