Infineon-Technologies-BSC022N04LS
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BSC022N04LS
MOSFET
OptiMOS
TM
ꢀPower-MOSFET,ꢀ40ꢀV
SuperSO8
5
8
6
7
7
Features
6
5
8
•ꢀOptimizedꢀforꢀhighꢀperformanceꢀSMPS,ꢀe.g.ꢀsync.ꢀrec.
•ꢀVeryꢀlowꢀon-resistanceꢀ
R
DS(on)
ꢀ@ꢀ
V
GS
=4.5ꢀV
•ꢀ100%ꢀavalancheꢀtested
•ꢀSuperiorꢀthermalꢀresistance
4
3
•ꢀN-channel
1
•ꢀQualifiedꢀaccordingꢀtoꢀJEDEC
1)
ꢀꢀforꢀtargetꢀapplications
•ꢀPb-freeꢀleadꢀꢀplating;ꢀRoHSꢀcompliant
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21
2
2
3
1
4
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters
S 1
8 D
7 D
Parameter
Value
Unit
S 2
S 3
G 4
V
DS
40
V
6 D
5 D
R
DS(on),max
I
D
2.2
100
33
m
Ω
A
Q
OSS
nC
nC
Q
G
(0V..10V)
37
Typeꢀ/ꢀOrderingꢀCode
Package
Marking
RelatedꢀLinks
BSC022N04LS
PG-TDSON-8
022N04LS
–
1)
J-STD20 and JESD22
Final Data Sheet
1
Rev.ꢀ2.1,ꢀꢀ2016-05-25
OptiMOS
TM
ꢀPower-MOSFET,ꢀ40ꢀV
BSC022N04LS
TableꢀofꢀContents
Description .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
Thermal characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
Electrical characteristics diagrams
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
Package Outlines
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
Revision History
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
Trademarks .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
Disclaimer .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
Final Data Sheet
2
Rev.ꢀ2.1,ꢀꢀ2016-05-25
OptiMOS
TM
ꢀPower-MOSFET,ꢀ40ꢀV
BSC022N04LS
1ꢀꢀꢀꢀꢀMaximumꢀratings
atꢀ
T
A
=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
–
–
–
–
–
–
–
–
–
–
100
85
100
70
V
GS
=10ꢀV,ꢀ
T
C
=25ꢀ°C
V
GS
=10ꢀV,ꢀ
T
C
=100ꢀ°C
V
GS
=4.5ꢀV,ꢀ
T
C
=25ꢀ°C
Continuous drain current
I
D
A
V
GS
=4.5ꢀV,ꢀ
T
C
=100ꢀ°C
25
V
GS
=10ꢀV,ꢀ
T
A
=25ꢀ°C,ꢀ
R
thJA
=50ꢀK/W
1)
Pulsed drain current
2)
I
D,pulse
I
AS
–
–
–
–
–
400
50
A
T
C
=25ꢀ°C
Avalanche current, single pulse
Avalanche energy, single pulse
3)
Gate source voltage
–
A
T
C
=25ꢀ°C
E
AS
V
GS
–
70
mJ
V
I
D
=50ꢀA,ꢀ
R
GS
=25ꢀ
Ω
-20
20
–
–
–
–
–
69
2.5
T
C
=25ꢀ°C
Power dissipation
P
tot
W
T
A
=25ꢀ°C,ꢀ
R
thJA
=50ꢀK/W
1)
IEC climatic category;
DIN IEC 68-1: 55/150/56
Operating and storage temperature
T
j
,ꢀ
T
stg
-55
–
150
°C
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Thermal resistance, junction – case,
bottom
R
thJC
R
thJC
R
thJA
–
1.1
1.8
K/W
K/W
K/W
–
–
–
Thermal resistance, junction – case,
top
–
–
–
–
20
50
Device on PCB,
6 cm
2
cooling area
1)
1)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm
2
(one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
2)
See Diagram 3 for more detailed information
3)
See Diagram 13 for more detailed information
Final Data Sheet
3
Rev.ꢀ2.1,ꢀꢀ2016-05-25
OptiMOS
TM
ꢀPower-MOSFET,ꢀ40ꢀV
BSC022N04LS
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
40
Typ.
Max.
Drain-source breakdown voltage
Gate threshold voltage
V
(BR)DSS
V
GS(th)
–
–
–
V
V
V
GS
=0ꢀV,ꢀ
I
D
=1ꢀmA
1.2
2
V
DS
=
V
GS
,ꢀ
I
D
=250ꢀµA
–
–
0.1
10
1
100
V
DS
=40ꢀV,ꢀ
V
GS
=0ꢀV,ꢀ
T
j
=25ꢀ°C
V
DS
=40ꢀV,ꢀ
V
GS
=0ꢀV,ꢀ
T
j
=125ꢀ°C
Zero gate voltage drain current
Gate-source leakage current
Drain-source on-state resistance
I
DSS
µA
nA
I
GSS
–
10
100
V
GS
=20ꢀV,ꢀ
V
DS
=0ꢀV
–
–
2.3
1.8
3.2
2.2
V
GS
=4.5ꢀV,ꢀ
I
D
=50ꢀA
V
GS
=10ꢀV,ꢀ
I
D
=50ꢀA
R
DS(on)
m
Ω
Gate resistance
1)
Transconductance
R
G
g
fs
–
1.1
2.2
–
Ω
–
90
180
S
|
V
DS
|>2|
I
D
|
R
DS(on)max
,ꢀ
I
D
=50ꢀA
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Input capacitance
1)
Output capacitance
1)
Reverse transfer capacitance
1)
C
iss
C
oss
C
rss
–
–
–
2600 3640 pF
V
GS
=0ꢀV,ꢀ
V
DS
=20ꢀV,ꢀ
f
=1ꢀMHz
V
GS
=0ꢀV,ꢀ
V
DS
=20ꢀV,ꢀ
f
=1ꢀMHz
V
GS
=0ꢀV,ꢀ
V
DS
=20ꢀV,ꢀ
f
=1ꢀMHz
750
60
1050 pF
120
–
pF
ns
V
DD
=20ꢀV,ꢀ
V
GS
=10ꢀV,ꢀ
I
D
=50ꢀA,
R
G,ext
=1.6ꢀ
Ω
Turn-on delay time
Rise time
t
d(on)
t
r
t
d(off)
t
f
–
–
–
–
6.1
6.8
26
V
DD
=20ꢀV,ꢀ
V
GS
=10ꢀV,ꢀ
I
D
=50ꢀA,
R
G,ext
=1.6ꢀ
Ω
–
–
–
ns
ns
ns
V
DD
=20ꢀV,ꢀ
V
GS
=10ꢀV,ꢀ
I
D
=50ꢀA,
R
G,ext
=1.6ꢀ
Ω
Turn-off delay time
Fall time
V
DD
=20ꢀV,ꢀ
V
GS
=10ꢀV,ꢀ
I
D
=50ꢀA,
R
G,ext
=1.6ꢀ
Ω
5.0
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics
2)
ꢀ
Values
Typ.
6.8
4.2
6.0
8.7
37
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Gate to source charge
Gate charge at threshold
Gate to drain charge
1)
Switching charge
Q
gs
–
–
–
–
–
–
–
–
–
–
nC
nC
nC
nC
nC
V
V
DD
=20ꢀV,ꢀ
I
D
=50ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=20ꢀV,ꢀ
I
D
=50ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=20ꢀV,ꢀ
I
D
=50ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=20ꢀV,ꢀ
I
D
=50ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=20ꢀV,ꢀ
I
D
=50ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=20ꢀV,ꢀ
I
D
=50ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=20ꢀV,ꢀ
I
D
=50ꢀA,ꢀ
V
GS
=0ꢀtoꢀ4.5ꢀV
V
DS
=0.1ꢀV,ꢀ
V
GS
=0ꢀtoꢀ4.5ꢀV
Q
g(th)
Q
gd
–
8.4
–
Q
sw
Gate charge total
1)
Q
g
52
–
Gate plateau voltage
Gate charge total
1)
V
plateau
Q
g
2.6
19
27
–
nC
nC
nC
Gate charge total, sync. FET
Output charge
1)
Q
g(sync)
Q
oss
15
33
46
V
DD
=20ꢀV,ꢀ
V
GS
=0ꢀV
1)
Defined by design. Not subject to production test
2)
See
″
Gate charge waveforms
″
for parameter definition
Final Data Sheet
4
Rev.ꢀ2.1,ꢀꢀ2016-05-25
OptiMOS
TM
ꢀPower-MOSFET,ꢀ40ꢀV
BSC022N04LS
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Typ.
–
Max.
69
400
1
Diode continuous forward current
Diode pulse current
I
S
–
–
–
–
–
A
T
C
=25ꢀ°C
I
S,pulse
V
SD
t
rr
–
A
T
C
=25ꢀ°C
Diode forward voltage
Reverse recovery time
1)
0.85
20
36
V
V
GS
=0ꢀV,ꢀ
I
F
=50ꢀA,ꢀ
T
j
=25ꢀ°C
V
R
=20ꢀV,ꢀ
I
F
=50A,ꢀd
i
F
/d
t
=400ꢀA/µs
V
R
=20ꢀV,ꢀ
I
F
=50A,ꢀd
i
F
/d
t
=400ꢀA/µs
40
–
ns
nC
Reverse recovery charge
Q
rr
1)
Defined by design. Not subject to production test
Final Data Sheet
5
Rev.ꢀ2.1,ꢀꢀ2016-05-25
OptiMOS
TM
ꢀPower-MOSFET,ꢀ40ꢀV
BSC022N04LS
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams
Diagramꢀ1:ꢀPowerꢀdissipation
Diagramꢀ2:ꢀDrainꢀcurrent
80
120
70
60
50
40
30
20
10
0
100
80
60
40
20
0
0
40
80
120
160
0
40
80
120
160
T
C
ꢀ[°C]
T
C
ꢀ[°C]
P
tot
=f(
T
C
)
I
D
=f(
T
C
);ꢀ
V
GS
≥
10ꢀV
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance
10
3
10
1
1 µs
10 µs
10
2
10
1
10
0
10
-1
10
0
0.5
100 µs
0.2
0.1
1 ms
0.05
10
-1
10 ms
DC
0.02
0.01
single pulse
10
-2
10
-3
10
-1
10
0
10
1
10
2
10
-6
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
V
DS
ꢀ[V]
t
p
ꢀ[s]
I
D
=f(
V
DS
);ꢀ
T
C
=25ꢀ°C;ꢀ
D
=0;ꢀparameter:ꢀ
t
p
Z
thJC
=f(
t
p
);ꢀparameter:ꢀ
D
=
t
p
/
T
Final Data Sheet
6
Rev.ꢀ2.1,ꢀꢀ2016-05-25
OptiMOS
TM
ꢀPower-MOSFET,ꢀ40ꢀV
BSC022N04LS
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
400
5
10 V
2.8 V
4.5 V
5 V
350
3 V
3.2 V
4 V
4
300
3.5 V
3.5 V
250
3
4 V
4.5 V
200
3.2 V
5 V
2
1
0
150
10 V
3 V
100
2.8 V
50
0
0
1
2
0
50
100
150
200
250
300
350
400
V
DS
ꢀ[V]
I
D
ꢀ[A]
I
D
=f(
V
DS
);ꢀ
T
j
=25ꢀ°C;ꢀparameter:ꢀ
V
GS
R
DS(on)
=f(
I
D
);ꢀ
T
j
=25ꢀ°C;ꢀparameter:ꢀ
V
GS
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics
Diagramꢀ8:ꢀTyp.ꢀforwardꢀtransconductance
400
250
320
240
160
80
200
150
100
50
150 °C
25 °C
0
0
0
1
2
3
4
5
0
20
40
60
80
100
V
GS
ꢀ[V]
I
D
ꢀ[A]
I
D
=f(
V
GS
);ꢀ|
V
DS
|>2|
I
D
|
R
DS(on)max
;ꢀparameter:ꢀ
T
j
g
fs
=f(
I
D
);ꢀ
T
j
=25ꢀ°C
Final Data Sheet
7
Rev.ꢀ2.1,ꢀꢀ2016-05-25
OptiMOS
TM
ꢀPower-MOSFET,ꢀ40ꢀV
BSC022N04LS
Diagramꢀ9:ꢀDrain-sourceꢀon-stateꢀresistance
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage
5
2.5
4
2.0
3
1.5
250 µA
max
2
1.0
0.5
0.0
typ
1
0
-60
-20
20
60
100
140
180
-60
-20
20
60
100
140
180
T
j
ꢀ[°C]
T
j
ꢀ[°C]
R
DS(on)
=f(
T
j
);ꢀ
I
D
=50ꢀA;ꢀ
V
GS
=10ꢀV
V
GS(th)
=f(
T
j
);ꢀ
V
GS
=
V
DS
;ꢀ
I
D
=250ꢀµA
Diagramꢀ11:ꢀTyp.ꢀcapacitances
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode
10
4
10
3
25 °C
150 °C
25°C,max
150°C,max
Ciss
10
3
10
2
10
1
10
2
10
1
10
0
Coss
Crss
0
10
20
30
40
0.0
0.5
1.0
1.5
V
DS
ꢀ[V]
V
SD
ꢀ[V]
C
=f(
V
DS
);ꢀ
V
GS
=0ꢀV;ꢀ
f
=1ꢀMHz
I
F
=f(
V
SD
);ꢀparameter:ꢀ
T
j
Final Data Sheet
8
Rev.ꢀ2.1,ꢀꢀ2016-05-25
OptiMOS
TM
ꢀPower-MOSFET,ꢀ40ꢀV
BSC022N04LS
Diagramꢀ13:ꢀAvalancheꢀcharacteristics
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge
10
2
12
20 V
32 V
10
8
8 V
25 °C
100 °C
10
1
6
125 °C
4
2
10
0
0
10
0
10
1
10
2
10
3
0
10
20
30
40
t
AV
ꢀ[µs]
Q
gate
ꢀ[nC]
I
AS
=f(
t
AV
);ꢀ
R
GS
=25ꢀ
Ω
;ꢀparameter:ꢀ
T
j(start)
V
GS
=f(
Q
gate
);ꢀ
I
D
=50ꢀAꢀpulsed;ꢀparameter:ꢀ
V
DD
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage
Gate charge waveforms
46
44
42
40
38
36
34
32
30
-60
-20
20
60
100
140
180
T
j
ꢀ[°C]
V
BR(DSS)
=f(
T
j
);ꢀ
I
D
=1ꢀmA
Final Data Sheet
9
Rev.ꢀ2.1,ꢀꢀ2016-05-25
OptiMOS
TM
ꢀPower-MOSFET,ꢀ40ꢀV
BSC022N04LS
5ꢀꢀꢀꢀꢀPackageꢀOutlines
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-TDSON-8,ꢀdimensionsꢀinꢀmm
Final Data Sheet
10
Rev.ꢀ2.1,ꢀꢀ2016-05-25
OptiMOS
TM
ꢀPower-MOSFET,ꢀ40ꢀV
BSC022N04LS
Dimension in mm
Figureꢀ2ꢀꢀꢀꢀꢀOutlineꢀTapeꢀ(TDSON-8)
Final Data Sheet
11
Rev.ꢀ2.1,ꢀꢀ2016-05-25
OptiMOS
TM
ꢀPower-MOSFET,ꢀ40ꢀV
BSC022N04LS
Figureꢀ3ꢀꢀꢀꢀꢀOutlineꢀFootprintꢀ(TDSON-8)
Final Data Sheet
12
Rev.ꢀ2.1,ꢀꢀ2016-05-25
OptiMOS
TM
ꢀPower-MOSFET,ꢀ40ꢀV
BSC022N04LS
RevisionꢀHistory
BSC022N04LS
Revision:ꢀ2016-05-25,ꢀRev.ꢀ2.1
Previous Revision
Revision Date
2.1
Subjects (major changes since last revision)
Update footnotes and insert max values
2016-05-25
TrademarksꢀofꢀInfineonꢀTechnologiesꢀAG
AURIX™,ꢀC166™,ꢀCanPAK™,ꢀCIPOS™,ꢀCoolGaN™,ꢀCoolMOS™,ꢀCoolSET™,ꢀCoolSiC™,ꢀCORECONTROL™,ꢀCROSSAVE™,ꢀDAVE™,ꢀDI-POL™,ꢀDrBlade™,
EasyPIM™,ꢀEconoBRIDGE™,ꢀEconoDUAL™,ꢀEconoPACK™,ꢀEconoPIM™,ꢀEiceDRIVER™,ꢀeupec™,ꢀFCOS™,ꢀHITFET™,ꢀHybridPACK™,ꢀInfineon™,
ISOFACE™,ꢀIsoPACK™,ꢀi-Wafer™,ꢀMIPAQ™,ꢀModSTACK™,ꢀmy-d™,ꢀNovalithIC™,ꢀOmniTune™,ꢀOPTIGA™,ꢀOptiMOS™,ꢀORIGA™,ꢀPOWERCODE™,
PRIMARION™,ꢀPrimePACK™,ꢀPrimeSTACK™,ꢀPROFET™,ꢀPRO-SIL™,ꢀRASIC™,ꢀREAL3™,ꢀReverSave™,ꢀSatRIC™,ꢀSIEGET™,ꢀSIPMOS™,ꢀSmartLEWIS™,
SOLIDꢀFLASH™,ꢀSPOC™,ꢀTEMPFET™,ꢀthinQꢁ™,ꢀTRENCHSTOP™,ꢀTriCore™.
TrademarksꢀupdatedꢀAugustꢀ2015
OtherꢀTrademarks
Allꢀreferencedꢀproductꢀorꢀserviceꢀnamesꢀandꢀtrademarksꢀareꢀtheꢀpropertyꢀofꢀtheirꢀrespectiveꢀowners.
WeꢀListenꢀtoꢀYourꢀComments
Anyꢀinformationꢀwithinꢀthisꢀdocumentꢀthatꢀyouꢀfeelꢀisꢀwrong,ꢀunclearꢀorꢀmissingꢀatꢀall?ꢀYourꢀfeedbackꢀwillꢀhelpꢀusꢀtoꢀcontinuously
improveꢀtheꢀqualityꢀofꢀthisꢀdocument.ꢀPleaseꢀsendꢀyourꢀproposalꢀ(includingꢀaꢀreferenceꢀtoꢀthisꢀdocument)ꢀto:
Publishedꢀby
InfineonꢀTechnologiesꢀAG
81726ꢀMünchen,ꢀGermany
©ꢀ2016ꢀInfineonꢀTechnologiesꢀAG
AllꢀRightsꢀReserved.
LegalꢀDisclaimer
Theꢀinformationꢀgivenꢀinꢀthisꢀdocumentꢀshallꢀinꢀnoꢀeventꢀbeꢀregardedꢀasꢀaꢀguaranteeꢀofꢀconditionsꢀorꢀcharacteristics.ꢀWith
respectꢀtoꢀanyꢀexamplesꢀorꢀhintsꢀgivenꢀherein,ꢀanyꢀtypicalꢀvaluesꢀstatedꢀhereinꢀand/orꢀanyꢀinformationꢀregardingꢀtheꢀapplication
ofꢀtheꢀdevice,ꢀInfineonꢀTechnologiesꢀherebyꢀdisclaimsꢀanyꢀandꢀallꢀwarrantiesꢀandꢀliabilitiesꢀofꢀanyꢀkind,ꢀincludingꢀwithout
limitation,ꢀwarrantiesꢀofꢀnon-infringementꢀofꢀintellectualꢀpropertyꢀrightsꢀofꢀanyꢀthirdꢀparty.
Information
Forꢀfurtherꢀinformationꢀonꢀtechnology,ꢀdeliveryꢀtermsꢀandꢀconditionsꢀandꢀpricesꢀpleaseꢀcontactꢀyourꢀnearestꢀInfineon
Warnings
Dueꢀtoꢀtechnicalꢀrequirements,ꢀcomponentsꢀmayꢀcontainꢀdangerousꢀsubstances.ꢀForꢀinformationꢀonꢀtheꢀtypesꢀinꢀquestion,
pleaseꢀcontactꢀtheꢀnearestꢀInfineonꢀTechnologiesꢀOffice.
TheꢀInfineonꢀTechnologiesꢀcomponentꢀdescribedꢀinꢀthisꢀDataꢀSheetꢀmayꢀbeꢀusedꢀinꢀlife-supportꢀdevicesꢀorꢀsystemsꢀand/or
automotive,ꢀaviationꢀandꢀaerospaceꢀapplicationsꢀorꢀsystemsꢀonlyꢀwithꢀtheꢀexpressꢀwrittenꢀapprovalꢀofꢀInfineonꢀTechnologies,ꢀifꢀa
failureꢀofꢀsuchꢀcomponentsꢀcanꢀreasonablyꢀbeꢀexpectedꢀtoꢀcauseꢀtheꢀfailureꢀofꢀthatꢀlife-support,ꢀautomotive,ꢀaviationꢀand
aerospaceꢀdeviceꢀorꢀsystemꢀorꢀtoꢀaffectꢀtheꢀsafetyꢀorꢀeffectivenessꢀofꢀthatꢀdeviceꢀorꢀsystem.ꢀLifeꢀsupportꢀdevicesꢀorꢀsystemsꢀare
intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis
reasonableꢀtoꢀassumeꢀthatꢀtheꢀhealthꢀofꢀtheꢀuserꢀorꢀotherꢀpersonsꢀmayꢀbeꢀendangered.
Final Data Sheet
13
Rev.ꢀ2.1,ꢀꢀ2016-05-25
