Infineon-Technologies-BSC028N06NSSC

Part #Infineon-Technologies-BSC028N06NSSC
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Infineon-Technologies-BSC028N06NSSC
BSC028N06NS  
MOSFET  
OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
SuperSO8  
5
8
6
7
7
Features  
6
5
8
•ꢀOptimizedꢀforꢀhighꢀperformanceꢀSMPS,ꢀe.g.ꢀsync.ꢀrec.  
•ꢀ100%ꢀavalancheꢀtested  
•ꢀSuperiorꢀthermalꢀresistance  
•ꢀN-channel  
•ꢀQualifiedꢀaccordingꢀtoꢀJEDEC

1)

ꢀꢀforꢀtargetꢀapplications  
•ꢀPb-freeꢀleadꢀꢀplating;ꢀRoHSꢀcompliant  
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21  
4
3
1
2
2
3
1
4
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters  
S 1  
8 D  
7 D  
Parameter  
Value  
Unit  
S 2  
S 3  
G 4  
V

DS  

60  
V
R

DS(on),max  

I

D  

2.8  
100  
43  
m
Ω
 
A
6 D  
5 D  
Q

oss  

nC  
nC  
Q

G

(0..10V)  
37  
Typeꢀ/ꢀOrderingꢀCode  
Package  
Marking  
RelatedꢀLinks  
BSC028N06NS  
PG-TDSON-8  
028N06NS  
–

1)

J-STD20 and JESD22  
Final Data Sheet  
1
Rev.ꢀ2.4,ꢀꢀ2020-02-04  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
BSC028N06NS  
TableꢀofꢀContents  
Description .
 
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Maximum ratings
 
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3  
Thermal characteristics
 
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Electrical characteristics
 
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4  
Electrical characteristics diagrams
 
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6  
Package Outlines
 
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10  
Revision History
 
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13  
Trademarks .
 
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13  
Disclaimer .
 
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13  
Final Data Sheet  
2
Rev.ꢀ2.4,ꢀꢀ2020-02-04  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
BSC028N06NS  
1ꢀꢀꢀꢀꢀMaximumꢀratings  
atꢀ
T

j

=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified  
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
–
–
–
–
–
–
100  
83  
23  
V

GS

=10ꢀV,ꢀ
T

C

=25ꢀ°C  
Continuous drain current  
I

D  

A
V

GS

=10ꢀV,ꢀ
T

C

=100ꢀ°C  
V

GS

=10ꢀV,ꢀ
T

C

=25ꢀ°C,ꢀ
R

thJA

ꢀ=50K/W

1)  

Pulsed drain current

2)  

Avalanche energy, single pulse

3)  

I

D,pulse  

E

AS  

–
–
–
–
400  
100  
20  
A
T

C

=25ꢀ°C  
–
mJ  
V
I

D

=50ꢀA,ꢀ
R

GS

=25ꢀ
Ω  
Gate source voltage  
V

GS  

-20  
–
–
–
–
–
83  
2.5  
T

C

=25ꢀ°C  
Power dissipation  
P

tot  

W
T

A

=25ꢀ°C,ꢀ
R

thJA

=50ꢀK/W

2)  

IEC climatic category;  
DIN IEC 68-1: 55/150/56  
Operating and storage temperature  
T

j

,ꢀ
T

stg  

-55  
–
150  
°C  
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Thermal resistance, junction – case,  
bottom  
R

thJC  

R

thJC  

R

thJA  

–
0.9  
1.5  
K/W  
K/W  
K/W  
–
–
–
Thermal resistance, junction – case,  
top  
–
–
–
–
20  
50  
Device on PCB,  
6 cm

2

cooling area

1)  

1)

Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain  
connection. PCB is vertical in still air.  

2)

See figure 3 for more detailed information  

3)

See figure 13 for more detailed information  
Final Data Sheet  
3
Rev.ꢀ2.4,ꢀꢀ2020-02-04  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
BSC028N06NS  
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics  
atꢀ
T

j

=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified  
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics  
Values  
Typ.  
–
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
60  
Max.  
–
Drain-source breakdown voltage  
Gate threshold voltage  
V

(BR)DSS  

V

GS(th)  

V
V
V

GS

=0ꢀV,ꢀ
I

D

=1ꢀmA  
V

DS

=
V

GS

,ꢀ
I

D

=50ꢀµA  
2.1  
2.8  
3.3  
–
–
0.5  
10  
1
100  
V

DS

=60ꢀV,ꢀ
V

GS

=0ꢀV,ꢀ
T

j

=25ꢀ°C  
V

DS

=60ꢀV,ꢀ
V

GS

=0ꢀV,ꢀ
T

j

=125ꢀ°C  
Zero gate voltage drain current  
Gate-source leakage current  
Drain-source on-state resistance  
I

DSS  

µA  
nA  
I

GSS  

–
10  
100  
V

GS

=20ꢀV,ꢀ
V

DS

=0ꢀV  
–
–
2.5  
3.4  
2.8  
4.2  
V

GS

=10ꢀV,ꢀ
I

D

=50ꢀA  
V

GS

=6ꢀV,ꢀ
I

D

=12.5ꢀA  
R

DS(on)  

m
Ω  
Gate resistance

1)  

Transconductance  
R

G  

g

fs  

–
1.3  
1.95  
–
Ω
–
50  
100  
S
|
V

DS

|>2|
I

D

|
R

DS(on)max

,ꢀ
I

D

=50ꢀA  
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics

1)

ꢀ  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Input capacitance  
C

iss  

C

oss  

C

rss  

2025 2700 3375 pF  
V

GS

=0ꢀV,ꢀ
V

DS

=30ꢀV,ꢀ
f
=1ꢀMHz  
V

GS

=0ꢀV,ꢀ
V

DS

=30ꢀV,ꢀ
f
=1ꢀMHz  
V

GS

=0ꢀV,ꢀ
V

DS

=30ꢀV,ꢀ
f
=1ꢀMHz  
Output capacitance  
495  
8.5  
660  
28  
825  
56  
pF  
pF  
Reverse transfer capacitance  
V

DD

=30ꢀV,ꢀ
V

GS

=10ꢀV,ꢀ
I

D

=50ꢀA,  
R

G,ext

=3ꢀ
Ω  
Turn-on delay time  
Rise time  
t

d(on)  

t

r  

t

d(off)  

t

f  

–
–
–
–
11  
38  
19  
8
22  
57  
38  
16  
ns  
ns  
ns  
ns  
V

DD

=30ꢀV,ꢀ
V

GS

=10ꢀV,ꢀ
I

D

=50ꢀA,  
R

G,ext

=3ꢀ
Ω  
V

DD

=30ꢀV,ꢀ
V

GS

=10ꢀV,ꢀ
I

D

=50ꢀA,  
R

G,ext

=3ꢀ
Ω  
Turn-off delay time  
Fall time  
V

DD

=30ꢀV,ꢀ
V

GS

=10ꢀV,ꢀ
I

D

=50ꢀA,  
R

G,ext

=3ꢀ
Ω  
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics

2)

ꢀ  
Values  
Typ.  
12  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
9
Max.  
16.5  
11  
Gate to source charge  
Gate charge at threshold  
Gate to drain charge  
Switching charge  
Q

gs  

nC  
nC  
nC  
nC  
nC  
V
V

DD

=30ꢀV,ꢀ
I

D

=50ꢀA,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
V

DD

=30ꢀV,ꢀ
I

D

=50ꢀA,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
V

DD

=30ꢀV,ꢀ
I

D

=50ꢀA,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
V

DD

=30ꢀV,ꢀ
I

D

=50ꢀA,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
V

DD

=30ꢀV,ꢀ
I

D

=50ꢀA,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
V

DD

=30ꢀV,ꢀ
I

D

=50ꢀA,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
V

DS

=0.1ꢀV,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
Q

g(th)  

Q

gd  

6
8
5
7
10.3  
17  
Q

sw  

8
12  
Gate charge total  
Q

g  

31  
4.0  
27  
32  
37  
49  
Gate plateau voltage  
Gate charge total, sync. FET  
Output charge  
V

plateau  

Q

g(sync)  

Q

oss  

4.6  
33  
5.2  
43  
nC  
nC  
43  
54  
V

DD

=30ꢀV,ꢀ
V

GS

=0ꢀV  

1)

Defined by design. Not subject to production test  

2)

Defined by design. Not subject to production test. See
″
Gate charge waveforms
″
for parameter definition  
Final Data Sheet  
4
Rev.ꢀ2.4,ꢀꢀ2020-02-04  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
BSC028N06NS  
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode  
Values  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Typ.  
–
Max.  
100  
400  
1.2  
56  
Diode continuous forward current  
Diode pulse current  
I

S  

–
A
T

C

=25ꢀ°C  
I

S,pulse  

V

SD  

t

rr  

–
–
A
T

C

=25ꢀ°C  
Diode forward voltage  
–
0.9  
35  
29  
V
V

GS

=0ꢀV,ꢀ
I

F

=50ꢀA,ꢀ
T

j

=25ꢀ°C  
V

R

=30ꢀV,ꢀ
I

F

=50ꢀA,ꢀd
i

F

/d
t
=100ꢀA/µs  
V

R

=30ꢀV,ꢀ
I

F

=50ꢀA,ꢀd
i

F

/d
t
=100ꢀA/µs  
Reverse recovery time

1)  

Reverse recovery charge

1)  

14  
14  
ns  
nC  
Q

rr  

58  

1)

Defined by design. Not subject to production test  
Final Data Sheet  
5
Rev.ꢀ2.4,ꢀꢀ2020-02-04  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
BSC028N06NS  
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams  
Diagramꢀ1:ꢀPowerꢀdissipation  
Diagramꢀ2:ꢀDrainꢀcurrent  
100  
120  
100  
80  
60  
40  
20  
0
80  
60  
40  
20  
0
0
25  
50  
75  
100  
125  
150  
175  
0
25  
50  
75  
100  
125  
150  
175  
T

C

ꢀ[°C]  
T

C

ꢀ[°C]  
P

tot

=f(
T

C

)  
I

D

=f(
T

C

);ꢀ
V

GS

≥
10ꢀV  
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea  
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance  
10

3  

10

1  

1 µs  
10 µs  
10

2  

10

1  

10

0  

10

-1  

10

0  

0.5  
100 µs  
0.2  
0.1  
10

-1  

1 ms  
10 ms  
DC  
0.05  
0.02  
0.01  
single pulse  
10

-2  

10

-3  

10

-1  

10

0  

10

1  

10

2  

10

-6  

10

-5  

10

-4  

10

-3  

10

-2  

10

-1  

V

DS

ꢀ[V]  
t

p

ꢀ[s]  
I

D

=f(
V

DS

);ꢀ
T

C

=25ꢀ°C;ꢀ
D
=0;ꢀparameter:ꢀ
t

p  

Z

thJC

=f(
t

p

);ꢀparameter:ꢀ
D
=
t

p

/
T  
Final Data Sheet  
6
Rev.ꢀ2.4,ꢀꢀ2020-02-04  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
BSC028N06NS  
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics  
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance  
400  
8
10 V  
7 V  
5.5 V  
6 V  
360  
5 V  
7
6
5
4
3
2
1
0
320  
280  
6 V  
240  
200  
7 V  
160  
5.5 V  
10 V  
120  
80  
40  
0
5 V  
0.0  
0.5  
1.0  
1.5  
2.0  
0
50  
100  
150  
200  
250  
300  
350  
400  
V

DS

ꢀ[V]  
I

D

ꢀ[A]  
I

D

=f(
V

DS

);ꢀ
T

j

=25ꢀ°C;ꢀparameter:ꢀ
V

GS  

R

DS(on)

=f(
I

D

);ꢀ
T

j

=25ꢀ°C;ꢀparameter:ꢀ
V

GS  

Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics  
Diagramꢀ8:ꢀTyp.ꢀforwardꢀtransconductance  
400  
160  
360  
320  
280  
240  
200  
160  
120  
80  
120  
80  
40  
0
40  
150 °C  
25 °C  
0
0
2
4
6
8
0
20  
40  
60  
80  
100  
V

GS

ꢀ[V]  
I

D

ꢀ[A]  
I

D

=f(
V

GS

);ꢀ|
V

DS

|>2|
I

D

|
R

DS(on)max

;ꢀparameter:ꢀ
T

j  

g

fs

=f(
I

D

);ꢀ
T

j

=25ꢀ°C  
Final Data Sheet  
7
Rev.ꢀ2.4,ꢀꢀ2020-02-04  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
BSC028N06NS  
Diagramꢀ9:ꢀDrain-sourceꢀon-stateꢀresistance  
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage  
6.0  
5
5.5  
5.0  
4.5  
4.0  
4
3
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
max  
500 µA  
50 µA  
typ  
2
1
0
-60  
-20  
20  
60  
100  
140  
180  
-60  
-20  
20  
60  
100  
140  
180  
T

j

ꢀ[°C]  
T

j

ꢀ[°C]  
R

DS(on)

=f(
T

j

);ꢀ
I

D

=50ꢀA;ꢀ
V

GS

=10ꢀV  
V

GS(th)

=f(
T

j

);ꢀ
V

GS

=
V

DS  

Diagramꢀ11:ꢀTyp.ꢀcapacitances  
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode  
10

4  

10

3  

25 °C  
150 °C  
Ciss  
10

3  

10

2  

10

1  

10

2  

10

1  

10

0  

Coss  
Crss  
0
20  
40  
60  
0.0  
0.5  
1.0  
1.5  
V

DS

ꢀ[V]  
V

SD

ꢀ[V]  
C
=f(
V

DS

);ꢀ
V

GS

=0ꢀV;ꢀ
f
=1ꢀMHz  
I

F

=f(
V

SD

);ꢀparameter:ꢀ
T

j  

Final Data Sheet  
8
Rev.ꢀ2.4,ꢀꢀ2020-02-04  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
BSC028N06NS  
Diagramꢀ13:ꢀAvalancheꢀcharacteristics  
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge  
10

2  

12  
30 V  
48 V  
10  
8
12 V  
25 °C  
125 °C  
100 °C  
10

1  

6
10

0  

4
2
10

-1  

0
10

0  

10

1  

10

2  

10

3  

0
10  
20  
30  
40  
t

AV

ꢀ[µs]  
Q

gate

ꢀ[nC]  
I

AS

=f(
t

AV

);ꢀ
R

GS

=25ꢀ
Ω
;ꢀparameter:ꢀ
T

j(start)  

V

GS

=f(
Q

gate

);ꢀ
I

D

=50ꢀAꢀpulsed;ꢀparameter:ꢀ
V

DD  

Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage  
Diagram Gate charge waveforms  
70  
66  
62  
58  
54  
50  
-60  
-20  
20  
60  
100  
140  
180  
T

j

ꢀ[°C]  
V

BR(DSS)

=f(
T

j

);ꢀ
I

D

=1ꢀmA  
Final Data Sheet  
9
Rev.ꢀ2.4,ꢀꢀ2020-02-04  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
BSC028N06NS  
5ꢀꢀꢀꢀꢀPackageꢀOutlines  
DOCUMENT NO.  
Z8B00003332  
REVISION  
07  
MILLIMETERS  
DIMENSION  
MIN.  
0.90  
0.15  
0.34  
4.80  
3.90  
0.03  
5.70  
5.90  
3.88  
MAX.  
1.20  
0.35  
0.54  
5.35  
4.40  
0.23  
6.10  
6.42  
4.31  
SCALE 10:1  
A
A1  
b
3mm  
0
1
2
D
D1  
D2  
E
EUROPEAN PROJECTION  
E1  
E2  
e
1.27  
L
0.45  
0.45  
0.71  
0.69  
ISSUE DATE  
06.06.2019  
M
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-TDSON-8,ꢀdimensionsꢀinꢀmm  
Final Data Sheet  
10  
Rev.ꢀ2.4,ꢀꢀ2020-02-04  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
BSC028N06NS  
PG-TDSON-8: Recommen
de
d Bo
a
rdpads & Apertures  
1.905  
1.905  
1.27  
3x  
0.6  
1.27  
3x  
0.5  
1.6  
0.2  
1.5  
0.5  
1.27  
3x  
1.27  
3x  
0.4  
1.905  
1.905  
copper  
solder mask  
stencil apertures  
all dimensions in mm  
Figure 2
 
Outline Boardpads (TDSON-8), dimensions in mm  
Final Data Sheet  
11  
Rev.ꢀ2.4,ꢀꢀ2020-02-04  

OptiMO
S

TM

Power-Transistor ,
 
60 V  
BSC028N06NS  
Dimension in mm  
Figure 3
 
Outline Tape (TDSON-8)  
Final Data Sheet  
12  
Rev. 2.4,
 
2020-02-04  

OptiMO
S

TM

Power-Transistor ,
 
60 V  
BSC028N06NS  
Revision History  
BSC028N06NS  
Revision: 2020-02-04, Rev. 2.4  
Previous Revision  
Revision Date  
2.3  
Subjects (major changes since last revision)  
Added RthJC_typ, updated outline and footprint drawings, insert footnote “Defined by  
design….”  
2014-11-10  
2.4  
Update package drawings  
2020-02-04  
Trademarks  
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Published by  
Infineon Technologies AG  
81726 München, Germany  
© 2020 Infineon Technologies AG  
All Rights Reserved.  
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Final Data Sheet  
13  
Rev. 2.4,
 
2020-02-04